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检索条件"任意字段=2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2013"

共 809 条记录，以下是271-280 订阅

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High Performance Scalable Elliptic Curve Cryptosystem Processor in GF (2^m)

High Performance Scalable Elliptic Curve Cryptosystem Proces...

引用

IEEE international symposium on Circuits and Systems (ISCAS)

作者： Loi, K. C. Cinnati Ko, Seok-Bum Univ Saskatchewan Dept Elect & Comp Engn Saskatoon SK Canada

ISBN: (纸本)9781467357623;9781467357609

The implementation of a scalable elliptic curve cryptography (ECC) processor is presented in this paper. The proposed ECC processor supports all 5 pseudo-random curves recommended by the National Institute of Standards and Technology (NIST) without the need to reconfigure the fpga. The paper proposes a finite field arithmetic unit (FFAU) that reduces the number of clock cycles required to compute the elliptic curve point multiplication (ECPM) operation for ECC. The paper also presents a Lopez-Dahab algorithm with modified instructions to take advantage of the novel FFAU architecture. The completed scalable ECC processor (ECP) is implemented in hardware and a comparison analysis to the state-of-the-art designs is also discussed.

关键词： field programmable gate arrays program processors public key cryptography

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Performance Modeling of Pipelined Linear Algebra Architectures on fpgas

Performance Modeling of Pipelined Linear Algebra Architectur...

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9th international Applied Reconfigurable Computing symposium (ARC)

作者： Skalicky, Sam Lopez, Sonia Lukowiak, Marcin Letendre, James Ryan, Matthew Rochester Inst Technol Rochester NY 14623 USA

ISBN: (纸本)9783642368127;9783642368110

The potential design space of fpga accelerators is very large. The factors that define the performance of a particular implementation include the architecture design, number of pipelines, and memory bandwidth. In this paper we present a mathematical model that, based on these factors, predicts the computation time of pipelined fpga accelerators. This model can be used to quickly explore the design space without any implementation or simulation. We evaluate the model, its usefulness, and ability to identify the bottlenecks and improve performance. Being the core of many compute-intensive applications, linear algebra computations are the main contributors to their total execution time. Hence, five relevant linear algebra computations are selected, analyzed, and the accuracy of the model is validated against implemented designs.

关键词： field programmable gate arrays (fpga)

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Design and implementation of an efficient and realistic cooperative core architecture

Design and implementation of an efficient and realistic coop...

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2013 IEEE 7th international symposium on Embedded Multicore/Manycore System-on-Chip, MCSoC 2013

作者： Nagatsuka, Tomoyuki Kise, Kenji Mitsubishi Electric Engineering Co. Ltd. United States Department of Computer Science Tokyo Institute of Technology Tokyo Japan

ISBN: (纸本)9780768550862

In order to improve performance in the many-core era, we should utilize all cores on a chip effectively. However, it is difficult to parallelize programs so as to utilize all cores, and single-thread regions remain as bottlenecks. To solve these bottlenecks, cooperative core architectures are proposed. They can accelerate single-thread execution by fusing some narrow-issue cores into a wide-issue core. They can also balance single-thread performance and multi-thread performance by fusion and split during execution. We have proposed Core Symphony architecture that is one of the cooperative core architectures. In this paper, we design and implement efficient and realistic Core Symphony and run it on fpga. Then, we clarify the performance and the hardware budget of Core Symphony. © 2013 IEEE.

关键词： field programmable gate arrays (fpga)

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fpga-based Smart-sensor for Fault Detection in VSD-fed Induction Motors

FPGA-based Smart-sensor for Fault Detection in VSD-fed Induc...

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9th IEEE international symposium on Diagnostics for Electric Machines, Power Electronics and Drives (SDEMPED)

作者： Garcia-Ramirez, A. G. Osornio-Rios, R. A. Garcia-Perez, A. Romero-Troncoso, R. J. Univ Guanajuato HSPdigital CA Telemat DICIS Salamanca 36885 Gto Mexico Univ Autonoma Queretaro HSPdigital CA Mecatron Fac Ingn Campus San Juan del Rio San Juan Del Rio 76807 Qro Mexico Univ Guanajuato HSPdigital CA Procesamiento Digital Senales DICIS Salamanca 36885 Gto Mexico

ISBN: (纸本)9781479900251

Nowadays, different industrial processes use induction motors fed through variable speed drives (VSD). In order to improve these processes, the industry demands the use of smart sensors to detect the faults, reduce the cost of maintenance, and decrease power consumption. In this work, broken rotor bars, unbalance and misalignment are automatically detected in induction motors fed by a VSD using the three current phases online, with a smart sensor. The proposed smart sensor is implemented in a field programmable gate array offering a low computational load methodology, low-cost, and portable solution for fault detection in induction motors VSD-fed. Results show a high effectiveness detection of the treated faults.

关键词： Fault detection field programmable gate arrays Induction motors Variable speed drives

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Online Algorithm for Early Stage Fault Detection in IGBT Switches

Online Algorithm for Early Stage Fault Detection in IGBT Swi...

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9th IEEE international symposium on Diagnostics for Electric Machines, Power Electronics and Drives (SDEMPED)

作者： Anderson, Jason M. Cox, Robert W. O'Connor, Paul UNC Charlotte Dept Elect & Comp Engn Charlotte NC 28223 USA

ISBN: (纸本)9781479900251

The early detection of incipient faults is desirable in mission-critical applications such as shipboard propulsion drives. This paper presents an online condition-monitoring approach for detecting early stage faults in IGBTs. The proposed algorithm extracts important device features (i.e. on-state resistance, gate charge, etc.) and compares them to healthy values recorded over a range of operating conditions. The algorithm is based on principal-components analysis (PCA). An experimental implementation in an IGBT-based drive is described, and results recorded with two different faults over a range of operating conditions are presented. The scheme integrates well with new fpga-based gate drives and provides a powerful alternative to rules-based fault detection.

关键词： electric drives fault diagnosis field programmable gate arrays power semiconductor switches principal component analysis

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High-speed Arbitrary Waveform Generator based on fpga

High-speed Arbitrary Waveform Generator based on FPGA

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60th IEEE Nuclear Science symposium (NSS) / Medical Imaging Conference (MIC) / 20th international Workshop on Room-Temperature Semiconductor X-ray and Gamma-ray Detectors

作者： Zhang, Hong-Fei Luo, Chun-Li Tang, Peng-Yi Cui, Ke Lin, Sheng-Zhao Jin, Ge Wang, Jian Univ Sci & Technol China Anhui Key Lab Phys Elect State Key Lab Technol Particle Detect & Elect Hefei 230026 Peoples R China

ISBN: (纸本)9781479905348

With the development of electronic and information technology, the signal generator has been widely used in various fields of electronic technology. And the requirement of its performance is increasingly more and more superior, such as adjustable frequency and range, high frequency stability, fast conversion speed, etc. Meanwhile, Some uncommonly special waveforms are needed in some special environment, for example a waveform of 1/(T-t) form used in quantum random number generator. Therefore high-speed and stability arbitrary waveform generator have great significance for the practical application of scientific research. In this paper, the design of the arbitrary waveform generator is based on a fpga chip: XC6SLX75T, using the DDS technology and a high-speed DAC, the digital sampling frequency is up to 1GHz.

关键词： field programmable gate arrays (fpga)

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Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel fpga

Performance Analysis and Optimization of High Density Tree-B...

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9th international Applied Reconfigurable Computing symposium (ARC)

作者： Pangracious, Vinod Marrakchi, Zied Amouri, Emna Mehrez, Habib Univ Paris 06 Lab Informat Paris France Flexras Technol Paris France

ISBN: (纸本)9783642368127;9783642368110

A Tree-based 3D Multilevel fpga architecture that unifies two unidirectional programmable interconnection network is presented in this paper. In a Tree-based fpga architecture, the interconnects are arranged in a multilevel network with the switch blocks placed at different tree levels using Butterfly-Fat-Tree network topology. Two dimensional layout development of a Tree-based multilevel interconnect is a major challenge for Tree-based fpga. A 3D interconnect network technology leverage on Through Silicon Via (TSVs) to re-distribute the Tree interconnects, based on network delay and thermal considerations into multiple silicon layers is discussed. The impact of of Through Silicon Vias and performance improvement of 3D Tree-based fpga are analyzed. We present an optimized physical design technology leverage on TSV, Thermal-TSV (TTSV), and thermal analysis. Compared to 3D Mesh-based fpga, the 3D Tree-based fpga design reduces the number of TSVs by 29% and leads to a performance improvement of 53% based on our place and route experiments.

关键词： field programmable gate arrays (fpga)

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An fpga-based 64-channel DAQ System Using Linear Time-Over-Threshold Scheme for a Continuous Crystal PET Detector

An FPGA-based 64-channel DAQ System Using Linear Time-Over-T...

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60th IEEE Nuclear Science symposium (NSS) / Medical Imaging Conference (MIC) / 20th international Workshop on Room-Temperature Semiconductor X-ray and Gamma-ray Detectors

作者： Wang Yonggang Zhu Wensong Liu Chong Cheng Xinyi Li Deng Univ Sci & Technol China Dept Modern Phys Hefei 230026 Anhui Peoples R China

ISBN: (纸本)9781479905348

We have proposed a novel practical nuclear pulse digitizing method, called linear TOT scheme, which linearly converts the peak amplitude of pulses into the time-over-dynamic-threshold (TODT) to realize the digitization by a TDC. In this paper, we are presenting a prototype design of an fpga based 64-channel DAQ system for a continuous crystal PET detector using the linear TOT scheme. The system mainly consists of 64-channel active RC integration and comparison circuits, a shared time-varying threshold voltage generation circuit and an fpga. The physical size of the system is so compact that it could be attached on the base of the PMT. The preliminary test result shows that the system could achieve even better performance than the DAQ system designed by normal ADC technique in our previous work. The design proves that the linear TOT scheme is very effective solution for a high channel count digitizing system in nuclear detection, not only for its high performance and low cost, but also for its high degree of integration.

关键词： field programmable gate arrays (fpga)

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Electrical Fault Isolation of Intermittent Frequency-Dependent BRAM Functional Failure using Fast Frequency Initialized Read-Only Test and Failure Pattern Commonality Analysis

Electrical Fault Isolation of Intermittent Frequency-Depende...

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20th IEEE international symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

作者： Karkeong, Yeoh Fang, Chew Su Xilinx Asia Pacific Pte Ltd Singapore 486040 Singapore

ISBN: (纸本)9781479904808;9781479912414

Block Random Access Memory (BRAM) is a dedicated I8K/36Kbits hard logic configurable memory module embedded in field programmable gate Array (fpga) devices. BRAMs can be inferred as First In, First Out (FIFO) buffers, single or dual port, and cascading memory blocks accessed via by-1, 2, 4, 9, 18, and 36 modes. Physical failure analysis (PFA) of intermittent read and write failures evident only at fast frequency mode due to void-like metal defect in 36K(36,864 bits) BRAM block is very difficult and complex. Conventional PFA techniques such as BIRCH and photon emission analysis cannot be used to localize the failure because of frequency dependency and intermittency of failure. Nano-probing each metal trace is almost impossible for an extremely wide area of memory array. This paper will discuss the fast-frequency, initialized read-only diagnostic and failing signature commonality analysis technique and how it was utilized to quantify and localize the defect of an intermittent BRAM failure. A metal-void defect was found as an evidence of this intermittent failure electrically fault isolated by the technique described in this paper.

关键词： failure analysis field programmable gate arrays integrated circuit reliability integrated circuit testing logic circuits random-access storage

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fpga in technical resources of medical imaging

FPGA in technical resources of medical imaging

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11th IEEE international symposium on Applied Machine Intelligence and Informatics (SAMI)

作者： Kasik, V. Chvostkova, Z. VSB Tech Univ Ostrava FEECS DMC 17 Listopadu 15 Ostrava 70833 Czech Republic

ISBN: (纸本)9781467359290;9781467359283

Algorithms for real-time imaging in medicine are continuously improving. For example an image reconstruction requires rapid processing of large volume of data obtained. One way to speed up certain parts of the data processing is the use of fpgas. Using this technology can further enhance the integration of electronic systems to the level of mobile systems. The objective of this paper is to reveal and demonstrate the possibility of accelerating algorithms in medical imaging technique using fpga. Conventional graphical outputs are implemented using the graphical control unit with a large video memory. For imaging, however, can be used also such methods which generate images in real time without using the video memory. Sequence of heart images was chosen for the demonstration. These images in quick sequence appear the beating heart - a heart cycle. The animation is solved with different ROM-based images in fpga without continuous redrawing of the video memory. The demonstration design also uses the mouse which movement can smoothly move the animated images. Other image parameters can be set in real time.

关键词： cardiology computer animation field programmable gate arrays image sequences medical image processing mouse controllers (computers)

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