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检索条件"任意字段=2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2013"

共 809 条记录，以下是341-350 订阅

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Birth and adolescence of reconfigurable computing: a survey of the first 20 years of field-programmable custom computing machines

Birth and adolescence of reconfigurable computing: a survey ...

引用

Annual IEEE symposium on field-programmable Custom Computing Machines (FCCM)

作者： Kenneth Pocek Russell Tessier Andre DeHon Dept. of Electr. & Comput. Eng. Univ. of Massachusetts Amherst MA USA Dept. of Electr. & Syst. Eng. Univ. of Pennsylvania Philadelphia PA USA

For 20 years, the international symposium on field-programmable Custom Computing Machines (FCCM) has explored how fpgas and fpga-like architectures can bring unique capabilities to computational tasks. We survey the evolution of the field of reconfigurable computing as reflected in FCCM, providing a guide to the body-of-knowledge accumulated in architecture, compute models, tools, run-time reconfiguration, and applications.

关键词： field programmable gate arrays arrays Hardware Random access memory Computers Logic gates

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Evaluating the impact of integrating a security module on the real-time properties of a system

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4th IFIP TC 10 international Embedded Systems symposium, IESS 2013

作者： Malipatlolla, Sunil Stierand, Ingo OFFIS - Institute for Information Technology Oldenburg Germany Carl von Ossietzky Universität Oldenburg Oldenburg Germany

ISBN: (纸本)9783642388521

With a rise in the deployment of electronics in today's systems especially in automobiles, the task of securing them against various attacks has become a major challenge. In particular, the most vulnerable points are: (i) communication paths between the Electronic Control Units (ECUs) and between sensors & actuators and the ECU, (ii) remote software updates from the manufacturer and the in-field system. However, when including additional mechanisms to secure such systems, especially real-time systems, there will be a major impact on the real-time properties and on the overall performance of the system. Therefore, the goal of this work is to deploy a minimal security module in a target real-time system and to analyze its impact on the aforementioned properties of the system, while achieving the goals of secure communication and authentic system update. From this analysis, it has been observed that, with the integration of such a security module into the ECU, the response time of the system is strictly dependent on the utilized communication interface between the ECU processor and the security module. The analysis is performed utilizing the security module operating at different frequencies and communicating over two different interfaces i.e., Low-Pin-Count (LPC) bus and Memory-Mapped I/O (MMIO) method. © IFIP international Federation for Information Processing 2013.

关键词： field programmable gate arrays (fpga)

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An fpga Based PCI-E Root Complex Architecture for Standalone SOPCs

An FPGA Based PCI-E Root Complex Architecture for Standalone...

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Annual IEEE symposium on field-programmable Custom Computing Machines (FCCM)

作者： Yingjie Cao Yongxin Zhu Xu Wang Jiang Jiang Meikang Qiu School of Microelectronics Shanghai Jiao Tong University Shanghai China Department of Electrical and Computing Engineering University of Kentucky KY USA

We present an fpga (field programmable gate array) based PCI-E (PCI-Express) root complex architecture for SOPCs (System-on-a-programmable-Chip) in this paper. In our work, the system on the fpga serves as a PCIE master device rather than a PCIE endpoint, which is usually a common practice as a co-processing device driven by a desktop computer or a server. We use this system to control a PCIE endpoint, which is also an fpga based endpoint implemented on another fpga board. This architecture requires only IP cores free of charge. We also provide basic software driver so that specific device driver can be developed on it to control popular PCIE device in the future, i.e. ethernet card or graphic card. The whole architecture has been implemented on Xilinx Virtex-6 fpgas to indicate that this architecture is a feasible approach to standalone SOPCs, which has better efficiencies than those with additional generic controlling processors.

关键词： field programmable gate arrays Computer architecture Bridges IP networks Software Bandwidth Registers

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High Speed Video Processing Using Fine-Grained Processing on fpga Platform

High Speed Video Processing Using Fine-Grained Processing on...

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Annual IEEE symposium on field-programmable Custom Computing Machines (FCCM)

作者： Zhi Ping Ang Akash Kumar Yajun Ha Department of Electrical & Computer Engineering National University of Singapore Singapore

This summary paper 1 proposes an fpga-based array processor which performs Laplacian filtering on a 40 by 40 pixel grayscale video. The architecture comprises of bit-serial pixel processors interconnected to give a two-dimensional mesh array. This architecture features the novel use of partial reconfiguration which transfers data to and fro the array. Each processor occupies a configurable logic block and achieves a target frame rate of 10000 frames per second, at an operating frequency of 0.31 MHz on the Virtex-6 ML605 Evaluation Kit. The detailed correspondence between the contents of slice lookup tables and the Virtex-6 bitstream format is also documented.

关键词： arrays field programmable gate arrays Streaming media Laplace equations Table lookup Real-time systems

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Asynchronous approach to ring oscillator for fpga-based Physical Unclonable Function design

Asynchronous approach to ring oscillator for FPGA-based Phys...

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Midwest symposium on Circuits and Systems (MWSCAS)

作者： Roshan Silwal Mohammed Niamat Muslim Mustapa EECS Department The University of Toledo Toledo OH

This paper describes a technique that exploits the process variation in field programmable gate arrays (fpgas) in order to generate varying frequencies using asynchronous ring oscillators. To study its feasibility, Physical Unclonable Functions (PUFs) are implemented on fpgas for generating unique signatures based on different frequencies generated from oscillators. The variation in frequencies generated from identically laid-out oscillators across the device can generate unique signatures, which is used in device authentication and cryptographic applications.

关键词： Ring oscillators field programmable gate arrays Logic gates Table lookup Cryptography

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An Approach to a Fully Automated Partial Reconfiguration Design Flow

An Approach to a Fully Automated Partial Reconfiguration Des...

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Annual IEEE symposium on field-programmable Custom Computing Machines (FCCM)

作者： Kizheppatt Vipin Suhaib A. Fahmy School of Computer Engineering Nanyang Technological Univesity Singapore

Adoption of partial reconfiguration (PR) in mainstream fpga system design remains underwhelming primarily due the significant fpga design expertise that is required. We present an approach to fully automating a design flow that accepts a high level description of a dynamically adaptive application and generates a fully functional, optimised PR design. This tool can determine the most suitable fpga for a design to meet a given reconfiguration time constraint and makes full use of available resources. The flow targets adaptive systems, where the dynamic behaviour and switching order are not known up front.

关键词： field programmable gate arrays Adaptive systems Computer architecture Resource management Educational institutions Computers System analysis and design

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MIMO hardware simulator design for outdoor time-varying heterogeneous channels

MIMO hardware simulator design for outdoor time-varying hete...

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international symposium on Signals, Circuits and Systems (ISSCS)

作者： Bachir Habib Gheorghe Zaharia Ghaïs El Zein Institute of Electronics and Telecommunications of Rennes (IETR) Rennes France

This paper presents a hardware simulator of Multiple-Input Multiple-Output (MIMO) propagation channels. The hardware simulator reproduces a desired radio channel and makes it possible to test “on table” different MIMO systems. A specific architecture of the digital block of the simulator is presented to characterize an outdoor scenario for Long Term Evolution (LTE) systems. An algorithm is introduced to switch between the impulse responses and to control the time variation of the delays. The new architecture is designed on a Xilinx Virtex-IV field programmable gate Array (fpga). Its accuracy, occupation on the fpga and latency are analyzed.

关键词： MIMO Delays field programmable gate arrays Hardware Finite impulse response filters Signal to noise ratio Fading

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A Soft Coarse-Grained Reconfigurable Array Based High-level Synthesis Methodology: Promoting Design Productivity and Exploring Extreme fpga Frequency

A Soft Coarse-Grained Reconfigurable Array Based High-level ...

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Annual IEEE symposium on field-programmable Custom Computing Machines (FCCM)

作者： Cheng Liu Colin Lin Yu Hayden Kwok-Hay So Department of Electrical and Electronic Engineering University of Hong Kong Hong Kong China

Compared to the use of a typical software development flow, the productivity of developing fpga-based compute applications remains much lower. Although the use of high-level synthesis (HLS) tools may partly alleviate this shortcoming, the lengthy low-level fpga implementation process remains a major obstacle to high productivity computing, limiting the number of compile-debug-edit cycles per day. Furthermore, high-level application developers often lack the intimate hardware engineering experience that is needed to achieve high performance on fpgas, therefore undermining their usefulness as accelerators. To address the productivity and performance problems, a HLS methodology that utilizes soft coarse-grained reconfigurable arrays (SCGRAs) as an intermediate compilation step is presented. Instead of compiling high-level applications directly to circuits, the compilation process is reduced to an operation scheduling task targeting the SCGRA.

关键词： field programmable gate arrays Design methodology Productivity Benchmark testing arrays Frequency synthesizers Educational institutions

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Hardware-software extensions to a softcore processor for fpga-based adaptive PID control

Hardware-software extensions to a softcore processor for FPG...

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IEEE international symposium on Industrial Electronics (ISIE)

作者： T. Gomes P. Garcia S. Pinto F. Salgado J. Cabral J. Monteiro A. Tavares Centro Algoritmi University of Minho Portugal

ISBN: (纸本)9781467351942

Embedded Systems were traditionally implemented as a microprocessor surrounded by on-board peripherals, specifically assembled for a given application. Several Commercial Off-The Shelf solutions already provide a variety of on-chip custom modules, which allow a higher performance, smaller power consumption solution for a variety of applications. The advent of field programmable gate arrays (fpga) allowed custom chips to be designed on a per-application basis, with fine-grain control over hardware/software partitioning. This paper presents a case study about the integration of an adaptive control system on a softcore processor. An MRAC-PID custom hardware module was developed and implemented on fpga, taking advantage of the extensibility capabilities of the utilized softcore. Results demonstrate how software to hardware migration can accelerate system performance and maximize application parallelism.

关键词： Hardware Software field programmable gate arrays Process control Software algorithms Conferences Control systems

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Architecture and Implementation of a Development Board for Low-Power Education

Architecture and Implementation of a Development Board for L...

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IEEE international symposium on Circuits and Systems

作者： Marco Winzker Andrea Schwandt Tobias Krumkamp Alexander Tieke Institute of Visual Computing Bonn-Rhine-Sieg University Sankt Augustin Germany

ISBN: (纸本)9781467357609

Education in low-power digital design is a topic within the context of a state-of-the-art electrical engineering curriculum. In this contribution, a development board for use in hands-on lab experiments on power dissipation in digital circuits is described. This board can send a video signal to a field-programmable gate array (fpga), which students can then program using various signal processing applications. Implementations with different complexity and circuit structures and their power dissipation can be comparatively observed by the students. A prototype of this development board is being manufactured and will be used in hands-on laboratory sessions and projects.

关键词： Low-Power Education fpga Development Board field programmable gate arrays Board Power dissipation Video signals LOW POWER ARCHITECTURE Building construction Education digital circuits

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