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international conference on hardware/software codesign and system synthesis

International Conference on Hardware/Software Codesign and S...

引用

international conference on hardware/software codesign and system synthesis (codes)

Presents the title -page of the proceedings record.

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codes+isss'04 Organizing Committee

CODES+ISSS'04 Organizing Committee

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international conference on hardware/software codesign and system synthesis (codes)

Provides a listing of current committee members.

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international conference on hardware/software codesign and systems synthesis (IEEE Cat. No.04TH8785)

International Conference on Hardware/Software Codesign and S...

引用

international conference on hardware/software codesign and system synthesis (codes)

The following topics are dealt with: organic computing; design techniques for application specific processors; advances in software and hardware synthesis techniques for DSP applications; multiprocessor SoC design strategies and programming models; energy-aware compiling and scheduling; system-level design space exploration for hardware-software partitioning and platform instantiation; estimation and design techniques for energy-efficient memory systems; advances in hardware/software co-simulation techniques; NoC design and optimisation; software and hardware techniques for performance optimisation of embedded applications; techniques for security and reliability enhancement in embedded systems; and on-chip communication architecture analysis and optimisation.

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Embedded systems education: How to teach the required skills?

Embedded systems education: How to teach the required skills...

引用

international conference on hardware/software codesign and system synthesis (codes)

作者： P. Marwedel D. Gajski E. De Kock H. De Man M. Sami I. Soderquist University of Dortmund Germany University of California Irvine USA Phillips Netherlands KU Leuven Belgium Saab Sweden

The goal of this panel is to contrast existing approaches to embedded system education with the needs in industry. Embedded system design is currently not yet well represented in academic programs. The general trend toward embedded systems requires a drastic change of that situation. This panel aims at starting a discussion on how current curricula should he revised in order to take the requirements of modem technologies into account.

关键词： Embedded system Educational programs hardware Application software Modems Communication system software Multimedia systems Streaming media software algorithms Algorithm design and analysis

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Current flattening in software and hardware for security applications 04

Current flattening in software and hardware for security app...

引用

international conference on hardware/software codesign and system synthesis (codes)

作者： R. Muresan C. Gebotys University of Guelph Guelph ONT Canada University of Waterloo Waterloo ONT Canada

ISBN: (纸本)9781581139372

This work presents a new current flattening technique applicable in software and hardware. This technique is important in embedded cryptosystems since power analysis attacks (that make use of the current variation dependency on data and program) compromise the security of the system. The technique flattens the current internally by exploiting current consumption differences at the instruction level. Code transformations supporting current variation reductions due to program dependencies are presented. Also, real-time hardware architecture capable of reducing the current to data and program dependencies is proposed. Measured and simulated current waveforms of cryptographic software are presented in support of these techniques.

关键词： hardware Application software Energy consumption Elliptic curve cryptography Public key cryptography Timing Data security Protocols Power system security Information analysis

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Exploiting polymorphism in HW design: a case study in the ATM domain 04

Exploiting polymorphism in HW design: a case study in the AT...

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international conference on hardware/software codesign and system synthesis (codes)

作者： L. Pomante CEFRIEL Milano Italy

ISBN: (纸本)9781581139372

The need of raising the level of abstraction and improving reuse in HW design suggests the adoption of an object-oriented (OO) design methodology based on systemC-Plus (i.e. an enhanced systemC). Such a methodology, developed during the ODETTE IST project, allows the exploitation of the key features of the OO paradigm (i.e. information hiding, inheritance, and polymorphism) at the behavioral level of description while guaranteeing synthesizability. In this context, the goal of This work is to highlight advantages and drawbacks derived from the exploitation of polymorphism in the design of an ATM component: the UTOPIA cells handler.

关键词： Computer aided software engineering Object oriented modeling Design methodology hardware High level synthesis Permission Process design Integrated circuit synthesis Algorithm design and analysis Integrated circuit technology

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RTOS-centric hardware/software cosimulator for embedded system design 04

RTOS-centric hardware/software cosimulator for embedded syst...

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international conference on hardware/software codesign and system synthesis (codes)

作者： S. Honda T. Wakabayashi H. Tomiyama H. Takada Department of Information and Computer Science Toyohashi University of Technology Toyohashi Japan Graduate School of Information Science University of Nagoya Nagoya Japan

ISBN: (纸本)9781581139372

This work presents an RTOS-centric hardware/software cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is that it has a complete simulation model of an RTOS which is widely used in industry, so that application tasks including RTOS service calls are natively executed on a host computer. Our cosimulator also features cosimulation with functional simulation models of hardware written in C/C++ and cosimulation with HDL simulators. A case study with a JPEG decoder application demonstrates the effectiveness of our cosimulator.

关键词： Embedded software Embedded system Computational modeling Application software hardware design languages Permission Computer science Information science Computer simulation Computer industry

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hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis 04

Hardware synthesis from coarse-grained dataflow specificatio...

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international conference on hardware/software codesign and system synthesis (codes)

作者： Hyunuk Jung Soonhoi Ha School of Electrical Engineering and Computer Science Seoul National University Seoul South Korea

ISBN: (纸本)1581139373

This work concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and DCT and a port in a block may consume multiple data samples per invocation, which distinguishes our approach from behavioral synthesis and complicates the problem. In the presented design methodology, a dataflow graph with specified algorithm can be mapped to various hardware structures according to the resource allocation and schedule information. This simplifies the management of the area/performance tradeoff in hardware design and widens the design space of hardware implementation of a dataflow graph compared with the previous approaches. Through experiments with some examples, the usefulness of the proposed technique is demonstrated.

关键词： hardware system-level design Flow graphs Design methodology Logic Permission Computer science Data flow computing Finite impulse response filter Discrete cosine transforms

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Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management 04

Parallel programming models for a multi-processor SoC platfo...

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international conference on hardware/software codesign and system synthesis (codes)

作者： P.G. Paulin C. Pilkington M. Langevin E. Bensoudane G. Nicolescu Central Research and Development STMicroelectronics Inc. Ottawa Canada Ecole Polytechnique de Montreal Montreal Canada

ISBN: (纸本)9781581139372

We describe the MultiFlex multi-processor SoC programming environment, with the focus on two programming models: a distributed system object component (DSOC) message passing model, and a symmetrical multi-processing (SMP) model using shared memory. The MultiFlex tools map these models onto the StepNP multi-processor SoC platform, while making use of hardware accelerators for message passing and task scheduling. We present the results of mapping an Internet traffic management application, running at 2.5 Gb/s.

关键词： Parallel programming Traffic control Message passing Delay Network-on-a-chip Context modeling hardware Research and development Programming environments Job shop scheduling

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Tuning SoC platforms for multimedia processing: identifying limits and tradeoffs 04

Tuning SoC platforms for multimedia processing: identifying ...

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international conference on hardware/software codesign and system synthesis (codes)

作者： A. Maxiaguine Yongxin Zhu Samarjit Chakraborty Weng-Fai Wong Computer Engineering and Networks Laboratory ETH Zürich Switzerland Department of Computer Science National University of Singapore Singapore

ISBN: (纸本)9781581139372

We present an analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing multimedia applications. "Configurations" in this case might include sizes of different on-chip buffers and scheduling mechanisms (or associated parameters) implemented on the different processing elements of the platform. Identifying such tradeoffs is difficult because of the bursty nature of on-chip traffic arising out of multimedia processing and the high variability in their execution requirements, which result in a highly irregular design space. We show that this irregularity in the design space can be precisely captured using an abstraction called variability characterization curves.

关键词： Processor scheduling Time division multiple access system-on-a-chip Multimedia systems Costs Permission hardware Computer networks Laboratories Computer science

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