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检索条件"任意字段=2016 Conference on Design and Architectures for Signal and Image Processing, DASIP 2016"

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Implementation of a Fast Fourier transform algorithm onto a manycore processor

Implementation of a Fast Fourier transform algorithm onto a ...

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conference on design and architectures for signal and image processing

作者： Julien Hascoet Jean-Francois Nezan Andrew Ensor Benoît Dupont de Dinechin Univcrsite Europeenne de Bretagne France Auckland University of Technology New Zealand Kalray INSA AUT Kalray

The Fourier transform is the main processing step applied to data collected from the Square Kilometre Array (SKA) receivers. The requirement is to compute a Fourier transform of 219 real byte samples in real-time, while minimizing the power consumption. We address this challenge by optimizing a FFT implementation for execution on the Kalray MPPA manycore processor. Although this processor delivers high floating-point performances, we use fixed-point number representations in order to reduce the memory consumption and the I/O bandwidth. The result is an execution time of 1,07ms per FFT, including data transfers. This enables to use only two first-generation MPPA chips per flow of data coming from the receivers, for a total power consumption of 17.4W.

关键词： signal processing algorithms Parallel processing Arrays Fast Fourier transforms Receivers VLIW

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FPGA-based detection of QRS complexes in ECG signal

FPGA-based detection of QRS complexes in ECG signal

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conference on design and architectures for signal and image processing

作者： Amina El Hassen Aymeric Histace Mehdi Terosiet Olivier Romain ENSEA University of Cergy-Pontoise Cergy France

This paper presents an FPGA-based algorithm for automatic detection of QRS complexes in ECG signals. The proposed algorithm is divided into 3 blocks: Filtering, Contrast Enhancement, and finally a Detection block based on time and amplitude thresholding of the enhanced data. The entire detection scheme was developed in accordance with embedding constraints. For validation, the method was tested on the MIT/BIH arrhythmia database containing 48 records of 30-minutes ECG. The FPGA-based algorithm correctly detects 95,35 percent of the QRS complexes, with a very limited ratio of false detection (only 8%). These results are in accordance with the most recent state-of-the-art off-line algorithms on the same database, and improves significantly FPGA-based ones that were tested on a limited number of ECG extracted from the MIT/BIH set of data.

关键词： Electrocardiography Databases Field programmable gate arrays Standards Heart Muscles Computer architecture

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Analysis of adaptive filter and ICA for noise cancellation from a video frame

Analysis of adaptive filter and ICA for noise cancellation f...

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International conference on Intelligent Systems Engineering (ICISE)

作者： Atiq ur Rehman Fahad Khan Baber Khan Jadoon Department of Electrical Engineering COMSATS Institute of Information Technology Abbottabad Pakistan Department of Electronic Engineering International Islamic University Islamabad Pakistan

Noise cancellation algorithms have been frequently applied in many fields including image/video processing. Adaptive noise cancellation algorithms exploit the correlation property of noise and remove the noise from the input signal more effectively than non-adaptive algorithms. In this paper different noise cancellation techniques are applied to de-noise a video frame. Three different variants of gradient based adaptive filtering algorithms and independent component analysis (ICA) procedure are implemented and compared on the basis of signal to noise ratio (SNR) and computational time. The common algorithms used in adaptive filters are least mean square (LMS), normalized least means square (NLMS), and recursive least mean square (RLS). The simulation results demonstrates that NLMS algorithm is computationally efficient but cannot handle impulsive noise whereas LMS and RLS can perform better for long duration noise signals. The comparative analysis of adaptive filtering algorithms and ICA shows that ICA can perform better then all three iterative gradient based algorithms because of its non-iterative nature. For testing and simulations, three variants of white Gaussian noise (WGN) are used to corrupt the video frame.

关键词： Adaptive filters signal to noise ratio Noise cancellation Filtering algorithms Algorithm design and analysis MATLAB Filtering theory

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Sensor Fusion for Occupancy Detection and Activity Recognition using Time-of-Flight Sensors

Sensor Fusion for Occupancy Detection and Activity Recogniti...

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International conference on Information Fusion

作者： Tianna-Kaye Woodstock Richard J. Radke Arthur C. Sanderson Center for Lighting Enabled Systems and Applications (LESA) Troy NY 12180 USA

ISBN: (纸本)9781509020126

New technologies in lighting enable the design of illumination systems that autonomously meet the needs of occupants. In recent years, lighting design for both commercial and residential spaces has advanced beyond task performance, to a broader range of occupant needs including economic, energy and environmental constraints, architectural integration, human health, productivity, interpersonal communication, and aesthetic quality. Such systems require distributed sensing and control systems with sensory feedback to detect the lighting conditions in the space. Occupancy sensing and activity recognition are core components of this distributed sensor-based control system, and multisensor fusion of integrated sensors is viewed as a key attribute. This paper describes an expanded view of multisensor technologies, signal processing and pattern recognition algorithms that are being developed and evaluated for occupancy detection and activity recognition. This paper presents a multisensor testbed system that incorporates a sparse array of time-of-flight range sensors with pattern recognition algorithms for geometric form and motion detection of human occupants. Three levels of analysis are implemented: (1) Occupant detection and tracking, (2) Occupant pose classification (sitting, standing, and walking), (3) Occupant activity sequence recognition. These algorithms are dependent on statistical training of human pose and motion and implemented with a Bayesian formulation for detection, classification, and recognition. Evaluation of resulting performance in the testbed conference room demonstrates pose and activity recognition accuracy of greater than 97% for single occupants.

关键词： Lighting Thyristors Sensor arrays image color analysis Aerospace electronics avionics Lighting image colour analysis Thyristors Sensor arrays Sensor fusion Activity recognition control systems Vehicle Occupancy LIGHTING SYSTEMS Perspective drawings Geometric forms integrated sensor TIME OF FLIGHT

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Parallel implementation and performance evaluation of facial recognition algorithms using open source technologies

Parallel implementation and performance evaluation of facial...

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International conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)

作者： J. Suryaprasad D. S. Sandesh I. Priyanka G. N. Pravalika Aman Kumar PES Institute of Technology Bangalore India

ISBN: (纸本)9781467399401

Critical to any automated surveillance system is the recognition component. Since the inception of Pattern Recognition & image processing, researchers across the globe continue to propose newer facial recognition algorithms. Each of these facial algorithms has its own pros and cons. A typical facial recognition algorithm consists of three steps namely: facial detection, feature extraction and recognition. In this paper we discuss serial and parallel implementation of four standard facial recognition algorithms namely, Principal Component Analysis (PCA), Linear Discriminant Analysis (LDA), Independent Component Analysis (ICA) and FISHER Face. Work presented in this paper consists of two sections. In section 1, we discuss serial and parallel implementation of the algorithms. Section 2, presents a comparative performance analysis of the above 4 algorithms. A major challenge in this effort is the ability to explore and exploit concurrency in existing facial recognition algorithms to improve performance. Based on the algorithms performance, we have made few suggestions regarding the suitability of each of these algorithms for different domains/applications. All algorithms are implemented using open source OPENCV and OPENMP libraries.

关键词： Face recognition Principal component analysis Algorithm design and analysis Face signal processing algorithms Training Parallel processing

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13.5 A 4-antenna-path beamforming transceiver for 60GHz multi-Gb/s communication in 28nm CMOS

13.5 A 4-antenna-path beamforming transceiver for 60GHz mult...

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IEEE International conference on Solid-State Circuits (ISSCC)

作者： Giovanni Mangraviti Khaled Khalaf Qixian Shi Kristof Vaesen Davide Guermandi Vito Giannini Steven Brebels Fortunato Frazzica André Bourdoux Charlotte Soens Wim Van Thillo Piet Wambacq Interuniversitair Micro-Elektronica Centrum Leuven Vlaams-Brabant BE Vrije Universiteit Brussel Brussels Belgium Imec Heverlee Belgium

Millimeter-Wave transceivers with beamforming capabilities, such as the one presented in this work, are a key technology to reach 4 or 6Gb/s at 10m range with the IEEE 802.11ad standard. Moreover, for mm-Wave access in 5G it will also be necessary to boost peak data-rates far beyond 1Gb/s at hundreds of meters in small cells. Transceiver architectures with beamforming often combine superheterodyne with RF beamforming [1], leading to a high power consumption and a suboptimal RX noise figure due to losses in the beamforming circuitry. In contrast, the 57-to-66GHz TRX IC presented in this paper, whose architecture is depicted in Fig. 13.5.1, uses direct conversion and analog baseband beamforming. Direct-conversion radios are inherently simpler than superheterodyne and do not have to cope with the image frequency, but on the other hand they may suffer from pulling of the PA on the VCO. In this work this is avoided by the non-integer ratio of 2.5 between the operating frequency and the 24GHz PLL that subharmonically injection locks a 60GHz quadrature oscillator (Fig. 13.5.2).

关键词： Antenna measurements Array signal processing Baseband Antennas Phase locked loops Transceivers CMOS integrated circuits

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Session 4: signal processing on reconfigurable architectures

Session 4: Signal processing on reconfigurable architectures

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conference on design and architectures for signal and image processing

作者： Tomasz Kryjak AGH University of Science and Technology PL

The aim of this session is to present recent advances in signal processing implemented on field programmable reconfigurable arrays (FPGA) and coarse grained reconfigurable arrays (CGRA). In the first paper a hardware architecture of the Soft-output CANcellation (SCAN) algorithm used to decode polar codes is presented. This codes achieve the capacity of various communication channels for infinite code-lengths. The proposed design allows to obtain higher data rate than other solutions, as well as less decoding iterations. In the second paper a real-time FPGA module for automatic audio indexing is presented. It is based on the Mel-Frequency Cepstral Coefficients (MFCC) features. The Xilinx System Generator tool was used for implementation. Experiments proved that the system is able to provide an 80% classification accuracy for 4 music genres. In the last paper an IEEE-802.11a/g orthogonal frequency-division multiplexing receiver block for wireless communication systems is presented. It was implemented on CGRA processor/coprocessor model and synthesized for an FPGA device. The authors report speed-ups from x2.8 to x9.3 over RISC processors solutions.

关键词： Arrays Field programmable gate arrays Array signal processing Hardware Real-time systems Indexing

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Exploring the concurrent execution of HEVC intra encoding algorithms for heterogeneous multi core architectures

Exploring the concurrent execution of HEVC intra encoding al...

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conference on design and architectures for signal and image processing

作者： Jens Brandenburg Benno Stabernack Video Coding & Analytics Department Heinrich Hertz Institute Berlin Germany

By introducing novel algorithms in the emerging high efficiency video coding (HEVC) standard average bitrate savings of 23% have been achieved in comparison to the H.264/AVC high profile reference encoder for the all intra configuration at the cost of an additional complexity increase. This high algorithmic complexity requires the development and integration of innovative approaches, like different parallelization strategies, heterogeneous designs and/or algorithmic optimizations, resulting in a complex design space. Early design verifications as well as performance evaluations are crucial to realize successful solutions, which meet the functional and non-functional constrains respectively. In this paper we propose a SystemC based heterogeneous multi-core model of an HEVC intra encoder, which is used to explore different design aspects and alternatives. Due to its cycle accurate nature the model is well suited to facilitate various performance evaluations and to drive HW/SW co-optimizations of the explored system, as we will discuss in this paper.

关键词： Encoding Estimation Transforms Prediction algorithms Standards Algorithm design and analysis Optimization

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Fast and efficient signals recovery for deterministic compressive sensing: Applications to biosignals

Fast and efficient signals recovery for deterministic compre...

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conference on design and architectures for signal and image processing

作者： Andrianiaina Ravelomanantsoa Hassan Rabah Amar Rouane Institut Jean Lamour (IJL) UMR7198 Université de Lorraine Vandoeuvre-Les-Nancy France

Compressed sensing is a technique that is suitable for compressing and recovering signals having sparse representations in certain bases. Compressed sensing has been widely used to optimize the measurement process of power and bandwidth constrained systems like wireless body sensor network. The central issues with compressed sensing are mainly the construction of measurement matrices and the development of efficient recovery algorithms. In this paper, we proposed a simple and fast recovery algorithm which performed a thresholding in the discrete cosine transform domain. We validated it by recovering electrocardiogram and electromyogram signals taken from the Phyiobank database. The simulation and experimental results have shown that the proposed recovery algorithm was 25 and 12 times faster than orthogonal matching pursuit and stagewise orthogonal matching pursuit, respectively. In addition, depending on the compression ratio, the signal-to-noise ratio of recovered signals were improved up to 2 dB.

关键词： Discrete cosine transforms Atmospheric measurements Particle measurements Sparse matrices signal processing algorithms Matching pursuit algorithms

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Exploring custom heterogeneous MPSoCs for real-time neural signal decoding

Exploring custom heterogeneous MPSoCs for real-time neural s...

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conference on design and architectures for signal and image processing

作者： Paolo Meloni Giuseppe Tuveri Danilo Pani Luigi Raffo Francesca Palumbo Dipartimento Ingegneria Elettrica ed Elettronica Università degli Studi di Cagliari Cagliari Italy PolComIng - Gruppo Ingegneria dell'Informazione Università degli Studi di Sassari Sassari Italy

The design of embedded systems for neuroprosthetic applications represents an important challenge to be faced in electronic bioengineering. One of the key research problems is decoding the information encoded in neural signals to extract the patient's motion intention. How to implement a highly-portable and reliable integrated solution is still an open issue. In this paper, we investigate the possibility of adopting the MPSoC paradigm in this application domain, presenting a design space exploration that evaluates different custom MPSoC embedded architectures, implementing an on-line neural signal decoding algorithm. The evaluated design points feature different mappings of parallel software tasks onto customized ASIP processing cores. Experimental results, obtained by FPGA-based prototyping, assess the performance and hardware-related costs of the considered configurations. The clock frequency needed to respect real-time constraints was reduced to 22 MHz, making a step further towards the exploitation of custom heterogeneous MPSoCs for ultra-low power biomedical signal processing.

关键词： Sorting Program processors Decoding Real-time systems Computer architecture Noise reduction Algorithm design and analysis

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