The proceedings contain 25 papers. The topics discussed include: reconfigurable vision processing system for player tracking in indoor sports;enabling GPU software developers to optimize their applications - the LPGPU...
ISBN:
(纸本)9781538635346
The proceedings contain 25 papers. The topics discussed include: reconfigurable vision processing system for player tracking in indoor sports;enabling GPU software developers to optimize their applications - the LPGPU2approach;single-FPGA complete 3D and 2D medical ultrasound imager;hardware-based architecture for asymmetric numeral systems entropy decoder;parallel implementation of an iterative PCA algorithm for hyperspectral images on a manycore platform;detecting data-parallel synchronous dataflow graphs;the best of both: high-performance and deterministic real-time executive by application-specific multi-core SoCs;proposition and evaluation of a real-time generic architecture for a laser stripe detection system on FPGA;energy consumption characterization of a massively parallel processor array (MPPA) platform running a hyperspectral SVM classifier;model-driven reliability evaluation for MPSoC design;an efficient framework for design and assessment of arithmetic operators with reduced-precision redundancy;LibHSA: one step towards mastering the era of heterogeneous hardware accelerators using FPGAs;3D tomography back-projection parallelization on FPGAs using OpenCL;and demo: WIFI-WiMax vertical handover on an ARM-FPGA platform with partial reconfiguration.
The proceedings contain 21 papers. The topics discussed include: a new direct connected component labeling and analysis algorithms for GPUs;accelerating the inference phase in ternary convolutional neural networks usi...
ISBN:
(纸本)9781538682371
The proceedings contain 21 papers. The topics discussed include: a new direct connected component labeling and analysis algorithms for GPUs;accelerating the inference phase in ternary convolutional neural networks using configurable processors;real-time analysis of living biological cell activity;POLYBiNN: a scalable and efficient combinatorial inference engine for neural networks on FPGA;low power imageprocessing applications on FPGAs using dynamic voltage scaling and partial reconfiguration;efficient architecture for implementation of hermite interpolation on FPGA;efficient task-based code generation for SDF graph execution on multicore processors;and design flow for portable dataflow programming of heterogeneous platforms.
The proceedings contain 38 papers. The topics discussed include: efficient parallel architecture of an intra-only scalable multi-layer HEVC encoder;scalable HEVC decoder for mobile devices: trade-offs between energy c...
ISBN:
(纸本)9791092279153
The proceedings contain 38 papers. The topics discussed include: efficient parallel architecture of an intra-only scalable multi-layer HEVC encoder;scalable HEVC decoder for mobile devices: trade-offs between energy consumption and quality;analysis on scalability and energy efficiency of HEVC decoding using task-based programming model;ELM-based hyperspectral lmagery processor for onboard real-time classification;memory efficient multi-scale line detector architecture for retinal blood vessel segmentation;code generation for a SIMD architecture with custom memory organization;fuzzy logic modeling for objective image quality assessment;crosstalk-aware link power model for networks-on-chip;and custom processor design for efficient, yet flexible Lucas-Kanade optical flow.
The proceedings contain 45 papers. The topics discussed include: performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach;design...
ISBN:
(纸本)9781457706196
The proceedings contain 45 papers. The topics discussed include: performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach;design of a processor optimized for syntax parsing in video decoders;fast and accurate hybrid power estimation methodology for embedded systems;acceleration of image reconstruction in 3D ultrasound computer tomography: an evaluation of CPU, GPU and FPGA computing;DFG implementation on multi GPU cluster with computation-communication overlap;graphic rendering application profiling on a shared memory MPSoC architecture;pilot studies of wireless sensor networks: practical experiences;efficient FFT pruning algorithm for non-contiguous OFDM systems;designing processors using MAsS, a modular and lightweight instruction-level exploration tool;and optimization methodologies for complex FPGA-based signalprocessing systems with CAL.
The proceedings contain 24 papers. The topics discussed include: real-time correlation for locating systems utilizing heterogeneous computing architectures;FPGA based system for real-time structure from motion computa...
ISBN:
(纸本)9791092279108
The proceedings contain 24 papers. The topics discussed include: real-time correlation for locating systems utilizing heterogeneous computing architectures;FPGA based system for real-time structure from motion computation;exploring custom heterogeneous MPSoCs for real-time neural signal decoding;compa backend: a dynamic runtime for the execution of dataflow programs onto multi-core platforms;demonstrating an FPGA implementation of a full HD real-time HEVC decoder with memory optimizations for range extensions support;fast and accurate power estimation for application-specific instruction set processors using FPGA emulation;selecting most profitable instruction-set extensions using ant colony heuristic;hardware implementation of a soft cancellation decoder for polar codes;and FPGA-based real-time MFCC extraction for automatic audio indexing on FM broadcast data.
The proceedings contain 66 papers. The topics discussed include: a high performance and low energy intra prediction hardware for HEVC video decoding;design of fixed-point rounding operators for the VHDL-2008 standard;...
ISBN:
(纸本)9782953998726
The proceedings contain 66 papers. The topics discussed include: a high performance and low energy intra prediction hardware for HEVC video decoding;design of fixed-point rounding operators for the VHDL-2008 standard;investigating performance variations of an optimized GPU-ported granulometry algorithm;implementing large-kernel 2-D filters using impulse co-developer;partitioning and context switching for a reconfigurable FPGA-based dab receiver;an evaluation on using GPU co-processing for software radios on a low-cost platform;application-specific instruction processor for extracting local binary patterns;consumption analysis and estimation in the design of GStreamer based multimedia applications;flexible front-end processing for software defined radio applications using application specific instruction-set processors;and HLS-based fast design space exploration of ad hoc hardware accelerators: a key tool for MPSoC synthesis on FPGA.
The proceedings contain 12 papers. The topics discussed include: using time-of-flight sensors for people counting applications;CNN hardware acceleration on a low-power and low-cost APSoC;POLYCiNN: multiclass binary in...
ISBN:
(纸本)9781728140742
The proceedings contain 12 papers. The topics discussed include: using time-of-flight sensors for people counting applications;CNN hardware acceleration on a low-power and low-cost APSoC;POLYCiNN: multiclass binary inference engine using convolutional decision forests;mapping and frequency joint optimization for energy efficient execution of multiple applications on multicore systems;FPGA-Based acceleration of expectation maximization algorithm using high-level synthesis;SparseCCL: connected components labeling and analysis for sparse images;distilling the knowledge in CNN for WCE screening tool;real-time implementation of adaptive correlation filter tracking for 4K video stream in Zynq ultrascale+ MPSoC;and speeding-up CNN inference through dimensionality reduction.
The proceedings contain 38 papers. The topics discussed include: rakeness-based compressed sensing on ultra-low power multi-core biomedical processors;a wereable human activity recognition system on a chip;FPGA implem...
ISBN:
(纸本)9791092279054
The proceedings contain 38 papers. The topics discussed include: rakeness-based compressed sensing on ultra-low power multi-core biomedical processors;a wereable human activity recognition system on a chip;FPGA implementation of a flexible synchronizer for cognitive radio applications;hardware realization of an FPGA processor - operating system call offload and experiences;automatic generation of dataflow-based reconfigurable coprocessing units;closed-loop adaptive and stochastic prefetch mechanism for data array;a fast method for overflow effect analysis in fixed-point systems;self adaptive Harris corner detection on heterogeneous many-core processor;optimizing memory bandwidth in OpenVX graph execution on embedded many-core accelerators;and hardware-software implementation of vehicle detection and counting using virtual detection lines.
The proceedings contain 53 papers. The topics discussed include: high performance multi-standard architecture for DCT computation in H.264/AVC high profile and HEVC codecs;architecture and programming model support fo...
ISBN:
(纸本)9791092279016
The proceedings contain 53 papers. The topics discussed include: high performance multi-standard architecture for DCT computation in H.264/AVC high profile and HEVC codecs;architecture and programming model support for efficient heterogeneous computing on tightly-coupled shared-memory clusters;a neural model for hardware plasticity in artificial vision systems;system-level PMC-driven energy estimation models in RVC-CAL video codec specifications;a resource-aware nearest neighbor search algorithm for k-dimensional trees;accuracy and performance analysis of Harris corner computation on tightly-coupled processor arrays;a linear state model for PDR+WLAN positioning;SiPM based smart pixel for photon counting integrated streak camera;a coarse-grained reconfigurable wavelet denoiser exploiting the multi-dataflow composer tool;foreground object features extraction with GLCM texture descriptor in FPG;and noise-agnostic adaptive image filtering without training references on an evolvable hardware platform.
The proceedings contain 43 papers. The topics discussed include: an FPGA softcore based implementation of a bird call recognition system for sensor networks;a high-level language for programming a NoC-based dynamic re...
ISBN:
(纸本)9781424487356
The proceedings contain 43 papers. The topics discussed include: an FPGA softcore based implementation of a bird call recognition system for sensor networks;a high-level language for programming a NoC-based dynamic reconfiguration infrastructure;an in-band reconfigurable network node based on a heterogeneous platform;a new single-error correction scheme based on self-diagnosis residue number arithmetic;runtime adaptive allocation of dynamically mixed tasks on a heterogeneous MPSoC platform;energy modeling of the virtual memory subsystem for real-time embedded systems;wireless sensor network node global energy consumption modeling;camera-based system for tracking and position estimation of humans;designing dynamically reconfigurable SoCs: from UML MARTE models to automatic code generation;dynamically reconfigurable asynchronous processor for low power applications;and a hybrid dual-core reconfigurable processor for EBCOT Tier-1 encoder in JPEG2000 on next generation of digital cameras.
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