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检索条件"任意字段=2017 Conference on Design and Architectures for Signal and Image Processing, DASIP 2017"
891 条 记 录,以下是141-150 订阅
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design space exploration and implementation of RVC-CAL applications using the TURNUS framework
Design space exploration and implementation of RVC-CAL appli...
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2013 7th conference on design and architectures for signal and image processing, dasip 2013
作者: Casale-Brunet, S. Bezati, E. Alberti, C. Roquier, G. Mattavelli, M. Janneck, J.W. Boutellier, J. SCI-STI-MM Multimedia Group École Polytechnique Fédérale de Lausanne Switzerland Department of Computer Science Lund University Sweden Department of Computer Science and Engineering University of Oulu Finland
While research on the design of heterogeneous concurrent systems has a long and rich history, a unified design methodology and tool support has not emerged so far, and thus the creation of such systems remains a diffi... 详细信息
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Noise-agnostic adaptive image filtering without training references on an evolvable hardware platform
Noise-agnostic adaptive image filtering without training ref...
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2013 7th conference on design and architectures for signal and image processing, dasip 2013
作者: Mora, Javier Gallego, Ángel Otero, Andrés De La Torre, Eduardo Riesgo, Teresa Centro de Electrónica Industrial Universidad Politécnica de Madrid Madrid Spain
One of the main concerns of evolvable and adaptive systems is the need of a training mechanism, which is normally done by using a training reference and a test input. The fitness function to be optimized during the ev... 详细信息
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GPU architecture evaluation for multispectral and hyperspectral image analysis
GPU architecture evaluation for multispectral and hyperspect...
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作者: Fresse, Virginie Houzet, Dominique Gravier, Christophe Hubert Curien Laboratory UMR CNRS 5516 Université de Lyon F-42023 Saint-Etienne France CNRS UMR 5516 Laboratoire Hubert Curien F-42000 Saint-Etienne France Université de Saint-Etienne Jean-Monnet F-42000 Saint-Etienne France GIPSA Lab Grenoble-INP 961 rue de la Houille Blanche 38 St-Martin d'Heres Grenoble France TELECOM Saint-Etienne SATIN Équipe Associée de l'Institut TELECOM DIOM EA3523 F-42023A Saint-Etienne France
Graphical processing Units (GPU) architectures are massively used for resource-intensive computation. Initially dedicated to imaging, vision and graphics, these architectures serve nowadays a wide range of multi-purpo... 详细信息
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Accuracy and performance analysis of Harris corner computation on tightly-coupled processor arrays
Accuracy and performance analysis of Harris corner computati...
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2013 7th conference on design and architectures for signal and image processing, dasip 2013
作者: Sousa, Éricles Rodrigues Tanase, Alexandru Hannig, Frank Teich, Jürgen Hardware/Software Co-Design Department of Computer Science University of Erlangen-Nuremberg Germany
Nowadays, computer vision algorithms have countless application domains. On the one hand, these algorithms are typically computationally demanding, on the other hand, they are often used in embedded systems, which hav... 详细信息
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Fuzzy logic based objective image quality assessment with FPGA implementation
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JOURNAL OF SYSTEMS ARCHITECTURE 2018年 82卷 24-36页
作者: Tchendjou, Ghislain Takam Simeu, Emmanuel Alhakim, Rshdee Univ Grenoble Alpes TIMA F-38000 Grenoble France CNRS TIMA F-38000 Grenoble France
This paper analyzes the application of different machine learning techniques for objective image Quality Assessment (IQA), and proposes an implementation on Field Programmable Gate Array (FPGA) system of final model g... 详细信息
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Vehicle Speed Estimation with the Use of Gradient-Based image Conversion into Binary Form  21
Vehicle Speed Estimation with the Use of Gradient-Based Imag...
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conference on signal processing: Algorithms, architectures, Arrangements, and Applications (SPA)
作者: Czapla, Zbigniew Silesian Tech Univ Fac Transport Katowice Poland
The paper presents a new method of vehicle speed estimation using image data processing. The presented method employs conversion of greyscale input images into binary form. image conversion into binary form is based o... 详细信息
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Poster session: Dynamic architectures & adaptive management for image & signal processing
Poster session: Dynamic architectures & adaptive management ...
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conference on design and architectures for signal and image processing
Start of the above-titled section of the conference proceedings record.
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Special issue on design of algorithms and architectures for signal and image processing
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JOURNAL OF SYSTEMS ARCHITECTURE 2017年 79卷 16-17页
作者: Gorgon, Marek Cardoso, Joao M. P. Goehringer, Diana Indrusiak, Leandro Soares AGH Univ Sci & Technol Krakow Poland Univ Porto Oporto Portugal Ruhr Univ Bochum Bochum Germany Univ York York N Yorkshire England
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Power-Delay-Area Efficient design of Vedic Multiplier using Adaptable Manchester Carry Chain Adder  6
Power-Delay-Area Efficient Design of Vedic Multiplier using ...
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IEEE International conference on Communication and signal processing (ICCSP)
作者: Katreepalli, Raghava Haniotakis, Themistoklis Southern Illinois Univ Carbondale Dept Elect & Comp Engn Carbondale IL 62901 USA
Multipliers are basic building blocks for many arithmetic logic units, digital signal processors, coding theory units, communication systems, image processing systems etc. So multipliers designed with high speed and p... 详细信息
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Poster session: signal and image processing on GPU
Poster session: Signal and image processing on GPU
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conference on design and architectures for signal and image processing
Start of the above-titled section of the conference proceedings record.
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