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conference on design and architectures for signal and image processing

作者： Sylvain Huet Vincent Boulos Vincent Fristot Luc Salvo GIPSA-lab UMR5216 CNRS/INPG UJF U.Stendhal GRENOBLE France

Nowadays, it is possible to build a multi-GPU supercomputer, well suited for implementation of digital signal processing algorithms, for a few thousand dollars. However, to achieve the highest performance with this kind of architecture, the programmer has to focus on inter-processor communications, tasks synchronization ... In this paper, we propose a design flow allowing an efficient implementation of a Digital signal processing (DSP) application specified as a Data Flow Graph (DFG) on a multi GPU computer cluster. We focus particularly on the effective implementation of communications by automating the computation-communication overlap, which can lead to significant speedups as shown in the presented benchmark. The approach is validated on a 3D granulometry application developed for research on materials.

关键词： Graphics processing unit Kernel Computers Computer architecture Synchronization Instruction sets Digital signal processing

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Learning to Inpaint for image Compression 31

Learning to Inpaint for Image Compression

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31st Annual conference on Neural Information processing Systems (NIPS)

作者： Baig, Mohammad Harts Koltun, Vladlen Torresani, Lorenzo Dartmouth Coll Dept Comp Sci Hanover NH 03755 USA Intel Labs Santa Clara CA USA Dartmouth Coll Hanover NH 03755 USA

We study the design of deep architectures for lossy image compression. We present two architectural recipes in the context of multi-stage progressive encoders and empirically demonstrate their importance on compression performance. Specifically, we show that: (a) predicting the original image data from residuals in a multi-stage progressive architecture facilitates learning and leads to improved performance at approximating the original content and (b) learning to inpaint (from neighboring image pixels) before performing compression reduces the amount of information that must be stored to achieve a high-quality approximation. Incorporating these design choices in a baseline progressive encoder yields an average reduction of over 60% in file size with similar quality compared to the original residual encoder.

关键词： image compression

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High speed Fp multipliers and adders on FPGA platform

High speed Fp multipliers and adders on FPGA platform

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conference on design and architectures for signal and image processing

作者： Santosh Ghosh Debdeep Mukhopadhyay Dipanwita Roy Chowdhury Department of Computer Science & Engineering Indian Institute of Technology Kharagpur West Bengal India Department of Computer Science & Engineering Indian Institute of Technology Kharagpur Kharagpur West Bengal India

The paper proposes high speed FPGA implementations of adders and multipliers in F p . The work shows through experimental results that due to optimized addition chain available in such devices, Karatsuba decomposition upto a particular level improves the performance. Further the paper modifies existing interleaved multiplier using Montgomery ladder and the high speed adder circuits. Extensive experiments have been performed. The result shows that the proposed design provides 70% speedup from the best known designs.

关键词： Adders Field programmable gate arrays Algorithm design and analysis Performance evaluation Computer architecture Elliptic curves Registers

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A Novel Objective Function Based on a Generalized Kelly Criterion for Deep Learning 21

A Novel Objective Function Based on a Generalized Kelly Crit...

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conference on signal processing: Algorithms, architectures, Arrangements, and Applications (SPA)

作者： Fallah, Faezeh Tsanev, Doychin Mariyanov Yang, Bin Walter, Sven Bamberg, Fabian Univ Stuttgart Inst Signal Proc & Syst Theory Stuttgart Germany Univ Clin Tubingen Dept Diagnost & Intervent Radiol Tubingen Germany

ISBN: (纸本)9788362065301

Neural networks have demonstrated promising results for a wide range of applications. The proposed techniques employ different architectures and objective functions to adapt to the application while enabling a feasible implementation. Commonly used objective functions for network optimization are based on the cross entropy between the empirical distribution of the training data and the model distribution. Another approach uses the Dice coefficient to mitigate class imbalances without a need to sample reweighting. However, use of the Dice coefficient hinders backpropagation from the output of the softmax to the previous network layers. In this paper, we propose a novel objective function based on a generalized Kelly criterion for optimizing feed-forward neural networks. In each forward pass of a mini-batch through the network, this criterion determines the optimal bets (allocation fractions) of each sample for betting on multiple horses (classes) whose win probabilities are known. Then the network parameters get optimized by a minimization of the average unspent wealth (reserve rate) of the samples via backpropagation from the output of the softmax layer to the previous network layers. On a fully convolutional residual neural network, called V-net, the proposed function is evaluated against a weighted cross entropy-based and a Dice based objective function for automatic volumetric medical image segmentation. These evaluations are done after a dedicated hyperparameter optimization for each objective function. They reveal the superiority of the proposed method with regard to the classification accuracy and the convergence speed of the training.

关键词： Linear programming Optimization Resource management Training Backpropagation Neural networks Training data

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Dual-core reconfigurable demosaicing engine for next generation of portable camera systems

Dual-core reconfigurable demosaicing engine for next generat...

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conference on design and architectures for signal and image processing

作者： Xin Zhao Ying Yi Ahmet T Erdogan Tughrul Arslan School of Engineering Kings Buildings University of Edinburgh Edinburgh UK

This paper presents a high performance dual-core reconfigurable processor implementation methodology for a demosaicing system that targets next generation camera systems. The implementation methodology is based on dual-core architecture with coarse-grained dynamically reconfigurable processors. The demosaicing system adopts Freeman's algorithm that has been partitioned and mapped onto two customized and tailored heterogeneous processor cores. The demosaicing engine's implementation has been optimized by compilation techniques and special approaches for the targeting processor. Simulation results demonstrate that the resulting demosaicing system provides high throughput reaches up to 241.6Mpixels/s, which represents a 1.82x speedup compared to a single-core implementation.

关键词： image color analysis Pixel Pipeline processing Kernel Filtering Multicore processing

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Reversible Data Hiding for Compression-friendly image Encryption Method 9

Reversible Data Hiding for Compression-friendly Image Encryp...

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9th Annual Summit and conference of the Asia-Pacific-signal-and-Information-processing-Association (APSIPA ASC)

作者： Wong, KokSheik Kiya, Hitoshi Monash Univ Malaysia Sch Informat Technol Selangor Malaysia Tokyo Metropolitan Univ Fac Syst Design Tokyo Japan

ISBN: (纸本)9781538615423

This paper aims to add the data hiding capability to a compression-friendly image encryption method [1]. The data hiding method is designed to be commutative with the encryption method [1], and the resulting joint method is separable. Unlike the conventional histogram based methods where the image is processed entirely, the histogram of each non-overlapping image block is considered, where the block size coincides with the encryption block size. In addition, two ordering functions are proposed to facilitate the data hiding and extraction processes. Further constrains are imposed to ensure correct data extraction and reversibility. Experiment results suggest that the resulting joint method retains the compression-friendly feature of [1], with insignificant file size increment across all quality factors considered. In the best case scenario, 45765 bits could be hidden into the test image Airplane.

关键词： Data hiding reversible joint-method commutative separable

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A Greedy Approach for mmWave Hybrid Precoding with Subarray architectures 51

A Greedy Approach for mmWave Hybrid Precoding with Subarray ...

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51st IEEE Asilomar conference on signals, Systems, and Computers

作者： Iwanow, Marcin Vucic, Nikola Bazzi, Samer Luo, Jian Utschick, Wolfgang German Res Ctr Huawei Technol Munich Germany TUM Associate Inst Signal Proc Munich Germany

ISBN: (纸本)9781538618233

We consider a point-to-point mmWave link with hybrid digital-analog transceivers, where the analog stage is realized with a network of phase shifters. Moreover, we concentrate on a case particularly relevant from the practical perspective. Namely, we constrain the analog stage such that disjoint antenna subarrays are processed separately in the analog domain. In this work, a novel precoding and combining strategy is developed. In order to exploit the inherent modularity of the analog stage in the subarray architectures, we separate the design of the digital and analog processing and concentrate on the latter. Namely, for the design of the analog stage we propose a subspace arrangement based greedy algorithm.

关键词： Network architecture

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A Spectral Graph Based image Coding Method 25

A Spectral Graph Based Image Coding Method

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25th signal processing and Communications Applications conference (SIU)

作者： Yagan, Ali Cart Ozgen, Melanaet Tonkin Anadolu Univ Elekt Elekt Muhendisligi Bolumu Eskisehir Turkey

ISBN: (纸本)9781509064946

In this paper, a spectral graph based image coding method is proposed. In the proposed method, only the smoothing parameter in the graph adjacency matrix, graph Fourier transform (GFT) coefficients kept after hard thresholding and column indices of eigenvectors corresponding to kept coefficients are sent to the decoder side. It is advantageous in that this coding process is performed by sending much less information as compared to other graph based methods. Our results indicate that our proposed method enables image compression without deteriorating the visual quality by using very small numbers of GFT coefficients.

关键词： signal processing on graphs graph Fourier transform image coding

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Efficient Hardware architectures for 1D-and MD-LSTM Networks

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JOURNAL OF signal processing SYSTEMS FOR signal image AND VIDEO TECHNOLOGY 2020年第11期92卷 1219-1245页

作者： Rybalkin, Vladimir Sudarshan, Chirag Weis, Christian Lappas, Jan Wehn, Norbert Cheng, Li Tech Univ Kaiserslautern Kaiserslautern Germany Huawei Technol Co Ltd Chengdu Peoples R China

Recurrent Neural Networks, in particular One-dimensional and Multidimensional Long Short-Term Memory (1D-LSTM and MD-LSTM) have achieved state-of-the-art classification accuracy in many applications such as machine translation, image caption generation, handwritten text recognition, medical imaging and many more. However, high classification accuracy comes at high compute, storage, and memory bandwidth requirements, which make their deployment challenging, especially for energy-constrained platforms such as portable devices. In comparison to CNNs, not so many investigations exist on efficient hardware implementations for 1D-LSTM especially under energy constraints, and there is no research publication on hardware architecture for MD-LSTM. In this article, we present two novel architectures for LSTM inference: a hardware architecture for MD-LSTM, and a DRAM-based processing-in-Memory (DRAM-PIM) hardware architecture for 1D-LSTM. We present for the first time a hardware architecture for MD-LSTM, and show a trade-off analysis for accuracy and hardware cost for various precisions. We implement the new architecture as an FPGA-based accelerator that outperforms NVIDIA K80 GPU implementation in terms of runtime by up to 84x and energy efficiency by up to 1238x for a challenging dataset for historical document image binarization from DIBCO 2017 contest, and a well known MNIST dataset for handwritten digits recognition. Our accelerator demonstrates highest accuracy and comparable throughput in comparison to state-of-the-art FPGA-based implementations of multilayer perceptron for MNIST dataset. Furthermore, we present a new DRAM-PIM architecture for 1D-LSTM targeting energy efficient compute platforms such as portable devices. The DRAM-PIM architecture integrates the computation units in a close proximity to the DRAM cells in order to maximize the data parallelism and energy efficiency. The proposed DRAM-PIM design is 16.19 x more energy efficient as compared to FPGA implemen

关键词： Long short-term memory LSTM MD-LSTM 2D-LSTM FPGA DRAM processing-in-memory PIM Optical character recognition OCR MNIST DIBCO Zynq image binarization Hardware architecture Deep learning

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Dictionary design and disparity interpolation on distributed compressed sensing for light field image 9

Dictionary design and disparity interpolation on distributed...

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9th Annual Summit and conference of the Asia-Pacific-signal-and-Information-processing-Association (APSIPA ASC)

作者： Akiyoshi, Yusaku Sumi, Taichi Kuroki, Yoshimitsu Kurume Coll Natl Inst Technol Komorino 1-1-1 Kurume Fukuoka 8308555 Japan

ISBN: (纸本)9781538615423

This paper discusses two terms of distributed compressed sensing for multi-view point images generated with a light field camera. Our first discussion is on the performance of dictionary designed with ADMM (Alternating Direction Method of Multipliers) and that of K-SVD since reconstructed image quality depends on the dictionary. The second discussion is disparity interpolation of non-key frames. The interpolation accuracy contributes to reconstructed image quality and effective dictionary design. Then, this paper compares three disparity interpolation methods: the overlapped block matching, the conventional optical flow, and the TVL1-optical-flow. Experimental results show that the dictionary design with ADMM is faster than that with K-SVD whereas PSNR values using ADMM are slightly lower than those of K-SVD, and the TVL1-optical flow is the fastest holding the highest PSNR values.

关键词： Dictionaries Interpolation Convex functions Optical imaging Lenses Cameras Discrete cosine transforms

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