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检索条件"任意字段=2017 Conference on Design and Architectures for Signal and Image Processing, DASIP 2017"

共 891 条记录，以下是311-320 订阅

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Revisiting the design of Data Stream processing Systems on Multi-Core Processors 33

Revisiting the Design of Data Stream Processing Systems on M...

引用

IEEE 33rd International conference on Data Engineering (ICDE)

作者： Zhang, Shuhao He, Bingsheng Dahlmeier, Daniel Zhou, Amelie Chi Heinze, Thomas SAP Innovat Ctr Singapore Singapore Singapore Natl Univ Singapore Singapore Singapore INRIA Rennes France SAP SE Walldorf Walldorf Germany

ISBN: (纸本)9781509065431

Driven by the rapidly increasing demand for handling real-time data streams, many data stream processing (DSP) systems have been proposed. Regardless of the different architectures of those DSP systems, they are mostly aiming at scaling out using a cluster of commodity machines and built around a number of key design aspects: a) pipelined processing with message passing, b) on-demand data parallelism, and c) JVM based implementation. However, there lacks a study on those key design aspects on modern scale-up architectures, where more CPU cores are being put on the same die, and the on-chip cache hierarchies are getting larger, deeper, and complex. Multiple sockets bring non-uniform memory access (NUMA) effort. In this paper, we revisit the aforementioned design aspects on a modern scale-up server. Specifically, we use a series of applications as micro benchmark to conduct detailed profiling studies on Apache Storm and Flink. From the profiling results, we observe two major performance issues: a) the massively parallel execution model causes serious front-end stalls, which are a major performance bottleneck issue on a single CPU socket, b) the lack of NUMA-aware mechanism causes major drawback on the scalability of DSP systems on multi-socket architectures. Addressing these issues should allow DSP systems to exploit modern scale-up architectures, which also benefits scaling out environments. We present our initial efforts on resolving the above-mentioned performance issues, which have shown up to 3.2x and 3.1x improvement on the performance of Storm and Flink, respectively.

关键词： Digital signal processing Sockets Storms Message passing Parallel processing Pipelines Multicore processing

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ADAPTIVE THRESHOLDING HOSVD ALGORITHM WITH ITERATIVE REGULARIZATION FOR image DENOISING 24

ADAPTIVE THRESHOLDING HOSVD ALGORITHM WITH ITERATIVE REGULAR...

引用

24th IEEE International conference on image processing (ICIP)

作者： Movchan, Rodion Shen, Zhengwei Univ Sci & Technol Beijing Sch Math & Phys Beijing 100083 Peoples R China

ISBN: (纸本)9781509021758

In this paper, we propose a very simple 3D patch stack based image denoising method by Higher Order Singular Value Decomposition (HOSVD). We used the idea of iterative regularization from spatially adaptive iterative singular-value thresholding(SAIST) to design our algorithm, which indicates more faster convergence speed than some other methods. By using the parallel computing technique for implementing the algorithm, the computational complexity is highly reduced. The experiments also show good PNSR result with different noise levels.

关键词： Nonlocal self-similarity HOSVD Adaptive iterative singular-value thresholding image denoising

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CLOSED-FORM SOLUTION TO DIRECTLY design FREQUENCY MODULATED WAVEFORMS FOR BEAMPATTERNS 5

CLOSED-FORM SOLUTION TO DIRECTLY DESIGN FREQUENCY MODULATED ...

引用

5th IEEE Global conference on signal and Information processing (GlobalSIP)

作者： Ahmed, Sajid Jardak, Seifallah Alouini, Mohamed-Slim ITU Elect Engn Dept Lahore Pakistan King Abdullah Univ Sci & Technol Elect Engn Program Thuwal Saudi Arabia KAUST Thuwal Saudi Arabia Informat Technol Univ Lahore Pakistan

ISBN: (纸本)9781509059904

The targets image performance depends on the transmit beampattern and power-spectral-density of the probing signal. To design such probing signals for multiple-input multiple output (MIMO) radar, conventional algorithms are iterative in nature, therefore high computational complexity restricts their use in real time applications. In this paper, to achieve the desired beampattern, a novel closed-form algorithm to design frequency-modulated (FM) waveforms for MIMO radar is proposed. The proposed algorithm has negligible computational complexity and yields unity peak-to-average power ratio constant envelope waveforms. Moreover, in contrast to the narrow band algorithms, it has almost flat main and side lobes. In the proposed algorithm, a relationship between the width of symmetric beampattern and the product of initial frequency and duration of the baseband FM waveforms is developed.

关键词： Beamforming Frequency-modulated waveforms Discrete-Fourier-transform Software radar

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FPGA implementations of HEVC Inverse DCT using high-level synthesis

FPGA implementations of HEVC Inverse DCT using high-level sy...

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conference on design and architectures for signal and image processing

作者： Ercan Kalali Ilker Hamzaoglu Faculty of Engineering and Natural Sciences Sabanci University Istanbul Tuzla Turkey

High Efficiency Video Coding (HEVC), the recently developed international video compression standard, has 50% better video compression efficiency than H.264 video compression standard at the expense of significantly increased computational complexity. HEVC Inverse Discrete Cosine Transform (IDCT) algorithm accounts for 11% of the computational complexity of an HEVC video encoder. Recently, commercial and academic high-level synthesis (HLS) tools are started to be successfully used for FPGA implementations of digital signal processing algorithms. Therefore, in this paper, the first FPGA implementations of HEVC 2D IDCT algorithm using HLS tools in the literature are proposed. The proposed HEVC IDCT hardware are implemented on Xilinx FPGAs using three HLS tools; Xilinx Vivado HLS, LegUp, MATLAB Simulink HDL Coder. Using HLS tools significantly reduced the FPGA development time, and the resulting FPGA implementations achieved real-time performance. Therefore, HLS tools can be used for FPGA implementation of HEVC video encoder.

关键词： Hardware design languages Field programmable gate arrays MATLAB Standards Video compression Discrete cosine transforms

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Traffic Density Analysis using Traffic Camera images 25

Traffic Density Analysis using Traffic Camera Images

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25th signal processing and Communications Applications conference (SIU)

作者： Atvar, Anil Artan, Yusuf Oguzhan Ozturk, Safak HAVELSAN AS Algilayicilar Goruntu & Sinyal Isleme Grubu Ankara Turkey

ISBN: (纸本)9781509064946

Video Analytics on low/high resolution security camera images has received a considerable interest in recent years. Traffic density estimation from traffic camera images can be considered as one of these subjects. Traditionally GPS data from commercial vehicle Fleets have been utilized to estimate traffic density on roads. Traffic density estimation has been implemented using image processing and classification algorithms on traffic camera images. In this study, we propose a simple method that does not require high computational processing power to estimate traffic density on roads, unlike other studies in the literature.

关键词： Traffic image processing Filtering Classification

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Acceleration of image reconstruction in 3D ultrasound computer tomography: An evaluation of CPU, GPU and FPGA computing

Acceleration of image reconstruction in 3D ultrasound comput...

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conference on design and architectures for signal and image processing

作者： Matthias Birk Alexander Guth Michael Zapf Matthias Balzer Nicole Ruiter Michael Hübner Jürgen Becker Karlsruhe Institute of Technology Karlsruhe Germany

As today's standard screening methods frequently fail to diagnose breast cancer before metastases have developed, earlier breast cancer diagnosis is still a major challenge. Three-dimensional ultrasound computer tomography promises high-quality images of the breast, but is currently limited by a time-consuming synthetic aperture focusing technique based image reconstruction. In this work, we investigate the acceleration of the image reconstruction by a GPU, and by the FPGAs embedded in our custom data acquisition system. We compare the obtained performance results with a recent multi-core CPU and show that both platforms are able to accelerate processing. The GPU reaches the highest performance. Furthermore, we draw conclusions in terms of applicability of the accelerated reconstructions in future clinical application and highlight general principles for speed-up on GPUs and FPGAs.

关键词： Field programmable gate arrays Graphics processing unit image reconstruction Instruction sets Data acquisition Acceleration Kernel

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Fast image Segmentation for Local Feature Descriptors 25

Fast Image Segmentation for Local Feature Descriptors

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25th signal processing and Communications Applications conference (SIU)

作者： Celik, Ceyhun Bilge, Hasan Sakir Gazi Univ Bilgisayar Muhendisligi Ankara Turkey Gazi Univ Elekt Elekt Muhendisligi Ankara Turkey

ISBN: (纸本)9781509064946

Local feature descriptors are the most frequently used feature representation in many Computer Vision problems. In particular, high level semantic information extraction from low-level features in classification and retrieval is also quite successful. Region based approaches to classification and retrieval have become very popular. In this study, popular segmentation methods in the literature are investigated for the clustering of local feature descriptors and recently intensively used methods are used to group these features with a new perspective. Instead of all image pixels, segmentatiom is done using the pixels around the extracted features. It was observed that the proposed method in the obtained results made the similar segmentation process faster.

关键词： Local Feature Descriptors segmentation image classification image retrieval

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FPGA dynamic reconfiguration using the RVC technology: Inverse quantization case study

FPGA dynamic reconfiguration using the RVC technology: Inver...

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conference on design and architectures for signal and image processing

作者： Manel Hentati Yassine Aoudni Jean-François Nezan Mohamed Abid Olivier Deforges CES ENIS Engineering School Sfax Tunisia IETR INSA Rennes France

With the rapid evolution of technology, the latest FPGA architectures such as Virtex series of Xilinx introduced a new feature called Dynamic Partial Reconfiguration (DPR). This technique allows designer to configure a portion of the FPGA while other parts continue to run on the same FPGA. The design of an embedded system based on the DPR functionality is still complex and tedious. The MPEG consortium proposes the Reconfigurable Video Coding (RVC) technology. RVC provides a high level description of video decoders described as a set of interconnected Functional Units. This paper studies the use of the RVC technology for the specification of an application and the design of a system based on the DPR functionality. In this paper, we study the Inverse Quantization (IQ) algorithm of an MPEG-4 decoder and how to switch between the MPEG-2 and the H263 IQ algorithms using RVC and DPR. This simple and concrete case study highlights the DPR restrictions to take into account in MPEG RVC description in order to use the DPR.

关键词： Transform coding Field programmable gate arrays Quantization Decoding Algorithm design and analysis Hardware Computer architecture

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Video Quality Assessment Metrics for Infrared Video Frames using Different Edge Detection Algorithms 3

Video Quality Assessment Metrics for Infrared Video Frames u...

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3rd International conference on Current Trends in Computer, Electrical, Electronics and Communication, CTCEEC 2017

作者： Sai Prasad Reddy, K. Nagabhushan Raju, K. Department of Electronics Sri Krishnadevaraya University Anantapuramu India Department of Instrumentation Sri Krishnadevaraya University Anantapuramu India

ISBN: (纸本)9781538632420

Infrared signal processing algorithms and architectures are important for the development of a high performance infrared imaging systems. Infrared signal processing deals with two types of processing sensor signal processing and infrared image processing for contrast enhancement and target detection. The sensor signal processing primarily deals with non uniformity correction for infrared sensors. Assessing the quality of the Infrared video frame is a complex and firm process since human's opinion is affected by physical and psychological parameters. Infrared Video frame quality assessment plays an important role in the field of video processing. Structural Similarity Index has become a standard among image quality metrics. It is a framework for quality assessment based on the degradation of structural information of video frame. In this paper SSIM values are computed and compared for Infrared video frames by applying different edge detection approaches by using different color models to assess the quality of the frames. Experimental results comparisons demonstrate the effectiveness of the proposed method. © 2017 IEEE.

关键词： Video signal processing

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High level design of adaptive distributed controller for partial dynamic reconfiguration in FPGA

High level design of adaptive distributed controller for par...

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conference on design and architectures for signal and image processing

作者： Sana Cherif Chiraz Trabelsi Samy Meftali Jean-Luc Dekeyser INRIA Lille Nord Europe-LIFL CNRS USTL Villeneuve d'Ascq France

Controlling dynamic and partial reconfigurations becomes one of the most important key issues in modern embedded systems design. In fact, in such systems, the reconfiguration controller can significantly affect the system performances. Indeed, the controller has to handle efficiently three major tasks during runtime: observation (monitoring), taking reconfiguration decisions and notify decisions to the rest of the system in order to realize it. We present in this paper a novel high level approach permitting to model, using MARTE UML profile, modular and flexible distributed controllers for dynamic reconfiguration management. This approach permits components/ models reuse and allows systematic code generation. It consequently makes reconfigurable systems design less tedious and reduces time to market.

关键词： Unified modeling language Discrete cosine transforms Hardware Adaptation models Field programmable gate arrays Encoding

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