The Intelligent space Camera (ISC) is a compact space camera with embedded Computer Vision and Artificial Intelligence capabilities, that can address applications requiring high-throughput smart processing directly at...
The Intelligent space Camera (ISC) is a compact space camera with embedded Computer Vision and Artificial Intelligence capabilities, that can address applications requiring high-throughput smart processing directly at source. The camera, incorporating both hardware and software elements, is being developed in the frame of an ESA co-funded project to support space situational awareness, visual FDIR, and docking applications, among others. The camera, built around the Myriad X Vision processing Unit (VPU), supports RTSP streaming, H.265 encoding, dynamic remote reconfiguration, and in-line AI stream processing at framerate, all directly on-camera. processing results can be sent to the host as metadata or overlaid on the RTSP stream (e.g., as bounding boxes). This paper describes the system in its current form from a software and hardware point of view, as well as its key features and main use cases.
On-board payload dataprocessing can be performed by developing space-qualified heterogeneous Multiprocessor System-on-Chips (MPSoCs). We present key compute-intensive payload algorithms, based on a survey with space ...
On-board payload dataprocessing can be performed by developing space-qualified heterogeneous Multiprocessor System-on-Chips (MPSoCs). We present key compute-intensive payload algorithms, based on a survey with space science researchers, including the two-dimensional Fast Fourier Transform (2-D FFT). Also, we propose to perform design space exploration by combining the roofline performance model with High-Level Synthesis (HLS) for hardware accelerator architecture design. The roofline model visualizes the limits of a given architecture regarding Input/Output (I/O) bandwidth and computational performance, along with the achieved performance for different implementations. HLS is an interesting option in developing FPGA-based on-board processing applications for payload teams that need to adjust architecture specifications through design reviews and have limited expertise in Hardware Description Languages (HDLs). In this paper, we focus on an FPGA-based MPSoC thanks to recently released radiation-hardened heterogeneous embedded platforms.
The convergence of Artificial Intelligence (AI) with satellite technology is ushering in a new era of possibilities for space exploration. Onboard integration of AI emerges as a game-changer amidst the astonishing mat...
The convergence of Artificial Intelligence (AI) with satellite technology is ushering in a new era of possibilities for space exploration. Onboard integration of AI emerges as a game-changer amidst the astonishing maturation of AI and the rise of small satellites. However, designing Machine Learning (ML) models for onboard applications presents unique challenges that differ from their on-ground counterparts. This paper explores the underlying differences from a model-centric point of view, such as hardware integration, memory constraints, power consumption, and radiation effects. By addressing these critical challenges, this work aims to foster the growth and accessibility of the industry. The guidelines outlined in this paper distil insights and strategies from relevant publications to integrate neural networks (NNs) into satellites. Ultimately, the goal is to enable multi-disciplinary teams to collaborate throughout the entire production line, empowering the next generation of satellite technology. With the convergence of AI and satellite technology, the possibilities for space exploration are endless.
Upcoming space missions put new challenges in the domain of space – Ground communication, in terms of higher downlink data rates & data volumes, and usage of less reliable communication links. These challenges, t...
Upcoming space missions put new challenges in the domain of space – Ground communication, in terms of higher downlink data rates & data volumes, and usage of less reliable communication links. These challenges, together with the goal to facilitate the datahandling on Ground, pushed for the development and the usage of the File Based Operations (FBO) and protocols, like the CFDP, for automatic, selective retransmission of lost data. CO2M is the first Sentinels Mission to be launched, where the FBO and CFDP are implemented as per the Standards defined in the ESA Sentinel PUS-C Tailoring. Such protocols are used for the TC uplink, the Recorded HKTM downlink, and the Mission data downlink. The present paper deals with the consequent CO2M Satellite DHS peculiarities, in terms of architecture, data flow, and implemented Unit’s functionalities.
On-board dataprocessing design and image filtering for VESNA hyperspectral camera in the SLAVIA mission are presented. The mission description and requirements, onboard processing pipeline, and steps for creating an ...
On-board dataprocessing design and image filtering for VESNA hyperspectral camera in the SLAVIA mission are presented. The mission description and requirements, onboard processing pipeline, and steps for creating an artificial image dataset are explained.
Selecting the correct file system is critical for space applications where risks are present. This study systematically maps and tests Ext4 versus ZFS for onboard dataprocessing on the iX10-100 and iX5-100 payload pr...
Selecting the correct file system is critical for space applications where risks are present. This study systematically maps and tests Ext4 versus ZFS for onboard dataprocessing on the iX10-100 and iX5-100 payload processors. The test sets are presented along with results on several performance metrics. The conclusion is that both ZFS and Ext4 are useful, but based on certain considerations of onboard dataprocessing, Ext4 is better than the other.
COTS HW and SW components become crucial for advancing AI in space applications. The CAIRS21 ESA project considers Coral TPU as a candidate AI co-processor in avionics and examines its suitability in terms of performa...
COTS HW and SW components become crucial for advancing AI in space applications. The CAIRS21 ESA project considers Coral TPU as a candidate AI co-processor in avionics and examines its suitability in terms of performance, programmability/productivity, and radiation tolerance. The current paper focuses on our custom methodology for evaluating TPU, including TID and SEE effects. We assume representative AI benchmarks and irradiation profiles for LEO missions. We define a series of actions and measurements to derive thorough conclusions while avoiding increased time/budget procedures. Additionally, the paper summarizes key findings and a preliminary analysis of results from actual tests. Overall, TPU shows significant benefits when executing embedded AI, as well as promising Krad(Si) and SEE cross-section values.
We developed a heterogeneous simulation platform with a LEON5 processor and Dynamically Reconfigurable Processors (DRPs) for DESTINY+ science and technology demonstration mission. A LEON5 processor is implemented on a...
We developed a heterogeneous simulation platform with a LEON5 processor and Dynamically Reconfigurable Processors (DRPs) for DESTINY+ science and technology demonstration mission. A LEON5 processor is implemented on a Field Programmable Gate Array (FPGA), and IEEE Standard for a Real-Time Operating System (RTOS) for Small-Scale Embedded Systems is adopted on the processor. spaceWire, spaceFibre, and PCI Express interfaces are integrated with a router to enhance its simulation capability for the simulation of a whole satellite system. In addition to artificial intelligence processing capabilities of DRPs, interfaces for general purpose graphics processing units (GPGPUs) and vector processing units of super computers are also incorporated. We report the development result of the platform in this paper.
In this paper, we introduce Serval – a dataprocessing unit (DPU) which is designed for on-board data analysis, storage and handling with the use of specialized processing devices in a cold-redundant configuration. T...
In this paper, we introduce Serval – a dataprocessing unit (DPU) which is designed for on-board data analysis, storage and handling with the use of specialized processing devices in a cold-redundant configuration. The Serval’s architecture is built upon the Versal Adaptive Compute Acceleration Platform (ACAP)-based DPU. This DPU leverages the advantages of the Versal ACAP, including a lower power consumption in AI applications to support in-orbit operation.
This paper proposes an end-to-end data-processing chain for CubeSats, specifically for module development and validation. The proposed chain covers data acquisition, machine-learning-enabled on-board processing, stora...
This paper proposes an end-to-end data-processing chain for CubeSats, specifically for module development and validation. The proposed chain covers data acquisition, machine-learning-enabled on-board processing, storage, and data down-link. The authors demonstrate the feasibility of the proposed chain by implementing a prototype in a commercial-off-the-shelf CubeSat testbed. The dataprocessing chain is designed to be easily extendable and uses open-source software where possible to increase the accessibility of the solution and aid low-cost integration with future modules. Together with the CubeSat testbed, it offers a complete testing and validation environment for internal and external module developments. Therefore, it has the potential to significantly reduce the amount of work needed to integrate and test newly developed modules in a full CubeSat. Future work could include integrating high-speed, file-based downlink capabilities and extending the operational scenario in which the data-processing chain is operated to simulate a real-world scenario better and extend possible validation capabilities.
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