检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

821 篇 会议
31 篇 期刊文献

馆藏范围

852 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

408 篇 工学
- 392 篇 计算机科学与技术...
- 319 篇 软件工程
- 82 篇 电子科学与技术（可...
- 59 篇 电气工程
- 42 篇 信息与通信工程
- 39 篇 控制科学与工程
- 9 篇 动力工程及工程热...
- 7 篇 机械工程
- 7 篇 光学工程
- 5 篇 材料科学与工程（可...
- 5 篇 建筑学
- 4 篇 土木工程
- 4 篇 安全科学与工程
- 3 篇 仪器科学与技术
- 3 篇 化学工程与技术
- 3 篇 航空宇航科学与技...
- 2 篇 力学（可授工学、理...
- 2 篇 环境科学与工程（可...
- 2 篇 生物医学工程（可授...
99 篇 理学
- 58 篇 数学
- 37 篇 系统科学
- 17 篇 物理学
- 8 篇 统计学（可授理学、...
- 2 篇 化学
55 篇 管理学
- 45 篇 管理科学与工程(可...
- 15 篇 工商管理
- 13 篇 图书情报与档案管...
5 篇 法学
- 4 篇 社会学
- 1 篇 法学
3 篇 经济学
- 3 篇 应用经济学
1 篇 医学
1 篇 艺术学

主题

167 篇 hardware
94 篇 computer archite...
76 篇 embedded system
58 篇 application soft...
56 篇 permission
50 篇 embedded systems
47 篇 system-on-a-chip
45 篇 software
44 篇 algorithm design...
42 篇 computational mo...
41 篇 energy consumpti...
41 篇 field programmab...
35 篇 costs
34 篇 system-on-chip
32 篇 space exploratio...
30 篇 high level synth...
29 篇 system-level des...
27 篇 timing
26 篇 delay
25 篇 embedded softwar...

机构

8 篇 center for embed...
6 篇 school of comput...
6 篇 arizona state un...
6 篇 center for embed...
6 篇 department of co...
5 篇 school of inform...
5 篇 philips research...
5 篇 univ calif river...
5 篇 institute for in...
5 篇 department of el...
4 篇 department of co...
4 篇 university of er...
4 篇 tu braunschweig
4 篇 university of do...
4 篇 tensilica
4 篇 univ elect sci &...
4 篇 nec laboratories...
4 篇 philips research...
3 篇 integrated signa...
3 篇 east china norma...

作者

10 篇 ogras umit y.
9 篇 sri parameswaran
9 篇 nikil dutt
7 篇 rolf ernst
7 篇 parameswaran sri
7 篇 leupers rainer
6 篇 jiang wei
6 篇 dutt nikil
6 篇 robert p. dick
6 篇 mitra tulika
6 篇 rainer leupers
6 篇 andreas gerstlau...
5 篇 pasricha sudeep
5 篇 gerd ascheid
5 篇 greg stitt
5 篇 jinyu zhan
5 篇 umit y. ogras
5 篇 tei-wei kuo
5 篇 wei jiang
5 篇 yuan-hao chang

语言

849 篇 英文
3 篇 其他
1 篇 中文

检索条件"任意字段=2024 International Conference on Hardware/Software Codesign and System Synthesis"

共 852 条记录，以下是141-150 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Improving security and maintainability in modular embedded systems with hardware support: Work-in-progress 21

Improving security and maintainability in modular embedded s...

引用

2021 international conference on hardware/software codesign and system synthesis, CODES+ISSS 2021

作者： Malenko, Maja Ribeiro, Leandro Batista Baunach, Marcel Graz University of Technology Austria

ISBN: (纸本)9781450390767

The current trend of transforming static embedded systems into open platforms (in which several software providers are able to directly load their software) drives the need to design and implement modular embedded software. Additionally, a myriad of embedded devices are expected to operate and provide services for years, or even decades, while remaining correct and secure at all times. Therefore, one of the emerging challenges for highly adaptive embedded computing platforms is to offer dynamic software composition at runtime and internal device housekeeping, which in conjunction improve device maintainability. We propose a hardware/software co-designed technique to improve both security and maintainability in modular embedded systems. © 2021 ACM.

关键词： Embedded systems

来源：评论

学校读者我要写书评

暂无评论

A PCM Translation Layer for Integrated Memory and Storage Management 14

A PCM Translation Layer for Integrated Memory and Storage Ma...

引用

international conference on hardware / software codesign and system synthesis (CODES+ISSS)

作者： Chang, Bing-Jing Chang, Yuan-Hao Chang, Hung-Sheng Kuo, Tei-Wei Li, Hsiang-Pang Macronix Int Co Ltd Emerging Syst Lab Hsinchu Taiwan Natl Taiwan Univ Dept Comp Sci & Informat Engn Taipei Taiwan Acad Sinica Inst Informat Sci Taipei Taiwan Acad Sinica Res Ctr Informat Technol Innovat Taipei Taiwan

ISBN: (纸本)9781450330510

Phase change memory (PCM) is known for its potentials as main memory and as storage. In contrast to the past work, this work presents a PCM translation layer that considers how the main memory is used by the operating system together with the usage patterns of storage by trading their performance and reliability. In particular, a joint management scheme is proposed to improve the capability of PCM as both main memory and storage so as to enhance the performance of the entire system. The endurance issue of PCM for main memory is resolved by utilizing the potentially large capacity of the PCM storage space with limited modifications to the existing operating system implementations. Moreover, three commands are proposed to help operating system engineers to take advantage of PCM as main memory and storage by reducing I/O overheads and speeding up both the initialization and termination of program executions. The experimental results show that the performance of PCM as both main memory and storage can be significantly improved with reasonable lifetime, while the system overhead is very limited under coarse-grained wear leveling.

关键词： operating systems (computers) phase change memories program verification storage management I/O overheads PCM storage space PCM translation layer coarse-grained wear leveling integrated memory management integrated storage management joint management scheme operating system operating system implementations phase change memory program executions hardware Joints Memory management Operating systems Performance evaluation Phase change materials Random access memory Store management Operating systems Phase change memory main memory Pulse code modulation PROGRAM EXECUTION random access machine program verification Phase change materials Computer hardware Joints Joints Performance Evaluation

来源：评论

学校读者我要写书评

暂无评论

A low-cost memory architecture with NAND XIP for mobile embedded systems

A low-cost memory architecture with NAND XIP for mobile embe...

引用

1st IEEE/ACM/IFIP international conference on Hardward/software codesign and system synthesis

作者： Park, C Seo, J Bae, S Kim, H Kim, S Kim, B Samsung Elect Co Ltd Software Ctr Seoul 135893 South Korea

ISBN: (纸本)1581137427

NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and high density. Even though NAND flash memory is gaining popularity as data storage, it can be also exploited as code memory for XIP (execute-in-place). In this paper, we present a new memory architecture which incorporates NAND flash memory into an existing memory hierarchy for code execution. The usefulness of the proposed approach is demonstrated with real embedded workloads on a real prototyping board.

关键词： memory architecture NAND XIP priority-based caching

来源：评论

学校读者我要写书评

暂无评论

Robust hardware-software Co-simulation framework for design and validation of Hybrid systems 20

Robust hardware-software Co-simulation framework for design ...

引用

20th ACM-IEEE international conference on Formal Methods and Models for system Design (MEMOCODE)

作者： Sood, Surinder Malik, Avinash Roop, Partha Univ Auckland Dept Elect & Comp eng Auckland New Zealand

ISBN: (数字)9798350331905

ISBN: (纸本)9798350331905

Model based design of embedded controllers is prevalent across different industries. The final step in model based design is synthesis of hardware (or software) controller and then testing the synthesized controller in closed-loop with the plant model - this is termed as co-simulation. Standard cosimulation approaches use asynchronous communication fabric. However, they are known to suffer from race conditions, jitter, etc, making real-time property validation difficult. Current approaches to co-simulation problems either require complex middle-ware or require synthesis of the controller and plant for synchronous execution. However, these approaches are unsuited for hybrid system control design and validation, as they require the plant model to execute at an arbitrarily small simulation step, while the synthesized controller executes at its own rate if any. The small simulation step slows down the simulation and such a setup does not guarantee level crossing detection. In this paper, we propose a novel Metric Interval Temporal Logic (MITL) based validation and hardware in Loop (HIL) co-simulation framework, which synchronizes and integrates the controller synthesized in hardware and the plant executing in software. A discrete controller handles a level crossing generated by the plant, which evolves on variable step size. The traces generated from the closed-loop operation of the overall system are used to validate MITL properties. Finally, the controller hardware and the plant model are adjoined via a communication architecture, whose sample time is dependent upon the robustness estimates of the MITL properties, which is necessary to guarantee validation correctness.

关键词： Co-simulation MITL Robustness validation Hybrid Automata (HA)

来源：评论

学校读者我要写书评

暂无评论

Meta-Chain: User-Aware Cross-Layer Space Allocation Strategy for Blockchain Storage systems: Work-in-Progress

Meta-Chain: User-Aware Cross-Layer Space Allocation Strategy...

引用

international conference on hardware/software codesign and system synthesis (CODES+ISSS)

作者： Liao, Jing Li, Zhengda Wang, Yi Shenzhen Univ Coll Comp Sci & Software Engn Shenzhen Peoples R China Shenzhen Univ Natl Engn Lab Big Data Syst Comp Technol Shenzhen Peoples R China

ISBN: (纸本)9781728191980

Current LSM-Tree-based blockchain storage system will assign the data from multiple system users to the same disk drive. This will lead to the inefficient usage of physical spaces in disk and cause extra compaction operations for LSM-Tree. This paper presents Meta Chain, a user-aware cross-layer space allocation strategy for blockchain storage systems. As a cross-layer design, Meta-Chain redesigns the organization of LSM-Tree and utilizes the rich functionalities provided by open-channel SSD. Experimental results show that Meta-Chain can effectively reduce write amplification and extend the lifetime of SSD in comparison with representative schemes.

关键词： Blockchain Storage system LSM-Tree Flash Memory Space Allocation Address Translation

来源：评论

学校读者我要写书评

暂无评论

Dynamic Property Mining for Embedded software 12

Dynamic Property Mining for Embedded Software

引用

10th ACM international conference on hardware/software-codesign and system synthesis

作者： Bonato, Marco Di Guglielmo, Giuseppe Fujita, Masahiro Fummi, Franco Pravadelli, Graziano Univ Verona Dept Comp Sci Str Grazie 15 I-37100 Verona Italy Univ Tokyo Japan Sci & Technol Agcy VLSI Design & Educ Ctr CREST Tokyo Japan

ISBN: (纸本)9781450314268

The importance of specification definition in the embedded-software design flow has been proven over the years. The entire design process relies on the specification quality, which inevitably depends on designer knowledge and skills. Automatic property mining is part of the efforts proposed to make this activity easier for the designers. Nonetheless, the existing approaches are limited to the detection of either arithmetic invariants of programs or temporal properties for Boolean designs, e.g., bit-level hardware descriptions. In this work, we present a dynamic mining approach able to infer linear temporal logic (LTL) properties for embedded software. The mined properties are in the form of temporal relationships between arithmetic expressions. The approach considers the execution traces only, thus it is completely independent from the code implementation. Experimental results demonstrate the effectiveness of the approach.

关键词： Temporal Property Dynamic Mining Embedded software

来源：评论

学校读者我要写书评

暂无评论

Hw/Sw codesign of embedded systems 4th

引用

4th international conference on Reliable software Technologies (Ada-Europe'99)

作者： Fornaciari, W Sciuto, D Politecn Milan Dipartimento Elettron & Informaz I-20133 Milan Italy

ISBN: (纸本)3540660933

The architecture of systems tailored for a specific application frequently requires cooperation among hardware and software components. The design of these systems is typically a compromise among a number of factors: cost, performance, size, development time, power consumption, etc. To cope with increasing possibilities offered by nowadays integration technology and steady demanding of shorter time-to-market, a comprehensive strategy aiming at gathering all the involved aspects of the design is becoming mandatory This new discipline, called codesign, considers in a concurrent manner all the activities involved in the design of a mixed hw/sw dedicated system: capturing of design specification and requirements, mapping of the design onto hardware and software domains, system synthesis and design verification. The paper introduces the key factors involved in the design of an embedded system, together with a description on how codesign is overcoming such problems, opening the way to a new generation of CAD frameworks supporting system-level design.

关键词： Embedded systems

来源：评论

学校读者我要写书评

暂无评论

Work-in-Progress: On Leveraging Approximations for Exact system-level Design Space Exploration

Work-in-Progress: On Leveraging Approximations for Exact Sys...

引用

ACM/IEEE international conference on hardware/software codesign and system synthesis (CODES+ISSS)

作者： Neubauer, Kai Haubelt, Christian Wanko, Philipp Schaub, Torsten Univ Rostock Rostock Germany Univ Potsdam Potsdam Germany

ISBN: (纸本)9781538655627

In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of embedded systems, however, results in a deterioration of the overall exploration performance. The DSE essentially consists of two parts: (1) the search for feasible solutions and (2) the evaluation of found feasible solutions. While the search has been massively improved by ASPmT-based strategies, the evaluation emerges as the main bottleneck. Tragically, evaluating bad solutions takes as much time as evaluating good ones. Hence, in this paper we study the utilization of approximations in the evaluation process integrated in an ASPmT-based DSE to identify bad solutions more quickly while still retaining the exact Pareto-front.

关键词： Design Space Exploration system-level Design Approximation

来源：评论

学校读者我要写书评

暂无评论

Deriving process networks from weakly dynamic applications in system-level design

Deriving process networks from weakly dynamic applications i...

引用

1st IEEE/ACM/IFIP international conference on Hardward/software codesign and system synthesis

作者： Stefanov, T Deprettere, E Leiden Univ Leiden Inst Adv Comp Sci Leiden Embedded Res Ctr NL-2300 RA Leiden Netherlands

ISBN: (纸本)1581137427

We present an approach to the automatic derivation of executable Process Network specifications from Weakly Dynamic Applications. We introduce the notions of Dynamic Single Assignment Code, Approximated Dependence Graph, and Linearly Bounded Sets to model and capture weakly dynamic (data-dependent) behavior of applications at the task-level of abstraction. Process Networks are simple parallel processing models that match the emerging multi-processor architectures in the sense that the mapping of Process Network specifications of applications onto multi-processor architectures can be done in a systematic and transparent way.

关键词： system-level design heterogeneous embedded systems kahn process networks weakly dynamic applications

来源：评论

学校读者我要写书评

暂无评论

Branch penalty reduction on IBM cell SPUs via software branch hinting 11

Branch penalty reduction on IBM cell SPUs via software branc...

引用

Embedded systems Week 2011, ESWEEK 2011 - 9th IEEE/ACM international conference on hardware/software-codesign and system synthesis, CODES+ISSS'11

作者： Lu, Jing Kim, Yooseong Shrivastava, Aviral Huang, Chuan Compiler Microarchitecture Lab Arizona State University Tempe AZ 85281 United States

ISBN: (纸本)9781450307154

As power-efficiency becomes paramount concern in processor design, architectures are coming up that completely do away with hardware branch prediction, and rely solely on software branch hinting. A popular example is the Synergistic Processing Unit (SPU) in the IBM Cell processor. To be able to minimize the branch penalty using branch hint instructions, in addition to estimating the branch probabilities (which has been looked at before [6, 25, 24]), it is important to carefully insert branch hints. Towards this, in this paper, we i) construct a branch penalty model for compiler, ii) formulate the problem of minimizing branch penalty using branch hinting and iii) propose a heuristic to solve this problem. The heuristic is based on three basic techniques that we introduce in this paper: NOP padding, hint pipelining, and nested loop restructuring. Experimental results on several benchmarks show that our solution can reduce the branch penalty as much as 35.4% over the previous approach. Copyright 2011 ACM.

关键词： Program compilers

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共86页 << < 11 12 13 14 15 16 17 18 19 20 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：