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检索条件"任意字段=2024 International Conference on Hardware/Software Codesign and System Synthesis"
853 条 记 录,以下是171-180 订阅
排序:
Parametric Scheduler Characterization
Parametric Scheduler Characterization
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Embedded systems Week / Int Conf on Compilers, Architecture, and synthesis for Embedded systems (CASES) / international conference on hardware/software codesign and system synthesis (CODES+ISSS) / Int Conf on Embedded software (EMSOFT)
作者: Van Pinxten, Joost Geilen, Marc Basten, Twan Oce Technol BV POB 101 NL-5900 MA Venlo Netherlands Eindhoven Univ Technol Groene Loper 19Flux 4-132 NL-5612 AZ Eindhoven Netherlands TNO ESI Eindhoven Netherlands
Schedulers assign starting times to events in a system such that a set of constraints is met and system productivity is maximized. We characterize the scheduler behaviour for the case where decisions are made by compa... 详细信息
来源: 评论
Polar: Function Code Aware Fuzz Testing of ICS Protocol
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ACM TRANSACTIONS ON EMBEDDED COMPUTING systemS 2019年 第5期18卷 1-22页
作者: Luo, Zhengxiong Zuo, Feilong Jiang, Yu Gao, Jian Jiao, Xun Sun, Jiaguang Tsinghua Univ Sch Software BNRist KLISS Beijing Peoples R China Villanova Univ Dept Comp Sci & Engn Villanova PA 19085 USA
Industrial Control system (ICS) protocols are widely used to build communications among system components. Compared with common internet protocols, ICS protocols have more control over remote devices by carrying a spe... 详细信息
来源: 评论
An Ultra-Low Energy Human Activity Recognition Accelerator for Wearable Health Applications
An Ultra-Low Energy Human Activity Recognition Accelerator f...
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Embedded systems Week / Int Conf on Compilers, Architecture, and synthesis for Embedded systems (CASES) / international conference on hardware/software codesign and system synthesis (CODES+ISSS) / Int Conf on Embedded software (EMSOFT)
作者: Bhat, Ganapati Tuncel, Yigit An, Sizhe Lee, Hyung Gyu Ogras, Umit Y. Arizona State Univ Sch Elect Comp & Energy Engn Tempe AZ 85287 USA Daegu Univ Sch Comp & Commun Engn Daegu 38453 South Korea
Human activity recognition (HAR) has recently received significant attention due to its wide range of applications in health and activity monitoring. The nature of these applications requires mobile or wearable device... 详细信息
来源: 评论
Work-in-Progress: EAST-DNN: Expediting Architectural SimulaTions Using Deep Neural Networks
Work-in-Progress: EAST-DNN: Expediting Architectural SimulaT...
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international conference on hardware/software codesign and system synthesis (CODES)
作者: Arko Dutt Govind Narasimman Lin Jie Vijay Ramaseshan Chandrasekhar Mohamed M. Sabry NTU Singapore A*STAR I2R Singapore
A rapid and accurate architectural simulator is a cornerstone for an emcient design-space exploration of computing systems. In this paper, we introduce EAST-DNN, a feed-forward deep neural network, to accelerate archi... 详细信息
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Deriving Equations from Sensor Data Using Dimensional Function synthesis
Deriving Equations from Sensor Data Using Dimensional Functi...
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Embedded systems Week / Int Conf on Compilers, Architecture, and synthesis for Embedded systems (CASES) / international conference on hardware/software codesign and system synthesis (CODES+ISSS) / Int Conf on Embedded software (EMSOFT)
作者: Wang, Youchao Willis, Sam Tsoutsouras, Vasileios Stanley-Marbell, Phillip Univ Cambridge 9 JJ Thomson Ave Cambridge CB3 0FA England
We present a new method for deriving functions that model the relationship between multiple signals in a physical system. The method, which we call dimensional function synthesis, applies to data streams where the dim... 详细信息
来源: 评论
Work-in-Progress: Drama: A High Efficient Neural Network Accelerator on FPGA using Dynamic Reconfiguration
Work-in-Progress: Drama: A High Efficient Neural Network Acc...
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international conference on hardware/software codesign and system synthesis (CODES)
作者: Yang Yang Chao Wang Xuehai Zhou University of Science and Technology of China Suzhou China
In this paper, we propose a high efficient neural network accelerator on FPGA by using dynamic reconfiguration, named Drama. Firstly, we design a high-efficient hardware architecture and provide a hardware template th... 详细信息
来源: 评论
Polar: Function Code Aware Fuzz Testing of ICS Protocol
Polar: Function Code Aware Fuzz Testing of ICS Protocol
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Embedded systems Week / Int Conf on Compilers, Architecture, and synthesis for Embedded systems (CASES) / international conference on hardware/software codesign and system synthesis (CODES+ISSS) / Int Conf on Embedded software (EMSOFT)
作者: Luo, Zhengxiong Zuo, Feilong Jiang, Yu Gao, Jian Jiao, Xun Sun, Jiaguang Tsinghua Univ Sch Software BNRist KLISS Beijing Peoples R China Villanova Univ Dept Comp Sci & Engn Villanova PA 19085 USA
Industrial Control system (ICS) protocols are widely used to build communications among system components. Compared with common internet protocols, ICS protocols have more control over remote devices by carrying a spe... 详细信息
来源: 评论
Work-in-Progress: A Simulation Framework for Domain-Specific system-on-Chips
Work-in-Progress: A Simulation Framework for Domain-Specific...
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international conference on hardware/software codesign and system synthesis (CODES)
作者: Samet E. Arda NK Anish A. Alper Goksoy Joshua Mack Nirmal Kumbhare Anderson L. Sartor Ali Akoglu Radu Marculescu Umit Y. Ogras School of Electrical Computer and Energy Engineering Arizona State University Tempe AZ USA Electrical and Computer Engineering The University of Arizona Tucson AZ USA Electrical and Computer Engineering Carnegie Mellon University Pittsburgh PA USA
Homogeneous general purpose processors provide flexibility to implement a variety of applications and facilitate programmability. In contrast, heterogeneous system-on-chips (SoCs) that combine general purpose and spec... 详细信息
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Work-in-Progress: A concept of a hardware design environment with the functional language Elixir
Work-in-Progress: A concept of a hardware design environment...
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international conference on hardware/software codesign and system synthesis (CODES)
作者: Hideki Takase Kentaro Matsui Yoshihiro Ueno Masakazu Mori Yuki Hisae Susumu Yamazaki JST PRESTO Japan Kyoto University Sakyo-ku Kyoto Japan Delight Systems Co. Ltd. Chuo-ku Fukuoka Japan Karabiner Technology Inc. Chuo-ku Fukuoka Japan The University of Kitakyushu Wakamatsu-ku Kitakushu Japan
The functional language Elixir is designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as F... 详细信息
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High-Level synthesis of Approximate Designs under Real-Time Constraints
High-Level Synthesis of Approximate Designs under Real-Time ...
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Embedded systems Week / Int Conf on Compilers, Architecture, and synthesis for Embedded systems (CASES) / international conference on hardware/software codesign and system synthesis (CODES+ISSS) / Int Conf on Embedded software (EMSOFT)
作者: Leipnitz, Marcos T. Nazar, Gabriel L. Univ Fed Rio Grande do Sul Informat Inst Av Bento Goncalves 9500 BR-91501970 Porto Alegre RS Brazil
The adoption of High-Level synthesis (HLS) has increased as the latest HLS tools have evolved to provide high-quality results while improving productivity and time-to-market. Concurrently, many works have been proposi... 详细信息
来源: 评论