检索结果-内蒙古大学图书馆

Awareness of MPI Virtual Process Topologies on the Single-Chip Cloud computer

Awareness of MPI Virtual Process Topologies on the Single-Ch...

26th IEEE international Parallel and Distributed Processing symposium (IPDPS) / Workshop on high performance Data Intensive computing

作者： Christgau, Steffen Schnor, Bettina Univ Potsdam Inst Comp Sci Potsdam Germany

ISBN: (纸本)9780769546766

This paper presents an approach to improve the communication bandwidth between MPI tasks by evaluating the application's communication graph and making optimal use of communication buffers. It was implemented on the Intel Single-Chip Cloud computer (SCC). The SCC is a processor with 48 cores created by Intel Labs. Special to the SCC is the SRAM-based Message Passing Buffer which can be used as fast communication memory. First, we evaluate RCKMPI, the MPI implementation for the SCC which makes use of this MPB. Then we extend RCKMPI to support virtual process topologies like defined in the MPI specification. The presented approach shows a performance improvement up to 44 % for a communication-intensive application.

关键词： Multicore MPI improvement Virtual Process Topology

来源：评论

学校读者我要写书评

暂无评论

Energy-Efficient Time Series Analysis Using Transprecision computing 32

Energy-Efficient Time Series Analysis Using Transprecision C...

引用

32nd IEEE international symposium on computer architecture and high-performance computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Fernandez, Ivan Quislant, Ricardo Gutierrez, Eladio Plata, Oscar Univ Malaga Dept Comp Architecture Malaga Spain

ISBN: (数字)9781728199245

ISBN: (纸本)9781728199245

Time series analysis is a key step in monitoring and predicting events over time in domains such as epidemiology, genomics, medicine, seismology, speech recognition, and economics. Matrix Profile has been recently proposed as a promising technique to perform time series analysis. For each subsequence, the matrix profile provides the most similar neighbour in the time series. This computation requires a huge amount of floating-point (FP) operations, which are a major contributor (approximate to 50%) to the energy consumption in modern computing platforms. Transprecision computing has recently emerged as a promising approach to improve energy efficiency and performance by tolerating some loss of precision in FP operations. In this work, we study how the matrix profile parallel algorithms benefit from transprecision computing using a recently proposed transprecision FPU. This FPU is intended to be integrated on embedded devices as part of RISC-V processors, FPGAs or ASICs to perform energy-efficient time series analysis. To this end, we propose an accuracy metric to compare the results with the double precision matrix profile. We use this metric to explore a wide range of exponent and mantissa combinations for a variety of datasets, as well as a mixed precision and a vectorized approach. Our analysis reveals that the energy consumption is reduced up to 3.3x compared with double precision approaches, while only slightly affecting the accuracy.

关键词： Time Series Analysis Transprecision computing Floating-Point Unit Vectorization

来源：评论

学校读者我要写书评

暂无评论

Speedup for Multi-Level Parallel computing

Speedup for Multi-Level Parallel Computing

引用

26th IEEE international Parallel and Distributed Processing symposium (IPDPS) / Workshop on high performance Data Intensive computing

作者： Tang, Shanjiang Lee, Bu-Sung He, Bingsheng Nanyang Technol Univ Sch Comp Engn Singapore 639798 Singapore

ISBN: (纸本)9780769546766

This paper studies the speedup for multi-level parallel computing. Two models of parallel speedup are considered, namely, fixed-size speedup and fixed-time speedup. Based on these two models, we start with the speedup formulation that takes into account uneven allocation and communication latency, and gives an accurate estimation. Next, we propose a high-level abstract case with providing a global view of possible performance enhancement, namely E-Amdahl's Law for fixed-size speedup and E-Gustafson's Law for fixed-time speedup. These two laws demonstrate seemingly opposing views about the speedup of multi-level parallel computing. Our study illustrates that they are not contradictory but unified and complementary. The results lead to a better understanding in the performance and scalability of multi-level parallel computing. The experimental results show that E-Amdahl's Law can be applied as a prediction model as well as a guide for the performance optimization in multi-level parallel computing.

关键词： E-Amdahl's Law E-Gustafson's Law Multi-Level Parallel computing

来源：评论

学校读者我要写书评

暂无评论

Java and grande applications

引用

computing IN SCIENCE & ENGINEERING 2003年第1期5卷 60-62页

作者： Fox, G

Soon after Java became popular for Internet applications, many other fields began looking at it. While Java's original thrust was client-side applets, today its dominant use is in large enterprise servers running business middleware. Its original client-side use is of secondary importance. Java for high-performance computing has been a popular issue and the subject of annual workshops over the last seven years, including the latest event, Java Grande ISCOPE, JGI'02, (http://***/javagrandeIscope/) held in Seattle from 3-5 November 2002. This meeting series joined forces with the international symposium on computing in Object-Oriented Parallel Environments (ISCOPE), aimed primarily at object-oriented methods in science and engineering with an emphasis on the use of C++.

关键词： Java Parallel processing Internet Optimizing compilers Scientific computing Libraries Robustness Web server computer aided instruction Arithmetic

来源：评论

学校读者我要写书评

暂无评论

OpenMP Offload Features and Strategies for high performance across architectures and Compilers

OpenMP Offload Features and Strategies for High Performance ...

引用

37th IEEE international Parallel and Distributed Processing symposium (IPDPS)

作者： Bhattacharjee, Arijit Daley, Christopher S. Jannesari, Ali Iowa State Univ Ames IA 50011 USA LBNL Berkeley CA USA

ISBN: (纸本)9798350311990

high performance accelerated computing has dawned in a new era of highly specialized code that depends on the target architecture. All the latest pre-exascale and exascale class supercomputers are accelerated systems. Efficient exploitation of the target architecture requires programming approaches that can take advantage of the characteristics of the hardware. OpenMP 4 introduced directives designed with the parallel architecture of GPUs in mind, but these directives are often different from those required for highest performance on CPUs. We demonstrate that by using newer OpenMP 5.0 offload features such as the loop directive and metadirective as well as profile guided strategies, we can achieve performance benefits with productivity gains. In this paper we experiment with HPGMG, a benchmark in the SPEChpc 2021 suite, to evaluate these newer directives versus OpenMP 4.5 directives, comparing performance, productivity and portability across architectural targets and production compilers on NERSC-9 Perlmutter. Our implementation gives up to a 2.74x speedup compared to the baseline performance on GPUs and a 4.4x speedup while running in host fallback mode. In addition, our implementation requires 66% fewer lines of code in the key kernels.

关键词： Clang HPGMG loop metadirective NVHPC OpenMP

来源：评论

学校读者我要写书评

暂无评论

high Volume Throughput computing: Identifying and Characterizing Throughput Oriented Workloads in Data Centers

High Volume Throughput Computing: Identifying and Characteri...

引用

26th IEEE international Parallel and Distributed Processing symposium (IPDPS) / Workshop on high performance Data Intensive computing

作者： Zhan, Jianfeng Zhang, Lixin Sun, Ninghui Wang, Lei Jia, Zhen Luo, Chunjie Chinese Acad Sci Inst Comp Technol State Key Lab Comp Architecture Beijing Peoples R China

ISBN: (纸本)9780769546766

For the first time, this paper systematically identifies three categories of throughput oriented workloads in data centers: services, data processing applications, and interactive real-time applications, whose targets are to increase the volume of throughput in terms of processed requests or data, or supported maximum number of simultaneous subscribers, respectively, and we coins a new term high volume throughput computing (in short HVC) to describe those workloads and data center systems designed for them. We characterize and compare HVC with other computing paradigms, e. g., high throughput computing, warehouse-scale computing, and cloud computing, in terms of levels, workloads, metrics, coupling degree, data scales, and number of jobs or service instances. We also preliminarily report our ongoing work on the metrics and benchmarks for HVC systems, which is the foundation of designing innovative data center systems for HVC workloads.

关键词： high volume throughput computing Throughput-oriented workloads Data center systems Metrics Benchmarks

来源：评论

学校读者我要写书评

暂无评论

Object Placement for high Bandwidth Memory Augmented with high Capacity Memory 29

Object Placement for High Bandwidth Memory Augmented with Hi...

引用

29th international symposium on computer architecture and high performance computing SBAC-PAD

作者： Laghari, Mohammad Unat, Didem Koc Univ Comp Sci & Engn Istanbul Turkey

ISBN: (纸本)9781509012336

high bandwidth memory (HBM) is a new emerging technology that aims to improve the performance of bandwidth-limited applications. Even though it provides high bandwidth, it must be augmented with DRAM to meet the memory capacity requirement of many applications. Due to this limitation, objects in an application should be optimally placed on the heterogeneous memory subsystems. In this study, we propose an object placement algorithm that places program objects to fast or slow memories in case the capacity of fast memory is insufficient to hold all the objects to increase the overall application performance. Our algorithm uses the reference counts and type of references (read or write) to make an initial placement of data. In addition, we perform various memory bandwidth benchmarks to be used in our placement algorithm on Intel Knights Landing (KNL) architecture. Not surprisingly high bandwidth memory sustains higher read bandwidth than write bandwidth, however, placing write-intensive data on HBM results in better overall performance because write-intensive data is punished by the DRAM speed more severely compared to read-intensive data. Moreover, our benchmarks demonstrate that if a basic block makes references to both types of memories, it performs worse than if it makes references to only one type of memory in some cases. We test our proposed placement algorithm with 6 applications under various system configurations. By allocating objects according to our placement scheme, we are able to achieve a speedup of up to 2x.

关键词： high bandwidth memory object placement MCDRAM DRAM KNL

来源：评论

学校读者我要写书评

暂无评论

performance Evaluation of Dynamic Cell Allocation Cache using Cycle Accurate Simulator 6

Performance Evaluation of Dynamic Cell Allocation Cache usin...

引用

6th international symposium on computing and Networking (CANDAR) - Across Practical Development and Theoretical Research

作者： Kitou, Masato Sasaki, Takahiro Ohno, Kazuhiko Mie Univ Grad Sch Engn Tsu Mie Japan Aichi Prefectural Univ Grad Sch Informat Sci & Technol Nagakute Aichi Japan

ISBN: (纸本)9781538691847

Multi-core processors are widely used to improve performance of computer systems. To achieve both high performance and low power consumption, we propose Cell allocation cache. It allocates cache spaces called 'Cell' which is smaller than a way and dynamically assigns it to a core. However, it is only evaluated with trace-driven simulation, so evaluations of execution speed and energy' consumption in realistic environments are not presented. In this paper, we implement Cell-allocation cache on the cycle accurate simulator Getn5 and evaluates more detailed performance. We also propose evaluation methodology by mixing plural benchmark programs to evaluate performance under unbalanced load works.

关键词： Cache high performance Multi-core Area Division

来源：评论

学校读者我要写书评

暂无评论

Designing high performance Heterogeneous Broadcast for Streaming Applications on GPU Clusters 28

Designing High Performance Heterogeneous Broadcast for Strea...

引用

28th IEEE international symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Chu, C. -H. Hamidouche, K. Subramoni, H. Venkatesh, A. Elton, B. Panda, D. K. Ohio State Univ Dept Comp Sci & Engn Columbus OH 43210 USA Engility Corp Dayton OH USA

ISBN: (纸本)9781509061082

high-performance streaming applications are beginning to leverage the compute power offered by graphics processing units (GPUs) and high network throughput offered by high performance interconnects such as InfiniBand (IB) to boost their performance and scalability. These applications rely heavily on broadcast operations to move data, which is stored in the host memory, from a single source-typically live-to multiple GPU-based computing sites. While homogeneous broadcast designs take advantage of IB hardware multicast feature to boost their performance, their heterogeneous counter-part requires an explicit data movement between Host and GPU, which significantly hurts the overall performance. There is a dearth of efficient heterogeneous broadcast designs for streaming applications especially on emerging multi-GPU configurations. In this work, we propose novel techniques to fully and conjointly take advantage of NVIDIA GPUDirect RDMA ( GDR), CUDA inter-process communication (IPC) and IB hardware multicast features to design high-performance heterogeneous broadcast operations for modern multi-GPU systems. We propose intra-node, topology-aware schemes to maximize the performance benefits while minimizing the utilization of valuable PCIe resources. Further, we optimize the communication pipeline by overlapping the GDR + IB hardware multicast operations with CUDA IPC operations. Compared to existing solutions, our designs show up to 3X improvement in the latency of a heterogeneous broadcast operation. Our designs also show up to 67% improvement in execution time of a streaming benchmark on a GPU-dense Cray CS-Storm system with 88 GPUs.

关键词： Graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

Design and Analysis of an APU for Exascale computing 23

Design and Analysis of an APU for Exascale Computing

引用

23rd IEEE international symposium on high performance computer architecture (HPCA)

作者： Vijayaraghavan, Thiruvengadam Eckert, Yasuko Loh, Gabriel H. Schulte, Michael J. Ignatowski, Mike Beckmann, Bradford M. Brantley, William C. Greathouse, Joseph L. Huang, Wei Karunanithi, Arun Kayiran, Onur Meswani, Mitesh Paul, Indrani Poremba, Matthew Raasch, Steven Reinhardt, Steven K. Sadowski, Greg Sridharan, Vilas Adv Micro Devices Inc AMD Res Sunnyvale CA 94088 USA Univ Wisconsin Dept Elect & Comp Engn Madison WI 53706 USA AMD Res Sunnyvale CA USA

ISBN: (纸本)9781509049851

The challenges to push computing to exaflop levels are difficult given desired targets for memory capacity, memory bandwidth, power efficiency, reliability, and cost. This paper presents a vision for an architecture that can be used to construct exascale systems. We describe a conceptual Exascale Node architecture (ENA), which is the computational building block for an exascale supercomputer. The ENA consists of an Exascale Heterogeneous Processor (EHP) coupled with an advanced memory system. The EHP provides a high-performance accelerated processing unit (CPU+GPU), in-package high-bandwidth 3D memory, and aggressive use of die-stacking and chiplet technologies to meet the requirements for exascale computing in a balanced manner. We present initial experimental analysis to demonstrate the promise of our approach, and we discuss remaining open research challenges for the community.

关键词： Supercomputers

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：