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检索条件"任意字段=2024 International Symposium on Computer Architecture and High Performance Computing Workshops"

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Decentralized in-order execution of a sequential task-based code for shared-memory architectures 36

Decentralized in-order execution of a sequential task-based ...

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36th IEEE international Parallel and Distributed Processing symposium (IEEE IPDPS)

作者： Castes, Charly Agullo, Emmanuel Aumage, Olivier Saillard, Emmanuelle Inria LaBRI Bordeaux France Ecole Polytech Fed Lausanne Lausanne Switzerland

ISBN: (纸本)9781665497473

The hardware complexity of modern machines makes the design of adequate programming models crucial for jointly ensuring performance, portability, and productivity in high-performance computing (HPC). Sequential task-based programming models paired with advanced runtime systems allow the programmer to write a sequential algorithm independently of the hardware architecture in a productive and portable manner, and let a third party software layer -the runtime system- deal with the burden of scheduling a correct, parallel execution of that algorithm to ensure performance. Many HPC algorithms have successfully been implemented following this paradigm, as a testimony of its effectiveness. Developing algorithms that specifically require fine-grained tasks along this model is still considered prohibitive, however, due to per-task management overhead [1], forcing the programmer to resort to a less abstract, and hence more complex "task+X" model. We thus investigate the possibility to offer a tailored execution model, trading dynamic mapping for efficiency by using a decentralized, conservative in-order execution of the task flow, while preserving the benefits of relying on the sequential taskbased programming model. We propose a formal specification of the execution model as well as a prototype implementation, which we assess on a shared-memory multicore architecture with several synthetic workloads. The results show that under the condition of a proper task mapping supplied by the programmer, the pressure on the runtime system is significantly reduced and the execution of fine-grained task flows is much more efficient.

关键词： Runtime Computational modeling Software algorithms computer architecture Programming Hardware Software

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international workshops which were held in conjunction with 28th European symposium on Research in computer Security, ESORICS 2023

International Workshops which were held in conjunction with ...

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international workshops which were held in conjunction with 28th European symposium on Research in computer Security, ESORICS 2023

ISBN: (纸本)9783031542039

The proceedings contain 29 papers. The special focus in this conference is on Research in computer Security. The topics include: Patient-Centric Health Data Sovereignty: An Approach Using Proxy Re-Encryption;privacySmart: Automatic and Transparent Management of Privacy Policies;try On, Spied On?: Privacy Analysis of Virtual Try-On Websites and Android Apps;integrally Private Model Selection for Support Vector Machine;differentially Private Traffic Flow Prediction Using Transformers: A Federated Approach;analyzing Continuous Ks-Anonymization for Smart Meter Data;towards Real-World Private Computations with Homomorphic Encryption: Current Solutions and Open Challenges;addShare: A Privacy-Preserving Approach for Federated Learning;secure Multiparty Sampling of a Biased Coin for Differential Privacy;METRICS: A Methodology for Evaluating and Testing the Resilience of Industrial Control Systems to Cyberattacks;transaction Fee Mechanism for Order-Sensitive Blockchain-Based Applications;comparison of Ethereum Smart Contract Analysis and Verification Methods;chaussette: A Symbolic Verification of Bitcoin Scripts;a Simple Single Slot Finality Protocol for Ethereum;timely Identification of Victim Addresses in DeFi Attacks;on the (Not So) Surprising Impact of Multi-Path Payments on performance And Privacy in the Lightning Network;creating Privacy Policies from Data-Flow Diagrams;up-to-Date Threat Modelling for Soft Privacy on Smart Cars;security and Privacy for Mobile Crowdsensing: Improving User Relevance and Privacy;review on Privacy and Trust Methodologies in Cloud computing;threat Analysis in Dairy Farming 4.0;overview of Social Engineering Protection and Prevention Methods;skade – A Challenge Management System for Cyber Threat Hunting;On the Usage of NLP on CVE Descriptions for Calculating Risk;Evaluation of an OPC UA-Based Access Control Enforcement architecture;HoneyEVSE: An Honeypot to Emulate Electric Vehicle Supply Equipments;not Only Security and Privacy: The Evolvin

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NUMA-Aware Dense Matrix Factorizations and Inversion with Look-Ahead on Multicore Processors 34

NUMA-Aware Dense Matrix Factorizations and Inversion with Lo...

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34th IEEE international symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Catalan, Sandra Igual, Francisco D. Rodriguez-Sanchez, Rafael Herrero, Jose R. Quintana-Orti, Enrique S. Univ Complutense Madrid Madrid Spain Univ Politecn Cataluna Barcelona Spain

ISBN: (数字)9781665451550

ISBN: (纸本)9781665451550

We address the efficient design and implementation of dense matrix factorizations and inversion (DMFI) on modern multicore processors with several NUMA (non-uniform memory access) nodes. Our approach enhances the DMFI routines with a look-ahead strategy, in order to overcome the "panel factorization bottleneck". In addition, it exploits both hybrid task- and loop-level parallelizations while taking into account the NUMA organization of the memory hierarchy. The experiments on a Huawei Kunpeng-based server, with two sockets and 48 cores per socket, for three representative dense linear algebra operations, expose the necessity of adapting both the codes and their execution environment parameters to improve data access locality. The results of these changes deliver performance across inter- and intra-socket NUMA configurations superior to that of reference implementations from state-of-the-art libraries for this platform.

关键词： Multicore processors NUMA dense linear algebra look-ahead multi-threaded parallelism high performance

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Speculative ECC and LCIM Enabled NUMA Device Core 3

Speculative ECC and LCIM Enabled NUMA Device Core

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3rd international symposium on computer Technology and Information Science, ISCTIS 2023

作者： Zhang, You Yang, Ke Wang, Yihan Yang, Pengyu Liu, Xiyuan University of Michigan Ann Arbor Electrical and Computer Engineering MI48109 United States

ISBN: (纸本)9798350325386

Advanced process technology allows high memory density while securing high bandwidth. However, the increasing disparity between the computing unit and memory known as the memory wall impedes applications like artificial intelligence (AI) related workloads. The larger area of the memory cell introduces more memory defects, and this causes a memory yield problem. Error-correction code (ECC) is a widely used technique in modern computer architecture for system robustness. The overhead introduced by ECC limits the performance in certain timing-critical applications, like caches. The real time ECC combined with in-memory computation shows great power in addressing the performance and power bottlenecks. This paper proposes a hardware architecture to support memory ECC speculative computing cache. The paper presents a memory structure that implements separate data memory and tag memory, breaking the serialization between data access and error detection. The data is fetched making the prediction that tag is correct and uncorrupted. The system is rolled back when the prediction is wrong. Further optimization involves in-memory computing, which saves memory bandwidth. The proposed ECC speculative computing cache also reduced power and area overhead by reusing the logic from the computing cache. © 2023 IEEE.

关键词： Memory architecture

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high performance binding affinity prediction with a Transformer-based surrogate model

High performance binding affinity prediction with a Transfor...

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1st international Conference on Smart Energy Systems and Artificial Intelligence (SESAI)

作者： Vasan, Archit Gokdemir, Ozan Brace, Alexander Ramanathan, Arvind Brettin, Thomas Stevens, Rick Vishwanath, Venkatram Argonne Natl Lab Lemont IL 60439 USA Univ Chicago Chicago IL 60637 USA

ISBN: (纸本)9798350364613;9798350364606

In the current paradigm of drug discovery pipelines, identification of compounds that bind to a target with high affinity constitutes the first step. This is typically performed using resource-intensive experimental methods to screen vast chemical search spaces - a key bottleneck in the drug-discovery pipeline. To streamline this process, highly-scalable computational screening methods with acceptable fidelity are needed to screen larger portions of the chemical search space and identify promising candidates to he validated using experiments. Machine learning methods, namely, surrogate models have recently evolved into favorable alternatives to perform this computational screening. In this work, we present Simple SMILES Transformer (SST), an accurate and highly-scalable binding affinity prediction method that approximates the computationally-intensive molecular docking process using an encoder-only Transformer architecture. We benchmark our model against two baselines that feature fundamentally different approaches to docking surrogates: RegGO, a MORDRED fingerprint based multi-layer perceptron model, and Chemprop, a directed message-passing graph neural network. Unlike Chemprop and RegGO, our method operates solely on the SMILES representation of molecules without needing additional featurization, which leads to reduced preprocessing overhead, higher inference throughput and thus better scalability. We train SST in a distributed fashion on the Polaris supercomputer at the Argonne Leadership computing Facility (ALCF). We then deploy it at an unprecedented scale for inference across 256 compute nodes of ALCF's Aurora supercomputer to screen 22 billion compounds in 40 minutes in search of hits with high binding affinity to oncoprotein RtcB ligase. SST predictions emphasize several molecular motifs that have previously been confirmed to interact with residues in their target binding pockets.

关键词： drug discovery virtual screening docking surrogates high performance computing transformers

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international workshops which were held in conjunction with 28th European symposium on Research in computer Security, ESORICS 2023

International Workshops which were held in conjunction with ...

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international workshops which were held in conjunction with 28th European symposium on Research in computer Security, ESORICS 2023

ISBN: (纸本)9783031541285

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DAPHNE Runtime: Harnessing Parallelism for Integrated Data Analysis Pipelines

DAPHNE Runtime: Harnessing Parallelism for Integrated Data A...

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29th international Conference on Parallel and Distributed computing (Euro-Par)

作者： Vontzalidis, Aristotelis Psomadakis, Stratos Bitsakos, Constantinos Dokter, Mark Innerebner, Kevin Damme, Patrick Boehm, Matthias Ciorba, Florina Eleliemy, Ahmed Karakostas, Vasileios Zamuda, Ales Tsoumakos, Dimitrios ICCS Natl Tech Univ Athens Athens Greece Graz Univ Technol Know Ctr GmbH Graz Austria Graz Univ Technol Graz Austria Tech Univ Berlin Berlin Germany Univ Basel Basel Switzerland Univ Athens Athens Greece Univ Maribor Maribor Slovenia

ISBN: (纸本)9783031488023;9783031488030

Integrated data analysis pipelines combine rigorous data management and processing, high-performance computing and machine learning tasks. While these systems and operations share many compilation and runtime techniques, data analysts and scientists are currently dealing with multiple systems for each stage of their pipeline. DAPHNE is an open and extensible system infrastructure for such pipelines, including language abstractions, compilation and runtime techniques, multilevel scheduling, hardware accelerators and computational storage. In this demonstration, we focus on the DAPHNE runtime that provides the implementation of kernels for local, distributed and accelerator-enhanced operations, vectorized execution, integration with existing frameworks and libraries for productivity and interoperability, as well as efficient I/O and communication primitives.

关键词： Machine Learning Systems high performance computing Vectorized Execution Distributed Systems

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Proceedings of 2023 SC workshops of the international Conference on high performance computing, Network, Storage, and Analysis, SC workshops 2023

Proceedings of 2023 SC Workshops of the International Confer...

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2023 international Conference on high performance computing, Network, Storage, and Analysis, SC workshops 2023

ISBN: (纸本)9798400707858

The proceedings contain 255 papers. The topics discussed include: a comparison of mesh-free differentiable programming and data-driven strategies for optimal control under PDE constraints;autotuning Apache TVM-based scientific applications using Bayesian optimization;enhancing heterogeneous federated learning with knowledge extraction and multi-model fusion;elastic deep learning through resilient collective operations;accelerating particle and fluid simulations with differentiable and interpretable graph networks for solving forward and inverse problems;machine learning applied to single-molecule activity prediction;entropy-driven optimal sub-sampling of fluid dynamics for developing machine-learned surrogates;towards rapid autonomous electron microscopy with active meta-learning;protein generation via genome-scale language models with bio-physical scoring;Tencoder: tensor-product encoder-decoder architecture for predicting solutions of PDEs with variable boundary data;and AI/ML-derived whole-genome predictor prospectively and clinically predicts survival and response to treatment in brain cancer.

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GABB: The plan-based job scheduling optimized by genetic algorithm for HPC systems with shared burst buffers 3

GABB: The plan-based job scheduling optimized by genetic alg...

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3rd international symposium on computer Applications and Information Systems, ISCAIS 2024

作者： Lv, Shuaizhe Xie, Xuchao Song, Zhenlong College of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9781510681316

Burst Buffer was proposed to address the growing performance gap between computation and I/O in high-performance computing systems (HPC). However, the introduction of Burst Buffer has brought new issues in system resource management and job scheduling. Resource management systems on HPC platforms lack efficient management of multiple types of resources, and the allocation of computing resources and Burst Buffer resources is independent of each other. This can lead to underutilization of system resources and job blocking. To address these issues, this paper proposes GABB, a plan-based job scheduling strategy for shared Burst Buffer, and utilizes genetic algorithms for optimization. GABB employs a plan-based job scheduling strategy to uniformly schedule all jobs in the waiting queue to generate an execution plan. Furthermore, GABB comprehensively considers changes in system resources and the job's demand for computing and Burst Buffer resources during the job scheduling process. Finally, GABB utilizes an improved genetic algorithm to optimize the job scheduling scheme. We conducted experimental simulations of a shared Burst Buffer system and implemented a plan-based job scheduling algorithm. The experimental results indicate that BBGA significantly reduces the mean waiting time of jobs by over 20% compared to the Shortest Job First (SJF) algorithm, and reduces the mean bounded slowdown of jobs by over 25%. © 2024 SPIE.

关键词： Genetic algorithms

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MeHyper: Accelerating Hypergraph Neural Networks by Exploring Implicit Dataflows 31

MeHyper: Accelerating Hypergraph Neural Networks by Explorin...

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31st IEEE international symposium on high performance computer architecture, HPCA 2025

作者： Zhao, Wenju Yao, Pengcheng Chen, Dan Zheng, Long Liao, Xiaofei Wang, Qinggang Ma, Shaobo Li, Yu Liu, Haifeng Xiao, Wenjing Sun, Yufei Zhu, Bing Jin, Hai Xue, Jingling Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan430074 China National University of Singapore School of Computing 119077 Singapore Guangxi University School of Computer Electronics and Information NanNing530004 China University of New South Wales School of Computer Science and Engineering SydneyNSW2052 Australia

ISBN: (纸本)9798331506476

Hypergraph Neural Networks (HGNNs) are increasingly utilized to analyze complex inter-entity relationships. Traditional HGNN systems, based on a hyperedge-centric dataflow model, independently process aggregation tasks for hyperedges and vertices, leading to significant computational redundancy. This redundancy arises from recalculating shared information across different tasks. For the first time, we identify and harness implicit dataflows (i.e., dependencies) within HGNNs, introducing the microedge concept to effectively capture and reuse intricate shared information among aggregation tasks, thereby minimizing redundant computations. We have developed a new microedge-centric dataflow model that processes shared information as fine-grained microedge aggregation tasks. This dataflow model is supported by the Read-Process-Activate-Generate execution model, which aims to optimize parallelism among these tasks. Furthermore, our newly developed MeHyper, a microedge-centric HGNN accelerator, incorporates a decoupled pipeline for improved computational parallelism and a hierarchical feature management strategy to reduce off-chip memory accesses for large volumes of intermediate feature vectors generated. Our evaluation demonstrates that MeHyper substantially outperforms the leading CPUbased system PyG-CPU and the GPU-based system HyperGef, delivering performance improvements of 1,032.23 × and 10.51 ×, and energy efficiencies of 1,169.03 × and 9.96 ×, respectively. © 2025 IEEE.

关键词： Redundancy

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