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MatRIS: Multi-level Math Library Abstraction for Heterogeneity and performance Portability using IRIS Runtime

MatRIS: Multi-level Math Library Abstraction for Heterogenei...

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2023 international Conference on high performance computing, Network, Storage, and Analysis, SC workshops 2023

作者： Monil, Mohammad Alaul Haque Miniskar, Narasinga Rao Teranishi, Keita Vetter, Jeffrey S. Valero-Lara, Pedro Computer Science and Mathematics Division Oak Ridge National Laboratory Oak RidgeTN United States

ISBN: (纸本)9798400707858

Vendor libraries are tuned for a specific architecture and are not portable to others. Moreover, they lack support for heterogeneity and multi-device orchestration, which is required for efficient use of contemporary HPC and cloud resources. To address these challenges, we introduce MatRIS - a multilevel math library abstraction for scalable and performance-portable sparse/dense BLAS/LAPACK operations using IRIS runtime. The MatRIS-IRIS co-design introduces three levels of abstraction to make the implementation completely architecture agnostic and provide highly productive programming. We demonstrate that MatRIS is portable without any change in source code and can fully utilize multi-device heterogeneous systems by achieving high performance and scalability on Summit, Frontier, and a CADES cloud node equipped with four NVIDIA A100 GPUs and four AMD MI100 GPUs. A detailed performance study is presented in which MatRIS demonstrates multi-device scalability. When compared, MatRIS provides competitive and even better performance than libraries from vendors and other third parties. © 2023 ACM.

关键词： Scalability

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Interactive HPC and the LUNARC Desktop Environment

Interactive HPC and the LUNARC Desktop Environment

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high performance computing, Networking, Storage and Analysis, SC-W: workshops of the international Conference for

作者： Jonas Lindemann Anders Follin LUNARC Center for Scientific and Technical Computing Lund University Lund

ISBN: (数字)9798350355543

ISBN: (纸本)9798350355550

Since 2011, LUNARC has aimed to provide an interactive HPC environment for its resource users. Several different architectures have been used, but since 2013, we have been using a remote desktop environment based on Cendio’s ThinLinc [1] combined with a custom backend framework, GfxLauncher [2], supporting hardware-accelerated graphics applications and Jupyter Notebooks [3] submitted to the backend cluster.

关键词： Visualization high performance computing Conferences Synchrotrons computer architecture Software Complexity theory

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Hyperspectral Image Reconstruction in Remote Sensing: LaplaceGAN Synthesis Coupled with VGG-UNet Classification

Hyperspectral Image Reconstruction in Remote Sensing: Laplac...

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2024 international symposium on computing and Intelligent Systems, SCI 2024

作者： Sain, Shikha Saxena, Monika Department of Computer Science Banasthali Vidyapith Rajasthan Jaipur304022 India

Enhancing and reconstructing environmental images involve refining visual data to improve quality and reconstructing scenes. In remote sensing, this aids in accurate analysis, contributing to advanced understanding and decision-making. This study focuses on advancing hyperspectral image analysis in remote sensing through the design of a deep learning-based model aimed at enhancing and reconstructing environmental images. An integral aspect involves introducing a novel approach using LaplaceGAN to generate synthetic images with high fidelity, building upon real images as a foundational basis. Furthermore, the study proposes the implementation of a specialized VGG-UNet architecture tailored for the classification of hyperspectral images, specifically addressing the nuances of remote sensing data. To assess the model's efficacy, a comparative analysis is conducted, pitting the performance of VGG-UNet against alternative methods such as Res-UNet and Faster R-CNN in the context of remote sensing image classification. This research aims to contribute to the field by designing a deep learning model that not only analyzes hyperspectral images comprehensively but also enhances and reconstructs environmental images, thereby advancing the most recent methods for better comprehension and judgement in a range of remote sensing applications. © 2024 Copyright for this paper by its authors. Use permitted under Creative Commons License Attribution 4.0 international (CC BY 4.0).

关键词： Remote sensing

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Exploiting high-Bandwidth Memory for FPGA-Acceleration of Inference on Sum-Product Networks 36

Exploiting High-Bandwidth Memory for FPGA-Acceleration of In...

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36th IEEE international Parallel and Distributed Processing symposium (IEEE IPDPS)

作者： Weber, Lukas Wirth, Johannes Sommer, Lukas Koch, Andreas Tech Univ Darmstadt Embedded Syst & Applicat Grp Darmstadt Germany

ISBN: (纸本)9781665497473

Due to the memory wall becoming increasingly problematic in high-performance computing, there is a steady push to improve memory architectures, mainly focusing on better bandwidth as well as latency. One of the results of this push is the development of high-Bandwidth Memory (HBM) which is an alternative to the regular DRAM typically used by accelerator-cards. This work adapts an existing accelerator architecture for inference on Sum-Product Networks (SPN) to exploit the HBM present on more recent high-performance FPGA-accelerator cards. The evaluation shows that the use of HBM enables almost linear scaling of the performance due to the embarrassingly parallel nature of batch-wise SPN inference. It is also shown that the only hindrance to this scaling is the limited bandwidth available for data-transfers between host and FPGA. Even with this bottleneck, the prior FPGA-based implementation is outperformed by up to 1.50x (geo.-mean 1.29x). Similarly, the CPU and GPU baselines are outperformed by up to 2.4x (*** 1.6x) and 8.4x (geo.-mean 6.9x) respectively. Based on the evaluation, the scaling potential of HBM-based FPGA-accelerators is explored to give an outlook on what is to come with future generations of PCIe-based interfaces.

关键词： Sum-Product Network Probabilistic Models Machine Learning high-Bandwidth Memory FPGA

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M-DFCPP: A runtime library for multi-machine dataflow computing

M-DFCPP: A runtime library for multi-machine dataflow comput...

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作者： Luo, Qiuming Liu, Senhong Huang, Jinke Li, Jinrong College of Computer Science and Software Engineering Shenzhen University Shenzhen China SKT Group Guangdong Province Key Laboratory of Popular High-Performance Computers Shenzhen China SKT Group Guangdong Province Engineering Center of China-made High Performance Data Computing System Shenzhen China

This article designs and implements a runtime library for general dataflow programming, DFCPP (Luo Q, Huang J, Li J, Du Z. Proceedings of the 52nd international Conference on Parallel Processing workshops. ACM;2023:145-152.), and builds upon it to design and implement a multi-machine C++ dataflow library, M-DFCPP. In comparison to existing dataflow programming environments, DFCPP features a user-friendly interface and richer expressive capabilities (Luo Q, Huang J, Li J, Du Z. Proceedings of the 52nd international Conference on Parallel Processing workshops. ACM;2023:145-152.), enabling the representation of various types of dataflow actor tasks (static, dynamic and conditional task). Besides that, DFCPP addresses the memory management and task scheduling for non-uniform memory access architectures, while other dataflow libraries lack attention to these issues. M-DFCPP extends the capability of current dataflow runtime libraries (DFCPP, taskflow, openstream, etc.) and capable of multi-machine computing, while maintains the API compatible with DFCPP. M-DFCPP adopts the concepts of master and follower (Dean J, Ghemawat S. Commun ACM. 2008;51(1):107-113;Ghemawat S, Gobioff H, Leung ST. ACM SIGOPS Operating Systems Review. ACM;2003:29-43.), which form a worksharing framework as many multi-machine system. To shift to the M-DFCPP framework, a filtering layer is inserted to the original DFCPP, transforming it into followers that can cooperate with each other. The master is made of modules for scheduling, data processing, graph partition, state management and so forth. In benchmark tests with workload with directed acyclic graph topology of binary trees and random graphs, DFCPP demonstrated performance improvements of 20% and 8%, respectively, compared to the second fastest library. M-DFCPP consistently exhibits outstanding performance across varying levels of concurrency and task workloads, achieving a maximum speedup of more than 20 over DFCPP, when the task parallelism e

关键词： Libraries

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Power Analysis of NERSC Production Workloads

Power Analysis of NERSC Production Workloads

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2023 international Conference on high performance computing, Network, Storage, and Analysis, SC workshops 2023

作者： Zhao, Zhengji Rrapaj, Ermal Bhalachandra, Sridutt Austin, Brian Nam, Hai Ah Wright, Nicholas Lawrence Berkeley National Laboratory BerkeleyCA United States

ISBN: (纸本)9798400707858

Power has become a key limiting factor in supercomputing. Understanding the power signatures of current production workloads is essential to address this limit and continue to advance scientific computing at scale. This paper analyzes the power characteristics of NERSC production workloads at the system and application levels. Our system-level analysis revealed a large gap between the average and peak power usage distribution, indicating a significant power swing from running various applications on the system. On the application level, we select four workflow benchmarks representing NERSC's production workloads to analyze the power characteristics of applications and attempt to correlate the observed power timeline patterns with GPU performance metrics and application profiling data. We found different applications have distinct power usage patterns and widespread average and peak power usage. We discuss how these findings may help improve the current system's operational power efficiency and the implications for future system procurement. © 2023 Owner/Author.

关键词： computer architecture

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Quantifying and detecting HPC resource wastage in cloud environments 33

Quantifying and detecting HPC resource wastage in cloud envi...

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33rd IEEE international symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Tavares, William F. C. Miranda Assis, Marcio Roberto Borin, Edson Univ Estadual Campinas Inst Comp Campinas Brazil

ISBN: (纸本)9781665417303

Among many details that users need to consider when using cloud computing, the care not to waste resources requires more attention by administrators and new users. When the application does not fully utilize the provisioned resource, the end-of-the-month bill is unnecessarily increased. Several studies have developed solutions to avoid wastage using predictive techniques. Nonetheless, these approaches require applications' to have predictive behavior and depend on pre-executions or history data. To circumvent these limitations, we explore how a reactive solution can be used to detect and contain wastage. More specifically, we discuss several important issues that arise when quantifying resource wastage caused by HPC resource wastage on the cloud and propose a reactive strategy to quantify, detect, and contain resource wastage in this context. This solution is designed so that it can be applied in environments with expert and non-expert users with no prior knowledge about the applications.

关键词： Cloud computing Monitoring system Resource utilization

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Enabling high-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network 28

Enabling High-Quality Uncertainty Quantification in a PIM De...

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28th Annual IEEE international symposium on high-performance computer architecture (HPCA)

作者： Li, Xingchen Wu, Bingzhe Sun, Guangyu Zhang, Zhe Yuan, Zhihang Wang, Runsheng Huang, Ru Niu, Dimin Zheng, Hongzhong Lu, Zhichao Zhao, Liang Chang, Meng-Fan Marvin Guan, Tianchan Si, Xin Peking Univ Beijing Peoples R China Alibaba Grp Inc Hangzhou Peoples R China Hefei Reliance Memory Ltd Hefei Peoples R China Natl Tsing Hua Univ Hsinchu Taiwan Southeast Univ Nanjing Peoples R China Adv Inst Informat Technol Beijing Peoples R China

ISBN: (纸本)9781665420273

Uncertainty quantification measures the prediction uncertainty of a neural network facing out-of-training-distribution samples. Bayesian Neural Networks (BNNs) can provide high-quality uncertainty quantification by introducing specific noise to the weights during inference. To accelerate BNN inference, ReRAM processing-in-memory (PIM) architecture is a competitive solution to provide both high-efficient computing and in-situ noise generation at the same time. However, there normally exists a huge gap between the generated noise in PIM hardware and that required by a BNN model. We demonstrate that the quality of uncertainty quantification is substantially degraded due to this gap. To solve this problem, we propose a holistic framework called W2W-PIM. We first introduce an efficient method to generate noise in ReRAM PIM design according to the demand of a BNN model. In addition, the PIM architecture is carefully modified to enable the noise generation and evaluate uncertainty quality. Moreover, a calibration unit is further introduced to reduce the noise gap caused by imperfection of the noise model. Comprehensive evaluation results demonstrate that W2W-PIM framework can achieve high-quality uncertainty quantification and high energy-efficiency at the same time.

关键词： ReRAM Bayesian Neural Network Analog computing Noise

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NeuroSense: Smartwatch-based Early Detection Framework for Alzheimer’s Disease 22

NeuroSense: Smartwatch-based Early Detection Framework for A...

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22nd international symposium on Network computing and Applications, NCA 2024

作者： Dixit, Aarju Das, Debasis Department of Computer Science and Engineering Indian Institute of Technology Jodhpur India

ISBN: (纸本)9798331510183

Alzheimer’s disease (AD) is a progressive neurodegenerative disorder with an annual global economic impact of approximately $1 trillion. Early diagnosis is crucial to mitigate disease progression, yet current detection methodologies lack consistency and accuracy in delineating disease stages. To address these challenges, we introduce NeuroSense, a novel smartwatch-based early detection framework for AD. NeuroSense employs advanced activity recognition algorithms to passively monitor ambulatory patterns, behaviors, and sleep cycles via Inertial Measurement Unit (IMU) and photoplethysmogram (PPG) sensors from smartwatches (i.e., Apple Watch and Fitbit), including metrics like walking speed, sleep posture, and heart rate variability. NeuroSense leverages enhanced shallow neural networks integrating cross-sectional entropy to dynamically adjust feature weights, improving sensitivity to subtle variations in AD biomarkers. Additionally, the SqueezeNet architecture has been optimized by introducing deeper fire modules and expanding filter sizes, enabling high-resolution feature extraction with reduced computational overhead. These models are further refined with a cloud computing infrastructure, allowing model updation, ensuring adaptive learning based on continuous data influx. To validate its efficacy, NeuroSense was tested on AI-generated datasets, achieving a detection accuracy of 94.4%, substantially higher than existing approaches. This novel framework provides a robust, scalable, and non-invasive solution for continuous AD monitoring, representing a significant advancement in the early detection and management of neurodegenerative disorders. ©2024 IEEE.

关键词： Sleep research

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PMBS 2024: 15th IEEE international Workshop on performance Modeling, Benchmarking, and Simulation of high performance computer Systems

PMBS 2024: 15th IEEE International Workshop on Performance M...

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high performance computing, Networking, Storage and Analysis, SC-W: workshops of the international Conference for

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