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检索条件"任意字段=2024 International Symposium on Computer Architecture and High Performance Computing Workshops"

共 5228 条记录，以下是501-510 订阅

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Web-Based Simulator of Superscalar RISC-V Processors

Web-Based Simulator of Superscalar RISC-V Processors

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high performance computing, Networking, Storage and Analysis, SC-W: workshops of the international Conference for

作者： Jiri Jaros Michal Majer Jakub Horky Jan Vavra Faculty of Information Technology Brno University of Technology Brno Czech Republic

ISBN: (数字)9798350355543

ISBN: (纸本)9798350355550

Mastering computational architectures is essential for developing fast and power-efficient programs. Our advanced simulator empowers both IT students and professionals to grasp the fundamentals of superscalar RISC-V processors, HW/SW co-design and HPC optimization techniques. With customizable processor and memory architecture, full C compiler support, and detailed runtime statistics, this tool offers a comprehensive learning experience. Enjoy the convenience of a modern, web-based GUI to enhance your understanding and skills.

关键词： Semiconductor device measurement Program processors Codes Runtime Source coding Systems architecture computer architecture Vectors Optimization Software development management

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Reducing Data Bottlenecks in Distributed, Heterogeneous Neural Networks 17

Reducing Data Bottlenecks in Distributed, Heterogeneous Neur...

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17th IEEE international symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2024

作者： Lin, Ruhai Zhu, Rui-Jie Eshraghian, Jason K. Uc Santa Cruz Dept. of Electrical and Computer Engineering Santa CruzCA United States

ISBN: (纸本)9798331530471

The rapid advancement of embedded multicore and many-core systems has revolutionized computing, enabling the development of high-performance, energy-efficient solutions for a wide range of applications. As models scale up in size, data movement is increasingly the bottleneck to performance. This movement of data can exist between processor and memory, or between cores and chips. This paper investigates the impact of bottleneck size, in terms of inter-chip data traffic, on the performance of deep learning models in embedded multicore and many-core systems. We conduct a systematic analysis of the relationship between bottleneck size, computational resource utilization, and model accuracy. We apply a hardware-software co-design methodology where data bottlenecks are replaced with extremely narrow layers to reduce the amount of data traffic. In effect, time-multiplexing of signals is replaced by learnable embeddings that reduce the demands on chip IOs. Our experiments on the CIFAR100 dataset demonstrate that the classification accuracy generally decreases as the bottleneck ratio increases, with shallower models experiencing a more significant drop compared to deeper models. Hardware-side evaluation reveals that higher bottleneck ratios lead to substantial reductions in data transfer volume across the layers of the neural network. Through this research, we can determine the trade-off between data transfer volume and model performance, enabling the identification of a balanced point that achieves good performance while minimizing data transfer volume. This characteristic allows for the development of efficient models that are well-suited for resource-constrained environments. © 2024 IEEE.

关键词： Deep learning

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Task Offloading Optimization in Vehicular Edge computing with Meta-Policy Models 4

Task Offloading Optimization in Vehicular Edge Computing wit...

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4th international symposium on Artificial Intelligence and Intelligent Manufacturing, AIIM 2024

作者： Zuo, Jinhui Shao, Caixing Yang, Yang Ma, Yin School of Computer Science and Artificial Intelligence Southwest Minzu University Chengdu China

ISBN: (纸本)9798331541729

With the rapid development of mobile communication and Internet technology, the Internet of Vehicle (IoV) is becoming a key development direction in the future transportation field. Vehicle applications are generating more and more data. Offloading computational tasks to traditional cloud platforms often results in high task latency. To address these challenges, Vehicular Edge computing (VEC) has become a promising solution, enabling the execution of complex computational tasks on edge servers deployed within roadside units (RSUs). By reducing data transmission delays and providing localized computing capabilities, VEC significantly enhances the performance of IoV systems. In this paper, we propose an intelligent task offloading algorithm based on a meta-reinforcement learning framework. Our approach models vehicle applications as directed acyclic graphs (DAGs), representing intricate dependencies among computational tasks. Using recurrent neural networks (RNNs), our algorithm learns optimized offloading strategies through training, dynamically adapting to varying task demands and network conditions. The experimental results indicate that the vehicle task offloading strategy obtained using this method can achieve low energy consumption while ensuring low latency. And this method leverages the computational capabilities of edge servers to enable efficient resource allocation and optimized scheduling. © 2024 IEEE.

关键词： Computation offloading

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Scalable In-Situ Visualization for Extreme-Scale SPH Simulations

Scalable In-Situ Visualization for Extreme-Scale SPH Simulat...

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high performance computing, Networking, Storage and Analysis, SC-W: workshops of the international Conference for

作者： Yiqing Zhu Osman Seckin Simsek Jean M. Favre Rubén Cabezón Florina M. Ciorba University of Basel Basel Switzerland Swiss National Supercomputing Centre Lugano Switzerland

ISBN: (数字)9798350355543

ISBN: (纸本)9798350355550

Large-scale scientific simulations present significant challenges in data processing efficiency. This paper addresses the critical issue of I/O and data processing performance bottlenecks within the domain of extreme-scale Smoothed-particle Hydrodynamics (SPH) and gravity simulations. We present a novel I/O software architecture implemented in the scalable SPH-EXA framework [1], incorporating a variety of in-situ and post-hoc data analysis pipelines, facilitating rapid analysis and visualization of extreme-scale physical datasets. The performance of our I/O architecture is evaluated through comprehensive benchmarking across a wide range of data scales, conducted on the Piz Daint supercomputer [2].

关键词： Analytical models Data analysis Limiting Software architecture Pipelines Data visualization computer architecture Hydrodynamics Data models Supercomputers

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CLAP-Bot: a framework for automatic optimization of high-performance elastic applications on the Clouds 33

CLAP-<i>Bot</i>: a framework for automatic optimization of h...

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33rd IEEE international symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Napoli, Otavio Oliveira Pinton, Gustavo Ciotto Borin, Edson Univ Estadual Campinas Inst Comp Campinas Brazil

ISBN: (纸本)9781665417303

The computational cloud has become notorious due to its business model, where the user only pays to use the system, with no acquisition or maintenance costs. However, cloud providers such as AWS EC2 and Google computing Engine offer several virtual machine types making it difficult to choose which of them is most suitable to the user's application and objective. In this work, we present CLAP-Bot, a system that automatically monitors and adjusts the computing infrastructure based on some recipe. CLAP-But is built over CLAP, allowing creating and managing computational clusters in different cloud providers. The recipe is a component that can read application metrics and execute a set of actions on the infrastructure. The application monitor is decoupled from the recipe, allowing it to be used transparently with different applications. We show how CLAP-Bot works by implementing three dynamic provisioning policies as recipes and evaluating them. Besides that, together with CLAP-Bot we also present CLAP-Bot-Sim, a discrete event simulator that allows modeling the use of a given recipe without the need to instantiate any virtual machine. CLAP-Bot-Sim also allows modeling dynamic events, such as virtual machine interruptions and instance price oscillation over lime. We show that CLAP-Bot-Sim can accurately simulate the effects of recipes on the computing infrastructure and can easily be interchanged with CLAP-Bot.

关键词： Dynamic optimization system Cloud computing Cluster management Simulator

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Ponte Vecchio Across the Atlantic: Single-Node Benchmarking of Two Intel GPU Systems

Ponte Vecchio Across the Atlantic: Single-Node Benchmarking ...

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high performance computing, Networking, Storage and Analysis, SC-W: workshops of the international Conference for

作者： Thomas Applencourt Aditya Sadawarte Servesh Muralidharan Colleen Bertoni JaeHyuk Kwack Ye Luo Esteban Rangel John Tramm Yasaman Ghadar Arjen Tamerus Chris Edsall Tom Deakin Argonne Leadership Computing Facility Argonne National Laboratory Lemont IL USA School of Computer Science University of Bristol Bristol UK University of Cambridge Cambridge UK

ISBN: (数字)9798350355543

ISBN: (纸本)9798350355550

Intel Data Center GPU Max 1550, known as Ponte Vecchio (PVC), is a new Intel GPU architecture for high-performance computing. It is the basis of two systems on the June 2024 Top 500 list, Dawn (#51) and Aurora (#2).This work provides micro-benchmarking data on PVCs from which application developers may benefit, shows how the micro-benchmarking results are indicative of mini-app performance on PVC, and demonstrates real applications on large-scale Intel GPU *** quantify the obtainable performance from PVC systems through micro-benchmarking fundamental architectural properties. We evaluate the performance of four mini-apps with known performance characteristics, and two full applications, comparing performance on a node of Aurora and Dawn with a node of NVIDIA H100 GPUs and a node of AMD MI250 GPUs. We show the figure-of-merit of the mini-apps on a single PVC ranges from 0.6–1.8X the performance of an H100, and 0.8–7.5X of a MI250.

关键词： Ion radiation effects Data centers high performance computing Conferences Graphics processing units computer architecture Benchmark testing Magnetosphere

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Advanced Post-processing for Object Detection Dataset Generation 19th

Advanced Post-processing for Object Detection Dataset Genera...

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19th international symposium on Visual computing

作者： Poellabauer, Thomas Berkei, Sarah Knauthe, Volker Kuijper, Arjan Fraunhofer Inst Comp Graph Res IGD Darmstadt Germany Tech Univ Darmstadt GRIS Darmstadt Germany

ISBN: (纸本)9783031773914;9783031773921

Fast acquisition and generation of training data is an important problem for the training of Deep Neural Networks (DNNs). Previous work using luminance keying for efficient training data acquisition achieves good results with very low effort, due to the high light absorption capabilities of the black background which enables keying through luminance instead of chroma. However, it does not reach real-world recording levels of performance. This paper significantly improves the achievable performance of luminance keying as evaluated for the use case of object detection. We introduce a novel post-processing pipeline incorporating a denoising diffusion probabilistic model (DDPM) to capitalize on lumakey recordings. First, we employ low rank adaptation (LoRA) to teach the recorded objects to a diffusion model. Second, we use Depth Anything to estimate the depth of the luma-key data. Third, utilizing ControlNet with depth estimates and Canny image filtering for guidance, we generate photo-realistic training images, using a wide range of relevant prompts, which increases model robustness in diverse environments. Applying the high quality masks of luminance keying, we get perfect ground truth for the object detection training. Extensive testing on the YCB-V object set demonstrates that our approach performs favorably compared to traditional techniques that require 3D meshes and material data, such as physically-based rendering or in-distribution dataset splits. Our proposed pipeline improves luminance keying to provide an efficient methodology for creating high-quality training datasets, facilitating the swift development and training of state-of-the-art DNNs for object detection, and is applicable to similar tasks, such as classification, and segmentation.

关键词： computer Vision Machine Learning Object Detection Synthetic Data

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A Source-to-Source NUMA Profiling Approach

A Source-to-Source NUMA Profiling Approach

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international symposium on computer architecture and high performance computing workshops (SBAC-PADW)

作者： Leticia S.F. Machado Claude Tadonki Hermes Senger Computer Science Department UFSCar São Carlos SP Brazil Centre de Recherche en Informatique (CRI) Mines ParisTech - PSL Fontainebleau France

The design of HPC processors is driven by the purpose of packaging an increasing number of CPU cores. This trend in the multicore design faces the physical reality of integrating circuits into a single die in addition to the bottleneck of components sharing, thus the advent of Non-Uniform Memory Access (NUMA) with its typical packaging. Cutting-edge supercomputers are made up of such (manycore) compute nodes. In any case, the main issue is scalability. With a NUMA configuration, a memory access can be local (within the same NUMA node) or remote (from a NUMA node to another). The latter is the main concern w.r.t to efficiency because of the associated overhead is much more important. Dealing with this concern explicitly when designing a program is called NUMA-aware implementation. With an existing code, the problem can be addressed by starting with an appropriate profiling. This is the focus of the present work, where we suggest a way to instrument the native code in order to get the type (i.e. local or remote) of each memory access and we provide a tool that supports the profiling process. We then propose a metric that takes these statistics about memory accesses and provides a value indicating the potential associated overhead.

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Acamar: A Dynamically Reconfigurable Scientific computing Accelerator for Robust Convergence and Minimal Resource Underutilization 57

Acamar: A Dynamically Reconfigurable Scientific Computing Ac...

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57th Annual IEEE/ACM international symposium on Microarchitecture, MICRO 2024

作者： Bakhtiar, Ubaid Hosseini, Helya Asgari, Bahar University of Maryland College Park United States

ISBN: (纸本)9798350350579

Although modern supercomputers are capable of delivering Exaflops now, they do not always achieve their peak performance. For instance, even today's high-end supercom-puters achieve only less than 5% of their peak FLOPS when running HPCG, a benchmark designed to represent real-world scientific computing programs. To improve the efficiency of the key kernels in scientific computing, such as those used in solving partial differential equations, computer architects have begun to expand the applications of domain-specific architectures (DSAs) to scientific computing. However, DSAs that often have a fixed design are not likely to be practical solutions, as one specialized solution cannot fit all the diverse scientific computing workloads, making them less effective. The challenges of hardware inef-ficiency in today's supercomputers and the ineffectiveness of DSAs are further exacerbated by sparsity, a key characteristic of scientific computing workloads. While prior studies have proposed DSA solutions for sparse computations, they too are static and not adaptable to variations in the patterns and levels of sparsity across different scientific workloads. To address these challenges and target not only the diversity of computations in such workloads but also variations in sparsity, we propose Acamar is a binary star system in the constellation of Eridanus., a dynamically reconfigurable accelerator. Acamar is adaptable to various solvers across different workloads and dynamically optimizes the trade-off between resource utilization and latency for sparse computations. The adaptable design also enables selecting a solver that guarantees convergence. We evaluate Acamar based on its Vitis HLS implementation on Xilinx Alveo u55c. Our experiments show a resource utilization and latency improvement up to 3.5 x and 6 x as well as improved performance efficiency and achieved throughput over a static design and Nvidia GTX 1650 Super. © 2024 IEEE.

关键词： Supercomputers

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An Exploratory Study of Deep Learning for Predicting Computational Tasks Behavior in HPC Systems

An Exploratory Study of Deep Learning for Predicting Computa...

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international symposium on computer architecture and high performance computing workshops (SBAC-PADW)

作者： Alexandre H.L. Porto Micaella Coelho Kary Ocaña Carla Osthoff Francieli Boito Douglas O. Cardoso National Laboratory for Scientific Computing Petrópolis Brazil CNRS LaBRI University of Bordeaux Bordeaux INP INRIA Talence France Smart Cities Research Center Polytechnic Institute of Tomar Tomar Portugal

The scientific gateway BioinfoPortal for bioinformatics applications is hosted in the National Laboratory for Scientific computing (LNCC) and is coupled to the Santos Dumont (SDumont) supercomputer environment. BioinfoPortal offers a catalog of bioinformatics software that benefits from the parallel and distributed architecture offered by LNCC. Task submissions consume SDumont nodes shared by other users of the supercomputer; thus, it is important they use the best configuration, which is defined as the best choice of the number of threads/nodes to be allocated for every task submission. This article presents an analysis using neural networks to estimate the computational time required to execute bioinformatics software in several scenarios using a pre-configured number of nodes and threads. Our goal is to demonstrate the performance behavior of software such as RAxML in Bioinfoportal, and which computational scenario can be chosen to efficiently execute software in SDumont. Results support that the neural networks are adequate to predict the variable elapsed time, Elapsed, to evaluate the relationships between input parameters, number of bootstraps (RAxML), number of threads, and number of nodes, and to identify the fastest configuration. The goal is to make BioinfoPortal a smart, efficient, and green gateway. In future studies, we propose to study more variables and predictors as well as other bioinformatics software in BioinfoPortal.

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