The authors discuss the power scheduling problem and how the software program, Plan-It, can be used as a consultant for scheduling space power system activities. modeling of power activities, the human interface, and ...
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ISBN:
(纸本)0841209863
The authors discuss the power scheduling problem and how the software program, Plan-It, can be used as a consultant for scheduling space power system activities. modeling of power activities, the human interface, and two of the many strategies used by Plan-It are discussed. Preliminary results are presented showing the development of a conflict-free sequence from an initial sequence with conflicts. They indicate that a four day schedule can be generated in a matter of a few minutes, which provides sufficient time in many cases to aid the crew in the replanning of loads and generation use following a failure or anomaly.
The authors describe the conceptual design of a facility for producing ammonia and nitric acid using solar energy as the principal external source of process heat. Key features of the design are a direct-absorption ce...
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ISBN:
(纸本)0841209863
The authors describe the conceptual design of a facility for producing ammonia and nitric acid using solar energy as the principal external source of process heat. Key features of the design are a direct-absorption central receiver and an endothermic process (combustion of ammonia to make nitric acid), thermally linked by a high-temperature heat-transfer loop using molten carbonate salt. The study includes process selection and optimization, conceptual design of key components, performance evaluation, technological assessment, and economic analysis.
A description is given of work related to the characterization of the RE-1000 engine. The data collected from the RE-1000 tests are intended to provide a database for the validation of stirling cycle simulations. A co...
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ISBN:
(纸本)0841209863
A description is given of work related to the characterization of the RE-1000 engine. The data collected from the RE-1000 tests are intended to provide a database for the validation of stirling cycle simulations. A complete description of the engine is given in sufficient detail for a computer simulation of the device to be written. Tables are presented showing the masses of the oscillating components and key dimensions needed for modeling purposes. Graphs are used to indicate the spring content of the diaphragms used to separate the helium of the working and bounce spaces from the hydraulic fluid.
The application of the IPAGOS code to guide the design of a solar dynamic (SD) module for the NASA space station is discussed. Graphical displays are presented illustrating the solar-flux distribution on the receiver ...
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ISBN:
(纸本)0841209863
The application of the IPAGOS code to guide the design of a solar dynamic (SD) module for the NASA space station is discussed. Graphical displays are presented illustrating the solar-flux distribution on the receiver cavity walls as a function of receiver size, receiver geometry, rim angle, solar misalignment, concentrator-mirror tilt, and position on the focal axis. Focal plane distribution of the solar flux is illustrated for the same functions. The relative importance of concentrator-mirror error and pointing error is illustrated. The great value of a design tool such as IPAGOS for configuration selection and design optimization is clearly noted.
Solar concentrator designs that use deployable hexagonal panels are being developed for space power systems. An offset optical configuration has been developed that offers significant system-level advantages over prev...
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ISBN:
(纸本)0841209863
Solar concentrator designs that use deployable hexagonal panels are being developed for space power systems. An offset optical configuration has been developed that offers significant system-level advantages over previously proposed collector designs for space applications. Optical analyses have shown offset reflector intercept factors to be only slightly lower than those for symmetric reflectors with the same slope error. Fluxes on the receiver walls are asymmetric but manageable by varying the tilt angle of the receiver. Greater producibility is achieved by subdividing the hexagonal panels into triangular mirror facets of spherical contour. Optical analysis has been performed on these to yield near-optimum sizes and radii.
The proceedings contain 199 papers. The topics discussed include: 21st-century U.S. safety professional educational standards: establishing minimum baccalaureate graduate learning outcomes for emerging occupational he...
The proceedings contain 199 papers. The topics discussed include: 21st-century U.S. safety professional educational standards: establishing minimum baccalaureate graduate learning outcomes for emerging occupational health and safety professionals;accountability 433: the critical steps, pivotal moments and types of performers that influence safety systems;advancing your career: from safety leader to business partner;America's changing work force: ramifications for ergonomic modeling;ANSI Z-15 success: saving lives and reducing costs;are you up to date with GHS? a guide to the globally harmonized system and OSHA's communication standard;assessing and managing risk of natural disasters for a workplace;background, updates, impacts, nuances and making EM 385-1-1 work for you and safe production;best practices for screening and selecting contractors and subcontractors;business partners' safety: obligation or opportunity?;challenges of implementing a U.S. safety and health program in the international construction market;construction + ergonomics = a non-traditional focus for a top 20 U.S. contractor;the contribution of research to education in the safety field;culture, the safety professional, and building organizational capacity: reflections from the field on safety promotion in cross-cultural settings;and developing and communicating expectations for motor vehicle operation.
The Intel Design Automation (DA) system is overviewed within the framework of Intel's business and technological goals. The philosophies and goals that direct development, acquisition, and deployment of DA capabil...
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ISBN:
(纸本)9780818605420
The Intel Design Automation (DA) system is overviewed within the framework of Intel's business and technological goals. The philosophies and goals that direct development, acquisition, and deployment of DA capabilities throughout Intel are provided as a foundation for a more detailed discussion of specific areas within the total DA system. The "computing hierarchy" used within Intel world-wide for design and verification of its products is presented, as well as a high-level picture of the entire DA system for Intel's components products mix. With this overview as a basis, detailed explanations of the Engineering Design Environment (EDeN), Functional Design Verification, Hierarchical Layout Verification, and Circuit Performance Verification are presented.
In recent years many researchers have tried to apply the traditional database systems to design applications. To date, most of these experiments have been largely unsuccessful. Insufficient computing power may be one ...
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ISBN:
(纸本)9780818605420
In recent years many researchers have tried to apply the traditional database systems to design applications. To date, most of these experiments have been largely unsuccessful. Insufficient computing power may be one reason for this failure. However, the problem may be more fundamental. We believe the data models of the traditional database systems are intrinsically unsuited for design applications. In this paper we give reasons for this opinion and describe an enhanced relational model which removes some of the weaknesses we have identified.
CRITTER is an exploratory prototype design aid, built using Artificial Intelligence ("Expert systems") technology, to aid in "critiquing" digital circuit designs, encompassing issues of functional ...
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ISBN:
(纸本)9780818605420
CRITTER is an exploratory prototype design aid, built using Artificial Intelligence ("Expert systems") technology, to aid in "critiquing" digital circuit designs, encompassing issues of functional correctness, operating speed, timing robustness, and circuit sensitivity to changes in device parameters. Its non-procedural representation for both real-time circuit behavior and circuit specifications has led to a streamlined circuit modeling formalism based on ordinary mathematical function composition. In its interactions with the user it strives to be as concise as possible, concentrating only on findings it judges to be unexpected or unusual. After successful tests with circuits of up to a dozen TTL SSI/MSI packages, CRITTER is being extended for use in an automated VLSI design environment.
The random logic portion of a chip Implementing a set of Boolean functions and sequential circuits usually represents a major contribution to chip area. Obviously, there are many circuits which realize the same Boolea...
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ISBN:
(纸本)9780818605420
The random logic portion of a chip Implementing a set of Boolean functions and sequential circuits usually represents a major contribution to chip area. Obviously, there are many circuits which realize the same Boolean function. Unfortunately, at present there is no general theory that provides designers (and design automation programs) with lower bounds for total area, for gate oxide area, and for delay time of logic Implementations in Integrated systems. Therefore, the main task for the computer optimization program appears In choice of the circuit with the most convenient *** is a design automation system with register-transfer level description on its Input and CIF file on output [5]. The digital circuit can be described in both behavioral and structural mode. A set of successive compilations and hardware implementing and optimizing transformations create the description of the network on the level of logic gates and pass transistors. As the output of hardware compilation from the higher level, this description is usually nonoptimal and thus is next optimized by recursive technology independent transformations based on Boolean algebra (like A*O = O, A*A = A, etc.). Inverters are also inserted into long chains of AND or OR gates, being the results of iterative circuits' compilation [4].The next stages are: technology dependant optimization of the logic network, and network's layout. It is assumed that the resultant network is multilevel, consists of complex negative gates, and is realized in semiregular Weinberger-style gate matrix layout. The logic minimization method intended for layout minimization is described in this *** is assumed in our silicon compiler, that logic is constructed of n-channel, polysilicon gate MOSFET ratioless complex gates, performing any negative function. By negative function we understand negation of positive function, while positive function is any combination of AND and OR functors [1]. Functions for evaluation of circ
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