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检索条件"任意字段=21st International Symposium on Computer Architecture and High Performance Computing"

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Mitigation of fail-stop failures in integer matrix products via numerical packing

Mitigation of fail-stop failures in integer matrix products ...

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IEEE symposium on On-Line Testing (IOLTS)

作者： Ijeoma Anarado Yiannis Andreopoulos Electronic and Electrical Engineering Department University College London London UK

ISBN: (纸本)9781467379069

The decreasing mean-time-to-failure estimates of distributed computing systems indicate that high-performance generic matrix multiply (GEMM) routines running on such environments may need to mitigate an increasing number of fail-stop failures. We propose a new roll-forward solution to this problem that is based on the production of redundant results within the numerical representation of the outputs via the use of numerical packing. This differs from all existing roll-forward solutions that require a separate set of checksum (or duplicate) results. In particular, unlike all existing approaches, the proposed approach does not require additional hardware resources for failure mitigation. Instead, in our proposal the required duplication is inserted in the input matrices themselves. The accommodation of the duplicated inputs imposes 30.6% or 37.5% reduction in the maximum output bitwidth supported in comparison to integer matrix products performed on 32-bit floating-point or integer representations, respectively. Nevertheless, this bitwidth reduction is comparable to the one imposed due to the checksum elements of traditional roll-forward methods, especially for cases where multiple core failures must be mitigated. Experiments performed on an Amazon EC2 instance with 6 Intel Haswell cores dedicated to GEMM computations show that, in comparison to the state-of-the-art failure-intolerant integer GEMM realization, the proposed approach incurs only 5-19.4% drop in the achievable peak performance. This overhead is significantly lower than the 33.3 - 37% overhead incurred by the equivalent checksum-based method.

关键词： Approximation methods Proposals Dynamic range Zirconium Distributed computing Kernel Covariance matrices

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PROP: Using PCIe-Based RDMA to Accelerate Rack-Scale Communications in Data Centers

PROP: Using PCIe-Based RDMA to Accelerate Rack-Scale Communi...

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international Conference on Parallel and Distributed Systems (ICPADS)

作者： Dawei Zang Zheng Cao Xiaoli Liu Lin Wang Zhan Wang Ninghui Sun University of Chinese Academy of Sciences Beijing China Institute of Computing Technology Chinese Academy of Sciences Beijing China

In order to reduce the demands on bandwidth of core layer network, data center operators usually assign tasks of the same job to servers that are located in the same rack, leading to the fact that 80% of the traffic originated from servers retains in the same rack. As a result, providing sufficient network capacity inside racks becomes critical to the Quality-of-Service of current data center applications. In this paper, we propose PROP, a novel hybrid network architecture which leverages PCIe-based RDMA to reinforce rack-scale connectivity in data centers. In our design, intra-rack bulk data transfers will be accelerated by a dedicated high-bandwidth PCIe-compliant network while complemented with the existing Ethernet network. In addition, we develop a proprietary PCIe-based RDMA hardware which can allow the servers in the same rack to exchange data in main memory without involving the operating system and the processors. We also implement a software stack to enable existing socket-based applications to transparently utilize the proposed dedicated network system. As the preliminary stage, this paper focuses on exploiting the unique design point and implements an FPGA-based prototype to validate the technical feasibility of the proposed architecture.

关键词： Servers computer architecture Bandwidth Switches Receivers Network interfaces

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Intelligent system with remote transmission for monitoring telecommunication equipment parameters

Intelligent system with remote transmission for monitoring t...

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international symposium for Design and Technology of Electronics Packages (SIITME)

作者： Edmund Julien Spatariu Marius Constantin Popescu Antoanela Naaji Department of Computer Science „Vasile Goldis” Western University of Arad and AVOLO TELECOM SRL Timisoara Romania Department of Computer Science „Vasile Goldis” Western University Arad Romania

Intelligent systems for monitoring telecommunication equipment parameters are especially useful in the case of locations that are not under human surveillance. The monitoring system described in our paper is a general one, but it can be adapted and implemented to monitor the specific parameters of equipment utilized in various fields, such as: medicine, agriculture, energetics, chemical industry, etc. In this paper we present the development of both architecture of the device and the specific software applications for such system. Monitoring systems of analogue and digital signals with Ethernet transmission consist of Devices Analyzing Input Signals (DAIS) and sensors. The main parts of the DAIS system are: printed circuit board, equipped with an industrial microcontroller, an Ethernet transceiver, resistors, capacitors and connectors. The software running on the microcontroller is developed in ANSI C (American National standards Institute). It includes the C and C ++ GCC compiler (GNU Compiler Collection), an assembler and a simulator that facilitates application development and testing. The alarm monitoring and control application can be run from any electronic computing device equipped with an operating system using TCP/IP and has a browser that supports Java-Script. The web application is designed for reading the values displayed by the DAIS system, interprets and show them in a format accessible to browsers. In case of detecting any errors, the application puts the device in the “Alarm List” and sends a warning sound to the dispatch staff, directly from the browser. The detailed records on DAIS system reported values are nonstop monitored and stored in a database, with the possibility of graphic display of all values up to a maximum of one year. Thus, parameters can be monitored, including main feed voltage, backup voltage, the external temperature of the equipment cabinet, internal temperature, relative humidity inside the cabinet, smoke sensor(s), the state o

关键词： Monitoring Biomedical monitoring Connectors Reactive power Communications technology Registers

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DAG Scheduling for Heterogeneous Systems Using Biogeography-Based Optimization

DAG Scheduling for Heterogeneous Systems Using Biogeography-...

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international Conference on Parallel and Distributed Systems (ICPADS)

作者： Kefeng Deng Kaijun Ren Shaowei Liu Junqiang Song School of Computer National University of Defense Technology Changsha China

Efficient scheduling algorithm is critical for DAG-based applications to obtain high-performance in heterogeneous computing systems. In comparison with heuristic-based algorithms, meta-heuristic based scheduling algorithms can produce better results by searching in a guided manner. Biogeography-based optimization (BBO) is a recently proposed optimization technique which has shown less parameters, faster convergency, and superior performance than existing meta-heuristics. In this article, we introduce this novel optimization technique into the field of DAG scheduling. To reduce scheduling overhead, the proposed algorithm only encodes task mapping while using a heuristic strategy to determine task ordering. Moreover, it uses heuristic-based algorithms as baseline algorithms to obtain better results. We evaluate the BBO-based scheduling algorithm using three real world DAG-based applications under various parameter settings. The results show that the BBO-based scheduling algorithm outperforms the state-of-the-art meta-heuristic based algorithms.

关键词： Periodic structures Scheduling Scheduling algorithms Computational modeling Optimization Biogeography

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A Power-Aware Symbiotic Scheduling Algorithm for Concurrent GPU Kernels

A Power-Aware Symbiotic Scheduling Algorithm for Concurrent ...

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international Conference on Parallel and Distributed Systems (ICPADS)

作者： Teng Li Vikram K. Narayana Tarek El-Ghazawi Department of Electrical and Computer Engineering The George Washington University Washington DC USA

The past several years have witnessed significant performance improvements in high-performance computing (HPC), due to the incorporation of GPUs as co-processors. On one hand, GPU devices are growing significantly in terms of the available number of cores and the memory hierarchy; as a result, effective utilization of the available GPU resources while limiting the system power consumption has become an issue of rising importance. On the other hand, GPU vendors are providing additional supporting features to make this easier, such as enabling concurrent execution of multiple kernels, and providing on-board power sensors that can accessed through software. Amidst these new developments, we are faced with new opportunities for efficiently scheduling GPU computational kernels under performance and power constraints. In this paper, we propose a power-aware scheduling technique that carries out both performance and power optimizations for concurrent GPU kernels. We have observed that for GPU kernels that are deployed for concurrent execution, the order in which the programmer specifies their invocation can significantly alter the execution time and the power draw. We attribute this behavior to the relative synergy (or lack thereof) among kernels that are launched within close proximity of each other. Accordingly, we define performance metrics for computing the extent to which kernels are symbiotic, as well as power metrics for reducing the overall power consumption. Both metrics are estimated by modeling the kernels' complementary resource requirements and execution characteristics. We then propose a power-aware symbiotic scheduling algorithm to obtain a concurrent kernel launch schedule with improved performance and reduced power consumption. Experimental studies are conducted on the Cray XK7 supercomputer with an NVIDIA K20 GPU in each node. The results demonstrate the efficacy of the proposed algorithm-based approach, which can be readily adopted by programmers with mi

关键词： Kernel Graphics processing units Instruction sets Power demand Measurement Symbiosis Scheduling

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higher performance and improved reliability: Key to making photovoltaics the mainstream sustainable electricity generation source of the 21st Century

Higher performance and improved reliability: Key to making p...

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Annual international symposium on Reliability Physics

作者： J. Poortmans E. Voroshaszi W. Deceuninck J. Szlufcik University Hasselt Hasselt Belgium Imec Belgium

Solar energy is a cornerstone of the future global sustainable energy system. This is recognized by the international Energy Agency (IEA) and a wide range of other public organizations, private companies and NGO's. Within the portfolio of solar energy technology options, photovoltaic conversion (PV) for electricity generation plays a special role. It is highly modular and suitable for many applications, ranging from small stand-alone systems through medium-sized integrated grid-connected systems to large power plants. Finally, recent sharp cost and price reductions have made PV competitive on retail price level in most countries which is a crucial step towards the creation of self-sustaining markets. A further reduction by a factor of 2 to 3 will make PV-electricity competitive with electricity generated by fossil fuels or nuclear power plants on wholesale price level. Such a reduction is very likely to be achieved, the main question is how soon and using which technologies. Reduction of costs and prices on the level of costs/Wp alone, however, is not sufficient for PV to reach large-scale penetration. A number of very important challenges has to be tackled in parallel. The progress of PV has been based on upscaling and innovation of the cell technology, but it is clear that the “one size fits all” approach will not be sufficient in the future anymore. It is clear that reliability and qualification of PV-modules is to be shaped according to the location in which these PV-modules will be installed. In addition, given the efficiency increase of PV-cells and modules going to 20% and more, it is quite likely that these high-efficiency devices might suffer more from degradation than in the past. In relation to the further penetration of photovoltaics, the emphasis will also shift from the performance under standard conditions of temperature and irradiation (expressed as Wp) towards energy generation (kWh) under a broad variety of conditions. The paper will outline how pe

关键词： Silicon Photovoltaic cells Reliability computer architecture Degradation Substrates Microprocessors

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performance evaluation of multi core systems for high throughput medical applications involving model predictive control 21

Performance evaluation of multi core systems for high throug...

引用

21st international Conference on high performance computing (HiPC)

作者： Pore, Madhurima Banerjee, Ayan Gupta, Sandeep K. S. Arizona State Univ Impact Lab Https Impact Asu Edu Tempe AZ 85281 USA

ISBN: (纸本)9781479959754

Many medical control devices used in case of critical patients have model predictive controllers (MPC). MPC estimate the drug level in the parts of patients body based on their human physiology model to either alarm the medical authority or change the drug infusion rate. This model prediction has to be completed before the drug infusion rate is changed i.e. every few seconds. Instead of mathematical models like the Pharmacokinetic models more accurate models such as spatio-temporal drug diffusion can be used for improving the prediction and prevention of drug overshoot and undershoot. However, these models require high computation capability of platforms like recent many core GPUs or Intel Xeon Phi (MIC) or IntelCore i7. This work explores thread level and data level parallelism and computation versus communication times of such different model predictive applications used in multiple patient monitoring in hospital data centers exploiting the many core platforms for maximizing the throughput (i.e. patients monitored simultaneously). We also study the energy and performance of these applications to evaluate them for architecture suitability. We show that given a set of MPC applications, mapping on heterogeneous platforms can give performance improvement and energy savings.

关键词： performance Evaluation Platform Maximum Allowable Concentration data layer Control apparatus Patient Monitoring infusion rate Pharmaceutical Preparations Throughput core distributed model predictive control nonlinear model predictive control performance boost Model predictive control Predictive control

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Half-DRAM: a high-bandwidth and Low-power DRAM architecture from the Rethinking of Fine-grained Activation

Half-DRAM: a High-bandwidth and Low-power DRAM Architecture ...

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ACM/IEEE 41st Annual international symposium on computer architecture (ISCA)

作者： Zhang, Tao Chen, Ke Xu, Cong Sun, Guangyu Wang, Tao Xie, Yuan Penn State Univ University Pk PA 16802 USA NVIDIA Corp Santa Clara CA USA Oracle Corp Santa Clara CA USA Peking Univ Beijing Peoples R China

ISBN: (纸本)9781479943944

DRAM memory is a major contributor for the total power consumption in modern computing systems. Consequently, power reduction for DRAM memory is critical to improve system-level power efficiency. Fine-grained DRAM architecture [1, 2] has been proposed to reduce the activation/precharge power However those prior work either incurs significant performance degradation or introduces large area overhead. In this paper;we propose a novel memory architecture Half-DRAM, in which the DRAM array is reorganized to enable only half of a row being activated. The half-row activation can effectively reduce activation power and meanwhile sustain the full bandwidth one bank can provide. In addition, the half: row activation in Half-DRAM relaxes the power constraint in DRAM, and opens up opportunities for further performance gain. Furthermore, two half: row accesses can be issued in parallel by integrating the sub-array level parallelism to improve the memory level parallelism. The experimental results show that Half-DRAM can achieve both significant performance improvement and power reduction, with negligible design overhead.

关键词： Chemical activation

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Xevolver: An XML-based Code Translation Framework for Supporting HPC Application Migration 21

Xevolver: An XML-based Code Translation Framework for Suppor...

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21st international Conference on high performance computing (HiPC)

作者： Takizawa, Hiroyuki Hirasawa, Shoichi Hayashi, Yasuharu Egawa, Ryusuke Kobayashi, Hiroaki Tohoku Univ Sendai Miyagi 9808579 Japan CREST Japan Sci & Technol Agcy Tokyo Japan NEC Corp Ltd Tokyo Japan

ISBN: (纸本)9781479959754

This paper proposes an extensible programming framework to separate platform-specific optimizations from application codes. The framework allows programmers to define their own code translation rules for special demands of individual systems, compilers, libraries, and applications. Code translation rules associated with user-defined compiler directives are defined in an external file, and the application code is just annotated by the directives. For code transformations based on the rules, the framework exposes the abstract syntax tree (Ast) of an application code as an XML document to expert programmers. Hence, the XML document of an Ast can be transformed using any XML-based technologies. Our case studies using real applications demonstrate that the framework is effective to separate platform-specific optimizations from application codes, and to incrementally improve the performance of an existing application without messing up the code.

关键词： Codes XML document Frameworks Ast compilers computer personnel standing Orders high performance computing

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Efficient virtual channel organization and congestion avoidance in multicore NoC systems 26

Efficient virtual channel organization and congestion avoida...

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26th IEEE international symposium on computer architecture and high performance computing Workshops, SBAC-PADW 2014

作者： Oveis-Gharan, Masoud Khan, Gul N. Electrical and Computer Engineering Ryerson University 350 Victoria St TorontoONM5B 2K3 Canada

ISBN: (纸本)9781479970148

Dynamically Allocated Multi Queues (DAMQ) is an effective mechanism to achieve Virtual Channel (VC) based flow control with maximum buffer utilization in multi-core Network-on-Chip (NoC) systems. We present a new methodology to remedy some of the drawbacks of DAMQ technique. The architectural design of a DAMQ router inputport that uses minimal hardware is introduced. Our input-port design saves 70% of combinational-logic and 14.7% register hardware as compared to conventional Link-List input-port. We also present an efficient mechanism to remove traffic congestion in on-chip communication for NoC systems. It improves latency and throughput by 30% and 23% respectively as compared to conventional dynamic Virtual Channel design. © 2014 IEEE.

关键词： Traffic congestion

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