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检索条件"任意字段=21st International Symposium on Computer Architecture and High Performance Computing"

共 1770 条记录，以下是151-160 订阅

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Intrusion-Tolerant Autonomous Driving 21

Intrusion-Tolerant Autonomous Driving

引用

21st IEEE international symposium on Real-Time computing (ISORC)

作者： Volp, Marcus Esteves-Verissimo, Paulo Univ Luxembourg Crit & Extreme Secur & Dependabil Grp CritiX SnT L-2721 Luxembourg Luxembourg

ISBN: (纸本)9781538658475

Fully autonomous driving is one if not the killer application for the upcoming decade of real-time systems. However, in the presence of increasingly sophisticated attacks by highly skilled and well equipped adversarial teams, autonomous driving must not only guarantee timeliness and hence safety. It must also consider the dependability of the software concerning these properties while the system is facing attacks. For distributed systems, fault-and-intrusion tolerance toolboxes already offer a few solutions to tolerate partial compromise of the system behind a majority of healthy components operating in consensus. In this paper, we present a concept of an intrusion-tolerant architecture for autonomous driving. In such a scenario, predictability and recovery challenges arise from the inclusion of increasingly more complex software on increasingly less predictable hardware. We highlight how an intrusion tolerant design can help solve these issues by allowing timeliness to emerge from a majority of complex components being fast enough, often enough while preserving safety under attack through pre-computed fail safes.

关键词： Safety Autonomous vehicles Automobiles Kernel computer architecture Task analysis"

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Analysis and Mitigation of Soft-Errors on high performance Embedded GPUs 21

Analysis and Mitigation of Soft-Errors on High Performance E...

引用

21st IEEE international symposium on Parallel and Distributed computing (ISPDC)

作者： sterpone, L. Azimi, S. De Sio, C. Parisi, F. Politecn Torino Dipartimento Automat & Informat Turin Italy Punch Soft Tronix Elect SW & Testing Div Turin Italy

ISBN: (数字)9781665488020

ISBN: (纸本)9781665488020

Multiprocessor system-on-chip such as embedded GPUs are becoming very popular in safety-critical applications, such as autonomous and semi-autonomous vehicles. However, these devices can suffer from the effects of soft-errors, such as those produced by radiation effects. These effects are able to generate unpredictable misbehaviors. Fault tolerance oriented to multi-threaded software introduces severe performance degradations due to the redundancy, voting and correction threads operations. In this paper, we propose a new fault injection environment for NVIDIA GPGPU devices and a fault tolerance approach based on error detection and correction threads executed during data transfer operations on embedded GPUs. The fault injection environment is capable of automatically injecting faults into the instructions at SASS level by instrumenting the CUDA binary executable file. The mitigation approach is based on concurrent error detection threads running simultaneously with the memory stream device to host data transfer operations. With several benchmark applications, we evaluate the impact of soft-errors classifying Silent Data Corruption, Detection, Unrecoverable Error and Hang. Finally, the proposed mitigation approach has been validated by soft-error fault injection campaigns on an NVIDIA Pascal architecture GPU controlled by Quad-Core A57 ARM processor (JETSON TX2) demonstrating an advantage of more than 37% with respect to state of the art solution.

关键词： Embedded GPUs Soft-Errors high performances Error Detection and Correction

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@neurIst - Towards a system architecture for advanced disease management through integration of heterogeneous data, computing, and complex processing services

@neurIST - Towards a system architecture for advanced diseas...

引用

21st IEEE international symposium on computer-Based Medical Systems

作者： Rajasekaran, H. Lo Iacono, L. Hasselmeyer, P. Fingberg, J. Summers, P. Benkner, S. Engelbrecht, G. Arbona, A. Chiarini, A. Friedrich, C. M. Hofmann-Apitius, M. Kumpf, K. Moore, B. Bijlenga, P. Iavindrasana, J. Mueller, H. Hose, R. D. Dunlop, R. Frangi, A. F. NEC Europe Ltd NEC Labs Europe IT Res Div St Augustin Germany Univ Oxford Oxford OX1 2JD England Univ Vienna Inst Sci Comp A-1010 Vienna Austria GridSyst SA Palma de Mallorca Spain B3C Bio Comp Competence Cent Bologna Italy Fraunhofer Inst SCAI St Augustin Germany IDAC Ireland Ltd Dublin Ireland Univ Geneva CH-1211 Geneva 4 Switzerland Univ Sheffield Sheffield S10 2TN S Yorkshire England Infermed London England Univ Pompeu Fabra Informat & Commun Technol Dept Barcelona Spain

ISBN: (纸本)9780769531656

This paper presents the system architecture of the @neurIst project, which aims at supporting the research and treatment of cerebral aneurysms by bringing together heterogeneous data, computing and complex processing services. The architecture is generic enough to adapt it to the treatment of other diseases beyond cerebral aneurysms. The paper describes the generic requirements of the system and presents the architecture, applications and middle-ware technologies used to realise the system and highlights the innovations in @neurIst.

关键词： Diseases

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21st international symposium on Fault-Tolerant computing

21st International Symposium on Fault-Tolerant Computing

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21st international symposium on Fault-Tolerant computing

ISBN: (纸本)0818621508

This conference proceedings contains 60 papers. The following topics are dealt with: failures in real systems;test generation;system architecture;signature analysis;fault analysis and self checking;hypercube architectures;system diagnosis;software techniques;multiprocessor systems;control flow monitoring;distributed systems;error control and coding;experimental software validation;reconfiguration strategies;and real-time systems.

关键词： computer Systems, Digital

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GridCopy: Moving data fast on the grid

GridCopy: Moving data fast on the grid

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21st international Parallel and Distributed Processing symposium, IPDPS 2007

作者： Kettimuthu, Rajkumar Allcock, William Liming, Lee Navarro, John-Paul Foster, Ian Mathematics and Computer Science Division Argonne National Laboratory Argonne IL 60439 Computation Institute University of Chicago Chicago IL 60637 Department of Computer Science University of Chicago Chicago IL 60637

ISBN: (纸本)1424409101

An important type of communication in grid and distributed computing environments is bulk data transfer. GridFTP has emerged as a de facto standard for secure, reliable, high-performance data transfer across resources on the Grid. GridCopy provides a simple GridFTP client interface to users and extensible configuration that can be changed dynamically by administrators to make efficient data movement in the Grid easier for users. © 2007 IEEE.

关键词： Grid computing

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A customizable framework to access and interconnect clinical patient data and molecular biology information

A customizable framework to access and interconnect clinical...

引用

21st IEEE international symposium on computer-Based Medical Systems

作者： Toepel, Thoralf Univ Bielefeld Fac Technol Bioinformat Med Informat Dept D-33501 Bielefeld Germany

ISBN: (纸本)9780769531656

This work presents a customizable software framework that supports the analysis of correlations between genotype and phenotype within an integrated database in the context of metabolic disorders. The basis for the examination of relations between genotypes and phenotypes is the information from different life science data sources, merged by a mediator-based system in an integrated database. A graphical web interface enables user queries to the integrated data and the trace of connections to corresponding data objects in different information domains. As a result of this work, a web-based prototype of the system is presented. In the context of an example scenario, the framework was used to integrate clinical and molecular biology data for rare metabolic diseases. The framework offers software tools to integrate almost any life science data and to prepare the content for user-specific presentation.

关键词： Databases Logic Data analysis computer architecture Diseases Software tools Biological systems Biology computing Medical diagnostic imaging Systems biology

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Comparing performance of C compilers optimizations on different multicore architectures 29

Comparing performance of C compilers optimizations on differ...

引用

8th international symposium on computer architecture and high performance computing (SBAC-PADW)

作者： Machado, Roger S. Almeida, Ricardo B. Jardim, Andre D. Pernas, Ana M. Yamin, Adenauer C. Cavalheiro, Gerson Geraldo H. Univ Fed Pelotas PPGC 1 Gomes Carneiro St Pelotas RS Brazil

ISBN: (纸本)9781538648193

Multithread programming tools become popular for exploitation of high performance processing with the dissemination of multicore processors. In this context, it is also popular to exploit compiler optimization to improve the performance at execution time. In this work, we evaluate the performance achieved by the use of flags -O1, -O2, and -O3 of two C compilers (GCC and ICC) associated with five different APIs: Pthreads, C++11, OpenMP, Cilk Plus, and TBB. The experiments were performed on two distinct but compatible architectures (Intel Xeon and AMD Opteron). In our experiments, the use of optimization improves the performance independently from the API. We observe that the application scheduling performed by the programming interfaces providing an application level scheduler has more impact on the final performance than the optimizations.

关键词： Optimization Program processors Programming Benchmark testing computer architecture Tools standards

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DOSA: Design Optimizer for Scientific Applications

DOSA: Design Optimizer for Scientific Applications

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21st international Parallel and Distributed Processing symposium, IPDPS 2007

作者： Bader, David A. Prasanna, Viktor K. College of Computing Georgia Institute of Technology Altanta GA 30332 Ming Hsieh Department of Electrical Engineering University of Southern California Los Angeles CA 90089

ISBN: (纸本)1424409101

In this work, we propose an application composition system (ACS) that allows design-time exploration and automatic run-time optimizations so that we relieve application programmers and compiler writers from the challenging task of optimizing the computation in order to achieve high performance. Our new framework, called "Design Optimizer for Scientific Applications" (DOSA), allows the programmer or compiler writer to explore alternative designs and optimize for speed (or power) at design-time and use its run-time optimizer as an automatic ACS. The ACS constructs an efficient application that dynamically adapts to changes in the underlying execution environment based on the kernel model, architecture, system features, available resources, and performance feedback. The run-time system is a portable interface that enables dynamic application optimization by interfacing with the output of DOSA. It thus provides an application composition system that determines suitable components and performs continuous performance optimizations. We focus on utilizing advanced architectural features and memory-centric optimizations that reduce the I/O complexity, cache pollution, and processor-memory traffic, in order to achieve high performance. The design-time effort uses a computer-aided design space exploration that provides a user-friendly graphical modeling environment, high-level performance estimation and profiling, and the ability to integrate low-level simulators suitable for HPC architectures. © 2007 IEEE.

关键词： Software engineering

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A high Throughput No-stall Golomb-Rice Hardware Decoder

A High Throughput No-Stall Golomb-Rice Hardware Decoder

引用

21st Annual international IEEE symposium on Field-Programmable Custom computing Machines (FCCM)

作者： Moussalli, Roger Najjar, Walid Luo, Xi Khan, Amna Univ Calif Riverside Dept Comp Sci & Engn Riverside CA 92521 USA

ISBN: (纸本)9780769549699;9781467360050

Integer compression techniques can generally be classified as bit-wise and byte-wise approaches. Though at the cost of a larger processing time, bit-wise techniques typically result in a better compression ratio. The Golomb-Rice (GR) method is a bit-wise lossless technique applied to the compression of images, audio files and lists of inverted indices. However, since GR is a serial algorithm, decompression is regarded as a very slow process;to the best of our knowledge, all existing software and hardware native (non-modified) GR decoding engines operate bit-serially on the encoded stream. In this paper, we present (1) the first no-stall hardware architecture, capable of decompressing streams of integers compressed using the GR method, at a rate of several bytes (multiple integers) per hardware cycle;(2) a novel GR decoder based on the latter architecture is further detailed, operating at a peak rate of one integer per cycle. A thorough design space exploration study on the resulting resource utilization and throughput of the aforementioned approaches is presented. Furthermore, a performance study is provided, comparing software approaches to implementations of the novel hardware decoders. While occupying 10% of a Xilinx V6LX240T FPGA, the no-stall architecture core achieves a sustained throughput of over 7 Gbps.

关键词： FPGA Golomb-Rice compression decompression inverted index

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high speed, voxel data processing computer architecture

High speed, voxel data processing computer architecture

引用

Proceedings of the 1995 IEEE Engineering in Medicine and Biology 17th Annual Conference and 21st Canadian Medical and Biological Engineering Conference. Part 2 (of 2)

作者： Sallinen, S. Alakuijala, J. Helminen, H. Laitinen, J. Varian-Dosetek Oy Espoo Finland

A new high-performance computer architecture aimed at the computationally intensive applications of biomedical volume data processing is proposed. It features reconfigurable computing elements and a novel memory archi... 详细信息

关键词： computer architecture

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