Scheduling independent tasks on a parallel platform is a widely-studied problem, in particular when the goal is to minimize the total execution time, or makespan (P parallel to C-max problem in Graham's notations)...
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ISBN:
(纸本)9781665443012
Scheduling independent tasks on a parallel platform is a widely-studied problem, in particular when the goal is to minimize the total execution time, or makespan (P parallel to C-max problem in Graham's notations). Also, many applications do not consist of sequential tasks, but rather parallel moldable tasks that can decide their degree of parallelism at execution (i.e., on how many processors they are executed). Furthermore, since the energy consumption of data centers is a growing concern, both from an environmental and economical point of view, minimizing the energy consumption of a schedule is a main challenge to be addressed. One can then decide, for each task, on how many processors it is executed, and at which speed the processors are operated, with the goal to minimize the total energy consumption. We further focus on co-schedules, where tasks are partitioned into shelves, and we prove that the problem of minimizing the energy consumption remains NP-complete when static energy is consumed during the whole duration of the application. We are however able to provide an optimal algorithm for the schedule within one shelf, i.e., for a set of tasks that start at the same time. Several approximation results are derived, and simulations are performed to show the performance of the proposed algorithms.
In this paper, we propose an efficient concurrent wait-free algorithm to construct an unbounded directed graph for shared memory architecture. To the best of our knowledge that this is the first wait-free algorithm fo...
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The recent paradigm shift to multi-core systems results in high system throughput within a specified power budget. However, future systems still require good single thread performance no longer the predominant design ...
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ISBN:
(纸本)9781450300520
The recent paradigm shift to multi-core systems results in high system throughput within a specified power budget. However, future systems still require good single thread performance no longer the predominant design priority to mitigate sequential bottlenecks and/or to guarantee service-level agreements. Unfortunately, near saturation in voltage scaling necessitates a long-term alternative to dynamic voltage and frequency scaling. We propose an energy-proportional computing infrastructure, called WiDGET, that decouples thread context management from a sea of simple execution units (EUs). WiDGET's decoupled design provides flexibility to alter resource allocation for a particular power-performance target while turning off unallocated resources. In other words, WiDGET enables dynamic customization of different combinations of small and/or powerful cores on a single chip, consuming power in proportion to the delivered performance. Over all SPEC CPU2006 benchmarks, WiDGET provides average per-thread performance that is 26% better than a Xeon-like processor while using 8% less power. WiDGET can also scale down to a level comparable to an Atom-like processor, turning off resources to reduce average power by 58%. WiDGET achieves high power efficiency (BIPS3/W), exceeding Xeon-like and Atom-like processors by up to 2x and 21x, respectively.
In this paper we present a cost-effective, high bandwidth server I/O network architecture, named PaScal (Parallel and Scalable). We use the PaScal server I/O network to support data-intensive scientific applications r...
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With the proliferation in the number of devices involved in Industrial Internet, it is becoming more and more difficult to meet simultaneously the requirements of industrial applications in terms of latency and econom...
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Sparse matrix-vector multiplication (SpMV) is one of the important subroutines in numerical linear algebra widely used in plenty of large-scale applications. This paper focuses on scaling and optimizing SpMV for large...
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A study is presented in applying optimistic parallel discrete event simulation techniques using reverse execution to perform instruction-level simulations of distributed memory multi-processor systems. A static progra...
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ISBN:
(纸本)9780769528984
A study is presented in applying optimistic parallel discrete event simulation techniques using reverse execution to perform instruction-level simulations of distributed memory multi-processor systems. A static program analysis approach is described to optimize pre-processed simulated applications in order to remove certain overheads associated with forward event execution and to enable reversible execution. Reverse execution of floating point operations are also considered. Preliminary performance measurements are presented indicating this approach offers promise in speeding up parallel multi-processor simulations.
This conference proceedings contains 60 papers. The following topics are dealt with: failures in real systems;test generation;system architecture;signature analysis;fault analysis and self checking;hypercube architect...
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ISBN:
(纸本)0818621508
This conference proceedings contains 60 papers. The following topics are dealt with: failures in real systems;test generation;system architecture;signature analysis;fault analysis and self checking;hypercube architectures;system diagnosis;software techniques;multiprocessor systems;control flow monitoring;distributed systems;error control and coding;experimental software validation;reconfiguration strategies;and real-time systems.
An overview is given of the architecture of the stratus fault-tolerant computer systems, which were the first to use hardware alone to provide fault tolerance in the commercial marketplace. The power subsystem, system...
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ISBN:
(纸本)0818621508
An overview is given of the architecture of the stratus fault-tolerant computer systems, which were the first to use hardware alone to provide fault tolerance in the commercial marketplace. The power subsystem, system boards, and off-board I/O interface buses are examined in some detail. Recovery scenarios and the stratus service approach are described.
Container-managed persistence is an essential technology as it dramatically simplifies the implementation of enterprise data access. However it can also impose a significant overhead on the performance of the applicat...
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