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检索条件"任意字段=21st International Symposium on Computer Architecture and High Performance Computing"

共 1769 条记录，以下是571-580 订阅

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C-MAP: Improving the effectiveness of mapping method for CGRA by reducing NoC congestion 21

C-MAP: Improving the effectiveness of mapping method for CGR...

引用

21st IEEE international Conference on high performance computing and Communications, 17th IEEE international Conference on Smart City and 5th IEEE international Conference on Data Science and Systems, HPCC/SmartCity/DSS 2019

作者： An, Shuqian Zhang, Mingzhe Ye, Xiaochun Wang, Da Zhang, Hao Fan, Dongrui Tang, Zhimin University of Chinese Academy of Sciences Beijing China State Key Laboratory of Computer Architecture ICT CAS Beijing China

ISBN: (纸本)9781728120584

The Coarse-Grained Reconfigurable architecture (CGRA) is considered as one of the most potential candidates for big data applications, which provides significant throughput improvement and high energy efficiency. Unlike the dynamic issue superscalar method in conventional processors, the CGRA architecture uses the static placement dynamic issue (SPDI) execution method in which the compiler decides how to map the instructions onto the distributed processing elements (PEs) and the PEs executes one instruction when the required data is ready. Since the dataflow of the program is determined in the logical view, an improper mapping of instructions may leads to more network congestion and hurts the performance. Furthermore, the exploration for most optimized mapping in CGRA is proved to a NPC problem and can hardly be achieved in limited time. In this paper, we propose a novel mapping algorithm named Congestion-MAP (C-MAP). C-Map improves the effectiveness of CGRA mapping in the perspective of reducing network congestion and enhancing the continuity of the data-flow. Furthermore, C-Map also accelerates the mapping optimization for CGRA by using network analysis method, which supports the fast comparison of mapping plan and parallel exploration. Additionally, with C-Map, we also analyze the impact of several key considerations in CGRA instruction mapping, such as NoC workload reduction and workload balance. The experiment result shows that C-Map improves the performance by 2.2× as a geometric mean. © 2019 IEEE.

关键词： Network-on-chip

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TensorKMC: Kinetic Monte Carlo Simulation of 50 Trillion Atoms Driven by Deep Learning on a New Generation of Sunway Supercomputer

TensorKMC: Kinetic Monte Carlo Simulation of 50 Trillion Ato...

引用

Supercomputing Conference

作者： Honghui Shang Xin Chen Xingyu Gao Rongfen Lin Lifang Wang Fang Li Qian Xiao Lei Xu Qiang Sun Leilei Zhu Fei Wang Yunquan Zhang Haifeng Song SKL of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China Institute of Applied Physics and Computational Mathematics Beijing China Department of Computer Science and Technology Tsinghua University Wuxin China National Supercomputer Center in Wuxi Wuxi China

ISBN: (数字)9781450384421

ISBN: (纸本)9781665483902

The atomic kinetic Monte Carlo method plays an important role in multi-scale physical simulations because it bridges the micro and macro worlds. However, its accuracy is limited by empirical potentials. We therefore propose herein a triple-encoding algorithm and vacancy-cache mechanism to efficiently integrate ab initio neural network potentials (NNPs) with AKMC and implement them in our TensorKMC codes. We port our program to SW26010-pro and innovate a fast feature operator and a big fusion operator for the NNPs for fully utilizing the powerful heterogeneous computing units of the new-generation Sunway supercomputer. We further optimize memory usage. With these improvements, TensorKMC can simulate up to 54 trillions of atoms and achieve excellent strong and weak scaling performance up to 27,456,000 cores.

关键词： Technological innovation Monte Carlo methods Codes Quantum chemistry high performance computing Optimization methods Artificial neural networks

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high-performance tensor decoder on GPUs for wireless camera networks in IoT 21

High-performance tensor decoder on GPUs for wireless camera ...

引用

作者： Li, Hai Zhang, Tao Zhang, Runjia Liu, Xiao-Yang School of Computer Engineering and Science Shanghai University China Department of Electrical Engineering Columbia University United States Shanghai Institute for Advanced Communication and Data Science China

ISBN: (纸本)9781728120584

With the rapid development of the Internet of Things, tensor-based coding and decoding algorithms are widely used in wireless camera networks. Recently, a novel video decoder based on the low-tubal-rank tensor model has been proposed, which achieves better quality of services than conventional schemes. However, the tensor decoding algorithm is compute-intensive, rendering it impractical for real-time applications. In this paper, we propose effective strategies to accelerate the tensor decoder on GPUs (Graphics Processing Units). We implement the tensor decoding algorithm on the GPU architecture, and propose optimization strategies to eliminate data reorganizing overhead, provide batched complex matrix computations, and reduce memory consumption as well as computation overhead. With real video data, the GPU algorithm achieves an average of 237.44X and up to 312.39X speedups on a Tesla V100 GPU versus the CPU algorithm on a multi-core CPU, while preserving similar recovery errors. The recovered video by this high performance GPU tensor decoder shows good visual effects. © 2019 IEEE.

关键词： Graphics processing unit

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Efficient differentiated storage architecture for large-scale flow tables in openflow networks 21

Efficient differentiated storage architecture for large-scal...

引用

作者： Xiong, Bing Wu, Rengeng Liao, Zhuofan Wang, Jin School of Computer AND Communication Engineering Changsha University of Science AND Technology Changsha410114 China Department of Computer and Information Sciences Temple University Philadelphia19122 United States Hunan Provincial Key Laboratory of Intelligent Processing of Big Data on Transportation Changsha University of Science AND Technology Changsha China

ISBN: (纸本)9781728120584

As a novel network paradigm, Software Defined Networking (SDN) decouples control logic functions from data forwarding devices, and introduces a separate control plane to manipulate underlying switches via southbound interfaces like OpenFlow. However, it leads to large-scale flow tables and poses serious challenges on their storage resources and lookup performance in OpenFlow switches. This paper is thus motivated to propose an efficient differentiated storage architecture for large-scale flow tables in OpenFlow networks. Firstly, we investigate into the impact of wildcards in match fields on packet-in-batch property within a flow based on network traffic locality. Then, packet flows are dynamically distinguished into active ones and idle ones in terms of their short-term states. Subsequently, we store the match fields of active flows and idle flows respectively in TCAM and SRAM, and the content fields of both types of flows in DRAM, to effectively relieve the insufficiency of TCAM capacity. Finally, we evaluate the performance of our proposed flow table storage architecture with real network traffic traces by experiments. The experimental results indicate that our proposed storage architecture obviously outperforms the traditional one applying the elephant/mice flow differentiation method in terms of TCAM hit rates and average flow table access time. © 2019 IEEE.

关键词： Software defined networking

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OeIM: An optoelectronic interconnection middleware for the exascale computer 21

OeIM: An optoelectronic interconnection middleware for the e...

引用

作者： Shao, En Tan, Guangming Wang, Zhan Sun, Ninghui State Key Laboratory of Computer Architecture Institute of Computing Technology CAS Beijing China University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9781728120584

During the improved process of hardware technology and program optimization in the high-performance computer (HPC), the overall computing ability of supercomputer increases correspondingly. As a large-scale system and a milestone to the HPC community shortly, the envisioned exascale computer will be comprised of nearly 5000 interconnected nodes and tens of thousands of computing nodes. Interconnection innovations in such a system are critical to improving overall computing ability. In this paper, we investigate optoelectronic interconnection in an exascale computer system design. Here, we propose a new software stack called Optoelectronic Interconnection Middleware (OeIM) to enable efficient utilization of the optical interconnection. OeIM allows for the use of two novel functions, namely the reconfigurable function and the running-time function. We evaluate OeIM using both communication benchmark (IMB) and real-world motif applications (Linpack, HPCG, and Graph500) in a prototyped exascale computer. The experiment shows that OeIM reduced latency by form 20 to 35% in the large-range communication, improved throughput by 30% in the long-distance communication, and improved the motif applications by more than 10%. Together, our results demonstrate that OeIM is an effective bridge between the optical switching device and system scheduler to improve communication capability. © 2019 IEEE.

关键词： Middleware

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Collaborative management system driven by task flow in supercomputing environment 21

Collaborative management system driven by task flow in super...

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作者： Li, Jianzeng Meng, Xiangfei Xiao, Jian Zhang, Ting Sun, Huawen Peng, Xiuqian NationalSupercomputer Center in Tianjin Tianjin300457 China College of Intelligence and Computing Tianjin University Tianjin300350 China

ISBN: (纸本)9781728120584

In order to improve the integration of super computer and advanced manufacturing, and establish a multi-disciplinary collaborative research and development mechanis-m based on supercomputer, this paper proposes a collaborative flow management solution driven by task flow. Then, Co-llaborative management platform driven by task flow is designed and developed. The platform, which can provide good scalability and flexible configuration strategy in network communication, task flow processing, access control, concur-ency control, etc. Finally, based on this platform, Collaborative management system driven by task flow is built and imple-mented. The system has been integrated with the super-computer job management. © 2019 IEEE.

关键词： Supercomputers

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E.T.: Re-Thinking Self-Attention for Transformer Models on GPUs

E.T.: Re-Thinking Self-Attention for Transformer Models on G...

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Supercomputing Conference

作者： Shiyang Chen Shaoyi Huang Santosh Pandey Bingbing Li Guang R. Gao Long Zheng Caiwen Ding Hang Liu Stevens Institute of Technology University of Connecticut University of Delaware

ISBN: (数字)9781450384421

ISBN: (纸本)9781665483902

Transformer-based deep learning models have become a ubiquitous vehicle to drive a variety of Natural Language Processing (NLP) related tasks beyond their accuracy ceiling. However, these models also suffer from two pronounced challenges, that is, gigantic model size and prolonged turnaround time. To this end, we introduce E.T. that rE-thinks self-attention computation for Transformer models on GPUs with the following contributions: First, we introduce a novel self-attention architecture, which encompasses two tailored self-attention operators with corresponding sequence length-aware optimizations, and operation reordering optimizations. Second, we present an attention-aware pruning design which judiciously uses various pruning algorithms to reduce more computations hence achieves significantly shorter turnaround time. For the pruning algorithms, we not only revamp the existing pruning algorithms, but also tailor new ones for transformer models. Taken together, we evaluate E.T. across a variety of benchmarks for Transformer, BERT BASE and DistilBERT, where E.T. presents superior performance over the mainstream projects, including the popular Nvidia Enterprise solutions, i.e., TensorRT and FasterTransformer.

关键词： Deep learning Tensors Computational modeling high performance computing computer architecture Benchmark testing Transformers

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An efficient data collection module on petascale systems 21

An efficient data collection module on petascale systems

引用

作者： Huang, Huang Xiao, Tong Li, Chuanying Leng, Can Lu, Yutong College of Computer National University of DefenseTechnology Changsha410073 China National Supercomputer Center in Changsha Changsha410082 China College of Computer Science and Electronic Engineering Hunan University Changsha410082 China College of Computer National University of Defense Technology Changsha410073 China School of Data and Computer Science Sun Yat-Sen University Guangzhou510006 China

ISBN: (纸本)9781728120584

Not only for increasing scalability up to exascale systems but even for contemporary supercomputer architectures does it require substantial efforts to efficiently collect that contains system fault information within the framework of faults prediction. In this term, the article mainly focuses on efficient data collection, preferring to optimize an effective module to improve the efficiency of data collection in petascale system. The core of our module includes a data collection acceleration layer scheduled by H2FS. Hereafter, we conducted extensive tests based on a petascale system to verify the solution, and the experimental results demonstrate to be effectiveness and scalability of our module. © 2019 IEEE.

关键词： Scalability

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Data shepherding: A last level cache design for large scale chips 21

Data shepherding: A last level cache design for large scale ...

引用

作者： Jang, Ganghee Gaudiot, Jean-Luc Electrical and Computer Engineering Clarkson University Potsdam United States Electrical Engineering and Computer Science University of California Irvine Irvine United States

ISBN: (纸本)9781728120584

Newer chips include cache memories as large as 128 MB to sustain the bandwidth for the GPGPU module. As 128 MB was a reasonable main memory size a decade ago, we examine the design impact of a larger granularity in the management of caches. We thus propose a cache memory design called the Data Shepherding Cache for larger last level caches. Even with a granularity as large as a page for the management of the last level cache, our Data Shepherding Cache could achieve reasonable performance from a smaller area footage over the same sized set associative cache. © 2019 IEEE.

关键词： Cache memory

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Toward data discovery in dynamic smart city applications 21

Toward data discovery in dynamic smart city applications

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作者： Moeini, Hessam Zeng, Wenxi Yen, I-Ling Bastani, Farokh Department of Computer Science University of Texas Dallas United States

ISBN: (纸本)9781728120584

A smart city leverages the IoT capabilities to ensure the well-being of the inhabitants and their activities in the city. IoT based data collection and data analytics are the fundamental technologies to achieve the goal. Due to the wide varieties of environment conditions and activities that are to be monitored for the urban environment, a large number of sensors of all sorts are deployed across the city and the number of different data streams collected from these sensors can be tremendous. At the same time, different analysis tasks and dynamic queries may be issued and, correspondingly, the relevant data need to be efficiently discovered, retrieved, and analyzed in order to provide the desired answers. As can be seen, how to manage all the IoT data streams to facilitate data discovery can be highly challenging. In this paper, we discuss a set of scenarios to show the importance of data management and discovery in the smart city environment. Then, we present a semantic model for smart city data specification to facilitate data discovery. Finally, we discuss an edge-centric architecture and the data discovery approach for enabling efficient and effective dynamic smart city data analytics. © 2019 IEEE.

关键词： Internet of things

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