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21st ACM SIGPLAN symposium on Principles and Practice of Parallel Programming (PPoPP)

作者： Wang, Yangzihao Davidson, Andrew Pan, Yuechao Wu, Yuduo Riffel, Andy Owens, John D. Univ Calif Davis Davis CA 95616 USA Google Mountain View CA USA IBM Corp New York NY USA

ISBN: (纸本)9781450340922

For large-scale graph analytics on the GPU, the irregularity of data access/control flow and the complexity of programming GPUs have been two significant challenges for developing a programmable high-performance graph library. "Gunrock," our high-level bulk-synchronous graph-processing system targeting the GPU, takes a new approach to abstracting GPU graph analytics: rather than designing an abstraction around computation, Gunrock instead implements a novel data-centric abstraction centered on operations on a vertex or edge frontier. Gunrock achieves a balance between performance and expressiveness by coupling high-performance GPU computing primitives and optimization strategies with a high-level programming model that allows programmers to quickly develop new graph primitives with small code size and minimal GPU programming knowledge. We evaluate Gunrock on five graph primitives (BFS, BC, SSSP, CC, and PageRank) and show that Gunrock has on average at least an order of magnitude speedup over Boost and PowerGraph, comparable performance to the fastest GPU hardwired primitives, and better performance than any other GPU high-level graph library.

关键词： Graphics processing unit

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stOCK: stochastic Checkers for Low-overhead Approximate Error Detection 16

STOCK: Stochastic Checkers for Low-overhead Approximate Erro...

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21st IEEE/ACM international symposium on Low Power Electronics and Design (ISLPED)

作者： Gala, Neel Venkataramani, Swagath Raghunathan, Anand Kamakoti, V IIT Madras Comp Sci & Engn Dept Chennai Tamil Nadu India Purdue Univ Sch Elect & Comp Engn W Lafayette IN 47907 USA

ISBN: (纸本)9781450341851

Designing reliable systems, while eschewing the high overheads of conventional fault tolerance techniques, is a critical challenge in the deeply scaled CMOS and post-CMOS era. To address this challenge, we leverage the intrinsic resilience of application domains such as multimedia, recognition, mining, search, and analytics where acceptable outputs are produced despite occasional approximate computations. We propose stochastic checkers, wherein a stochastic logic based realization of the circuit is used as an error checker, and the original circuit's output is declared to be correct if it lies within a certain range of the checker's output. The key benefit of stochastic checkers is that the intrinsic compactness of stochastic logic leads to greatly reduced overheads. However, due to the approximate nature of stochastic circuits, errors that cause the output to be within a certain range of the correct value may not be detected (missed coverage). In addition, some correct outputs may be incorrectly flagged as erroneous (false positives). To limit the number of missed errors and false positives, we propose a technique that uses input permuted partial replicas of the stochastic logic to improve accuracy without greatly increasing the overheads. We also address the challenge of error detection latency (due to the bit-serial nature of stochastic logic) through progressive checking policies that produce an early decision based on a prefix of the checker's output bitstream. We evaluate stochastic checkers on hardware implementations of a suite of error-resilient applications, and demonstrate that they can lead to greatly reduced overheads (29.5% area and 21.5% power, on average) compared to traditional fault tolerance techniques, while achieving very high coverage (average of 99.5%) and very low false positives (average of 0.1%).

关键词： stochastic computing Approximate computing Error Detection Low Power Progressive Checking Partial Replicas

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Evidence for the Higgs Boson Decay to a Z Boson and a Photon at the LHC

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Physical Review Letters 2024年第2期132卷 021803-021803页

作者： G. Aad B. Abbott K. Abeling N. J. Abicht S. H. Abidi A. Aboulhorma H. Abramowicz H. Abreu Y. Abulaiti B. S. Acharya C. Adam Bourdarios L. Adamczyk L. Adamek S. V. Addepalli M. J. Addison J. Adelman A. Adiguzel T. Adye A. A. Affolder Y. Afik M. N. Agaras J. Agarwala A. Aggarwal C. Agheorghiesei A. Ahmad F. Ahmadov W. S. Ahmed S. Ahuja X. Ai G. Aielli A. Aikot M. Ait Tamlihat B. Aitbenchikh I. Aizenberg M. Akbiyik T. P. A. Åkesson A. V. Akimov D. Akiyama N. N. Akolkar K. Al Khoury G. L. Alberghi J. Albert P. Albicocco G. L. Albouy S. Alderweireldt M. Aleksa I. N. Aleksandrov C. Alexa T. Alexopoulos F. Alfonsi M. Algren M. Alhroob B. Ali H. M. J. Ali S. Ali S. W. Alibocus M. Aliev G. Alimonti W. Alkakhi C. Allaire B. M. M. Allbrooke J. F. Allen C. A. Allendes Flores P. P. Allport A. Aloisio F. Alonso C. Alpigiani M. Alvarez Estevez A. Alvarez Fernandez M. Alves Cardoso M. G. Alviggi M. Aly Y. Amaral Coutinho A. Ambler C. Amelung M. Amerl C. G. Ames D. Amidei S. P. Amor Dos Santos K. R. Amos V. Ananiev C. Anastopoulos T. Andeen J. K. Anders S. Y. Andrean A. Andreazza S. Angelidakis A. Angerami A. V. Anisenkov A. Annovi C. Antel M. T. Anthony E. Antipov M. Antonelli F. Anulli M. Aoki T. Aoki J. A. Aparisi Pozo M. A. Aparo L. Aperio Bella C. Appelt A. Apyan N. Aranzabal C. Arcangeletti A. T. H. Arce E. Arena J-F. Arguin S. Argyropoulos J.-H. Arling O. Arnaez H. Arnold G. Artoni H. Asada K. Asai S. Asai N. A. Asbah J. Assahsah K. Assamagan R. Astalos S. Atashi R. J. Atkin M. Atkinson H. Atmani P. A. Atmasiddha K. Augsten S. Auricchio A. D. Auriol V. A. Austrup G. Avolio K. Axiotis G. Azuelos D. Babal H. Bachacou K. Bachas A. Bachiu F. Backman A. Badea P. Bagnaia M. Bahmani A. J. Bailey V. R. Bailey J. T. Baines L. Baines C. Bakalis O. K. Baker E. Bakos D. Bakshi Gupta V. Balakrishnan R. Balasubramanian E. M. Baldin P. Balek E. Ballabene F. Balli L. M. Baltes W. K. Balunas J. Balz E. Banas M. Bandieramonte A. Bandyopadhyay S. Bansal L. Barak M. Barakat E. L. Barberio D. Barberis M. Barbero M. Z. Barel K. N. Barends T. Ba Benemerita Universidad Autonoma de Puebla Puebla Mexico ETH Zurich—Institute for Particle Physics and Astrophysics (IPA) Zurich Switzerland Institute of Nuclear Research ATOMKI Debrecen Hungary National and Kapodistrian University of Athens Athens Greece Escuela Politecnica Nacional Quito Ecuador Faculté des sciences Université Mohammed V Rabat Morocco University of Florida Gainesville Florida USA Fermi National Accelerator Laboratory Batavia Illinois USA University of Ruhuna Department of Physics Matara Sri Lanka INFN Sezione di Bologna Bologna Italy Università di Bologna Bologna Italy Vrije Universiteit Brussel Brussel Belgium AGH University of Krakow Faculty of Physics and Applied Computer Science Krakow Poland The University of Iowa Iowa City Iowa USA Institute Rudjer Boskovic Zagreb Croatia Universidad Iberoamericana Mexico City Mexico Instituto de Física de Cantabria (IFCA) CSIC-Universidad de Cantabria Santander Spain Department of Physics Istanbul University Istanbul Türkiye Imperial College London United Kingdom Baylor University Waco Texas USA Lappeenranta-Lahti University of Technology Lappeenranta Finland Instituto De Alta Investigación Universidad de Tarapacá Casilla 7 D Arica Chile INFN Sezione di Genova Genova Italy Università di Genova Genova Italy Centro de Investigacion y de Estudios Avanzados del IPN Mexico City Mexico Department of Physics Alexandru Ioan Cuza University of Iasi Iasi Romania National Centre for Physics Quaid-I-Azam University Islamabad Pakistan Laboratoire Leprince-Ringuet CNRS/IN2P3 Ecole Polytechnique Institut Polytechnique de Paris Palaiseau France University of Canterbury Christchurch New Zealand Riga Technical University Riga Latvia Department of Modern Physics and State Key Laboratory of Particle Detection and Electronics University of Science and Technology of China Hefei China INFN Sezione di Padova Padova Italy Università di Padova Padova Italy University of Mississippi Oxford Mississi

The first evidence for the Higgs boson decay to a Z boson and a photon is presented, with a statistical significance of 3.4 standard deviations. The result is derived from a combined analysis of the searches performed by the ATLAS and CMS Collaborations with proton-proton collision datasets collected at the CERN Large Hadron Collider (LHC) from 2015 to 2018. These correspond to integrated luminosities of around 140 fb−1 for each experiment, at a center-of-mass energy of 13 TeV. The measured signal yield is 2.2±0.7 times the standard model prediction, and agrees with the theoretical expectation within 1.9 standard deviations.

关键词： Rare decays Higgs bosons W & Z bosons Hadron colliders

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HCloud: Resource-Efficient Provisioning in Shared Cloud Systems 16

HCloud: Resource-Efficient Provisioning in Shared Cloud Syst...

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21st international Conference on Architectural Support for Programming Languages and Operating Systems

作者： Delimitrou, Christina Kozyrakis, Christos Stanford Univ Stanford CA 94305 USA Cornell Univ Ithaca NY 14853 USA Ecole Polytech Fed Lausanne Lausanne Switzerland

ISBN: (纸本)9781450340915

Cloud computing promises flexibility and high performance for users and cost efficiency for operators. To achieve this, cloud providers offer instances of different sizes, both as long-term reservations and short-term, on-demand allocations. Unfortunately, determining the best provisioning strategy is a complex, multi-dimensional problem that depends on the load fluctuation and duration of incoming jobs, and the performance unpredictability and cost of resources. We first compare the two main provisioning strategies (reserved and on-demand resources) on Google Compute Engine (GCE) using three representative workload scenarios with batch and latency-critical applications. We show that either approach is suboptimal for performance or cost. We then present HCloud, a hybrid provisioning system that uses both reserved and on-demand resources. HCloud determines which jobs should be mapped to reserved versus on-demand resources based on overall load, and resource unpredictability. It also determines the optimal instance size an application needs to satisfy its Quality of Service (QoS) constraints. We demonstrate that hybrid configurations improve performance by 2.1x compared to fully on-demand provisioning, and reduce cost by 46% compared to fully reserved systems. We also show that hybrid strategies are robust to variation in system and job parameters, such as cost and system load.

关键词： datacenter provisioning QoS latency resource efficiency hybrid cloud computing

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Equivalence Checking of a Floating-Point Unit Against a high-Level C Model 21st

Equivalence Checking of a Floating-Point Unit Against a High...

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21st international symposium on Formal Methods (FM)

作者： Mukherjee, Rajdeep Joshi, Saurabh Griesmayer, Andreas Kroening, Daniel Melham, Tom Univ Oxford Oxford England IIT Hyderabad Hyderabad Telangana India ARM Ltd Cambridge England

ISBN: (纸本)9783319489896;9783319489889

Semiconductor companies have increasingly adopted a methodology that starts with a system-level design specification in C/C++/SystemC. This model is extensively simulated to ensure correct functionality and performance. Later, a Register Transfer Level (RTL) implementation is created in Verilog, either manually by a designer or automatically by a high-level synthesis tool. It is essential to check that the C and Verilog programs are consistent. In this paper, we present a two-step approach, embodied in two equivalence checking tools, VERIFOX and HW-CBMC, to validate designs at the software and RTL levels, respectively. VERIFOX is used for equivalence checking of an untimed software model in C against a high-level reference model in C. HW-CBMC verifies the equivalence of a Verilog RTL implementation against an untimed software model in C. To evaluate our tools, we applied them to a commercial floating-point arithmetic unit (FPU) from ARM and an open-source dual-path floating-point adder.

关键词： Digital arithmetic

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Proceedings of the international Conference on Parallel and Distributed Systems - ICPADS

Proceedings of the International Conference on Parallel and ...

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21st IEEE international Conference on Parallel and Distributed Systems, ICPADS 2015

ISBN: (纸本)9780769557854

The proceedings contain 107 papers. The topics discussed include: jamming with power boost: leaky waveguide vulnerability in train systems;low cost IoT software development - ingredient transformation and interconnection;relay and power splitting ratio selection for cooperative networks with energy harvesting;a memetic algorithm for dynamic shortest path routing on mobile ad-hoc networks;FlashLite: a high performance machine for data intensive science;big data analytics-enhanced cloud computing: challenges, architectural elements, and future directions;iCal: intervention-free calibration for measuring noise with smartphones;learning resource management specifications in smartphones;and unobtrusive posture recognition via online learning of multi-dimensional RFID received signal strength.

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BRAINIAC: Bringing Reliable Accuracy Into Neurally-Implemented Approximate computing 21

BRAINIAC: Bringing Reliable Accuracy Into Neurally-Implement...

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IEEE 21st international symposium on high performance computer architecture (HPA)

作者： Grigorian, Beayna Farahpour, Nazanin Reinman, Glenn Univ Calif Los Angeles Dept Comp Sci Los Angeles CA 90024 USA

ISBN: (纸本)9781479989300

Applications with large amounts of data, real-time constraints, ultra-low power requirements, and heavy computational complexity present significant challenges for modern computing systems, and often fall within the category of high performance computing (HPC). As such, computer architects have looked to high performance single instruction multiple data (SIMD) architectures, such as accelerator-rich platforms, for handling these workloads. However, since the results of these applications do not always require exact precision, approximate computing may also be leveraged. In this work, we introduce BRAINIAC, a heterogeneous platform that combines precise accelerators with neural-network-based approximate accelerators. These reconfigurable accelerators are leveraged in a multi-stage flow that begins with simple approximations and resorts to more complex ones as needed. We employ high-level, application-specific light-weight checks (LWCs) to throttle this multi-stage acceleration flow and reliably ensure user-specified accuracy at runtime. Evaluation of the performance and energy of our heterogeneous platform for error tolerance thresholds of 5%-25% demonstrates an average of 3x gain over computation that only includes precise acceleration, and 15x-35x gain over software-based computation.

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Scalable adaptive NUMA-aware Lock combining local locking and remote locking for efficient concurrency 16

Scalable adaptive NUMA-aware Lock combining local locking an...

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21st ACM SIGPLAN symposium on Principles and Practice of Parallel Programming, PPoPP 2016

作者： Zhang, Mingzhe Lau, Francis C.M. Wang, Cho-Li Cheng, Luwei Chen, Haibo Dept. Computer Science University of Hong Kong Hong Kong Facebook United States Institute of Parallel and Distributed Systems Shanghai Jiao Tong University China

ISBN: (纸本)9781450340922

Scalable locking is a key building block for scalable multi-threaded software. Its performance is especially critical in multi-socket, multi-core machines with non-uniform memory access (NUMA). Previous schemes such as local locking and remote locking only perform well under a certain level of contention, and often require non-trivial tuning for a particular configuration. Besides, for large NUMA systems, because of unmanaged lock server's nomination, current distance-first NUMA policies cannot perform satisfactorily. In this work, we propose SANL, a locking scheme that can de-liver high performance under various contention levels by adap-tively switching between the local and the remote lock scheme. Furthermore, we introduce a new NUMA policy for the remote lock that jointly considers node distances and server utilization when choosing lock servers. A comparison with seven represen-tative locking schemes shows that SANL outperforms the others in most contention situations. In one group test, SANL is 3.7 times faster than RCL lock and 17 times faster than POSIX mutex. © 2016 ACM.

关键词： Locks (fasteners)

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SCOC: high-Radix Switches Made of Bufferless Clos Networks 21

SCOC: High-Radix Switches Made of Bufferless Clos Networks

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IEEE 21st international symposium on high performance computer architecture (HPA)

作者： Chrysos, Nikolaos Minkenberg, Cyriel Rudquist, Mark Basso, Claude Vanderpool, Brian IBM Res Zurich Zurich Switzerland IBM Syst & Technol Grp Rochester MN USA

ISBN: (纸本)9781479989300

In today's datacenters handling big data and for exascale computers of tomorrow, there is a pressing need for high-radix switches to economically and efficiently unify the computing and storage resources that are dispersed across multiple racks. In this paper, we present SCOC, a switch architecture suitable for economical IC implementation that can efficiently replace crossbars for high-radix switch nodes. SCOC is a multi-stage bufferless network with O(N-2/m) cost, where m is a design parameter, practically ranging between 4 - 16. We identify and resolve more than five fairness violations that are pertinent to hierarchical scheduling. Effectively, from a performance perspective, SCOC is indistinguishable from efficient flat crossbars. computer simulations show that it competes well or even outperforms flat crossbars and hierarchical switches. We report data from our ASIC implementation at 32 nm of a SCOC 136x136 switch, with shallow buffers, connecting 25 Gb/s links. In this first incarnation, SCOC is used at the spines of a server-rack, fat-tree network. Internally, it runs at 9.9 Tb/s, thus offering a speedup of 1.45x, and provides a fall-through latency of just 61 ns.

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Variable length coding for GPU-based direct volume rendering 21

Variable length coding for GPU-based direct volume rendering

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21st international symposium on Vision, Modeling and Visualization, VMV 2016

作者： Guthe, S. Goesele, M. Graphics Capture and Massively Parallel Computing TU Darmstadt Germany

ISBN: (纸本)9783038680253

The sheer size of volume data sampled in a regular grid requires efficient lossless and lossy compression algorithms that allow for on-the-fly decompression during rendering. While all hardware assisted approaches are based on fixed bit rate block truncation coding, they suffer from degradation in regions of high variation while wasting space in homogeneous areas. On the other hand, vector quantization approaches using texture hardware achieve an even distribution of error in the entire volume at the cost of storing overlapping blocks or bricks. However, these approaches suffer from severe blocking artifacts that need to be smoothed over during rendering. In contrast to existing approaches, we propose to build a lossy compression scheme on top of a state-of-the-art lossless compression approach built on non-overlapping bricks by combining it with straight forward vector quantization. Due to efficient caching and load balancing, the rendering performance of our approach improves with the compression rate and can achieve interactive to real-time frame rates even at full HD resolution. © 2016 The Author(s) Eurographics Proceedings © 2016 The Eurographics Association.

关键词： Brick

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