This paper introduces Spicedim, a graphical programming interface for integrated CMOS circuit design. It connects the SPICE netlist level to an easy to use programming language, both combined in a graphical developmen...
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ISBN:
(纸本)9781612841519
This paper introduces Spicedim, a graphical programming interface for integrated CMOS circuit design. It connects the SPICE netlist level to an easy to use programming language, both combined in a graphical development environment. After classifying the context of this tool the fundamental application for parametric circuit simulation and signal processing is shown. This is done at the example of a parameterizable netlist for a current mirror. Further on, Spicedim supports calculations at single MOS-device for a device by device circuit sizing concept. Normally required input parameters for SPICE can be set to be calculated in dependence of specified normally calculated output parameters.
The proceedings contain 5 papers. The topics discussed include: domain engineering: what is it?;domain dependent semantic requirement engineering;a UML profile for conceptual modeling in GIS domain;a UML profile for d...
The proceedings contain 5 papers. The topics discussed include: domain engineering: what is it?;domain dependent semantic requirement engineering;a UML profile for conceptual modeling in GIS domain;a UML profile for domain specific patterns: application to real-time;and bridging programming productivity, expressiveness, and applicability: a domain engineering approach.
In this paper we make the design, the simulation and the implementation of a NoC (Network on Chip) 2-ary 4-fly in order to evaluate the speed up of an application with different NoC sizes. For the conception of the No...
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ISBN:
(纸本)9781612841519
In this paper we make the design, the simulation and the implementation of a NoC (Network on Chip) 2-ary 4-fly in order to evaluate the speed up of an application with different NoC sizes. For the conception of the NoC, we use the tool NoCcompiler from Arteris Company. To test the performance of this NoC we integrate it as an IP (Intellectual Property) into an EDK project where masters are 16 Microblazes processors and slaves are 16 blocks memories. As an application, we choose the parallel programming to compute a filter Harris of an image 256x256. This work is implemented on Eve platform emulation called Zebu UF4. Results have proved the efficiency of this parallel architecture with a reduction equal to 90% of the execution time. The non linearity of the speed up's curve is coherent with the theorical modelisation and simulation presented in[1].
programming contests are generally intended to popularize computer science, particularly algorithmic thinking andprogramming skills. However, such contests are addressed to a limited group of pupils - those that can ...
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ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transformations based on And-Inverter Graphs (A...
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ISBN:
(纸本)9783642142949
ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transformations based on And-Inverter Graphs (AlGs), with a variety of innovative algorithms. A focus on the synergy of sequential synthesis and sequential verification leads to improvements in both domains. This paper introduces ABC, motivates its development, and illustrates its use in formal verification.
In a maritime area supervision context, we seek providing a human operator with dynamic information on the behaviors of the monitored entities. Linking raw measurements, coming from sensors, with the abstract descript...
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ISBN:
(纸本)9780769542638
In a maritime area supervision context, we seek providing a human operator with dynamic information on the behaviors of the monitored entities. Linking raw measurements, coming from sensors, with the abstract descriptions of those behaviors is a tough challenge. This problem is usually addressed with a two-stepped treatment: filtering the multidimensional, heterogeneous and imprecise measurements into symbolic events and then using efficient plan recognition techniques on those events. This allows, among other things, the possibility of describing high level symbolic plan steps without being overwhelmed by low level sensor specificities. However, the first step is information destructive and generates additional ambiguity in the recognition process. Furthermore, splitting the behavior recognition task leads to unnecessary computations and makes the building of the plan library tougher. Thus, we propose to tackle this problem without dividing the solution into two processes. We present a hierarchical model, inspired by the formal language theory, allowing us to describe behaviors in a continuous way, and build a bridge over the semantic gap between measurements and intents. Thanks to a set of algorithms using this model, we are able, from observations, to deduce the possible future developments of the monitored area while providing the appropriate explanations.
During past few years FPGAs have seen a rapid growth in their logic capacity which has led to the increasing use of FPGAs for the implementation of arithmetic-intensive applications. Arithmetic-intensive applications ...
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ISBN:
(纸本)9781612841519
During past few years FPGAs have seen a rapid growth in their logic capacity which has led to the increasing use of FPGAs for the implementation of arithmetic-intensive applications. Arithmetic-intensive applications often contain large portion of datapath circuits. Datapath circuits usually contain hard-blocks (e. g. multipliers, adders, memories etc) that are connected together by regularly structured signals called buses. Conventional FPGAs do not use the regularity of datapath circuits. So it is possible to modify the conventional FPGA architectures to exploit the regularity of datapath circuits and achieve significant area savings. This paper describes a new tree-based FPGA architecture that uses bus-based connections and exploits the regularity of datapath circuits to achieve area savings. Experiments show that the proposed architecture is 24%, 21% more area efficient than conventional mesh-based and tree-based architectures respectively.
We present an algorithm to answer complex questions in Natural Language that are a boolean combination of simple questions. The main feature of this algorithm is to use a probabilistic Prolog (ProbLog) to handle the u...
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We present an algorithm to answer complex questions in Natural Language that are a boolean combination of simple questions. The main feature of this algorithm is to use a probabilistic Prolog (ProbLog) to handle the uncertainty of answers obtained by information extraction systems such as TextRunner. The results shown in this paper indicate that the use of ProbLog improves the answers given by a system that parses complex questions with light linguistic mechanisms. Therefore, using a probabilistic setting can be seen as a promising approach for the enhancement of open information extraction systems based on weak wlinguistic algorithms.
We present an approach to monitoring system policies. As a specification language, we use an expressive fragment of a temporal logic, which can be effectively monitored. We report on case studies in security and compl...
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ISBN:
(纸本)9783642142949
We present an approach to monitoring system policies. As a specification language, we use an expressive fragment of a temporal logic, which can be effectively monitored. We report on case studies in security and compliance monitoring and use these to show the adequacy of our specification language for naturally expressing complex, realistic policies and the practical feasibility of monitoring these policies using our monitoring algorithm.
The proceedings contain 127 papers. The topics discussed include: web service classification using support vector machine;off-line signature verification: an approach based on combining distances and one-class classif...
ISBN:
(纸本)9780769542638
The proceedings contain 127 papers. The topics discussed include: web service classification using support vector machine;off-line signature verification: an approach based on combining distances and one-class classifiers;an ant based approach for generating procedural animations;traffic signal control by using traffic congestion prediction based on pheromone model;action selection and sequencing in multiagent systems: an approximate algorithm based on swarm intelligence;metropolis particle swarm optimization algorithm with mutation operator for global optimization problems;continuous search in constraint programming;fault localization in constraint programs;constraint-based vehicle configuration: a case study;strategy and fairness in repeated two-agent interaction;an adaptive prediction-regret driven strategy for bilateral bargaining;and using cellular automata pedestrian flow statistics with heuristic search to automatically design spatial layout.
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