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检索条件"任意字段=25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2020"

共 39 条记录，以下是21-30 订阅

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the Boat Hull Model: Adapting the Roofline Model to Enable Performance Prediction for parallel Computing 12

The Boat Hull Model: Adapting the Roofline Model to Enable P...

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Nugteren, Cedric Corporaal, Henk Eindhoven Univ Technol NL-5600 MB Eindhoven Netherlands

ISBN: (纸本)9781450311601

Multi-core and many-core were already major trends for the past six years, and are expected to continue for the next decades. With these trends of parallel computing, it becomes increasingly difficult to decide on which architecture to run a given application. In this work, we use an algorithm classification to predict performance prior to algorithm implementation. For this purpose, we modify the roofline model to include class information. In this way, we enable architectural choice through performance prediction prior to the development of architecture specific code. the new model, the boat hull model, is demonstrated using a GPU as a target architecture. We show for 6 example algorithms that performance is predicted accurately without requiring code to be available.

关键词： Performance parallel computing performance prediction many-core accelerators the roofline model

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DOJ: Dynamically parallelizing Object-Oriented Programs 12

DOJ: Dynamically Parallelizing Object-Oriented Programs

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Eom, Yong Hun Yang, Stephen Jenista, James C. Demsky, Brian Univ Calif Irvine Irvine CA 92717 USA

ISBN: (纸本)9781450311601

We present Dynamic Out-of-Order Java (DOJ), a dynamic parallelization approach. In DOJ, a developer annotates code blocks as tasks to decouple these blocks from the parent execution thread. the DOJ compiler then analyzes the code to generate heap examiners that ensure the parallel execution preserves the behavior of the original sequential program. Heap examiners dynamically extract heap dependences between code blocks and determine when it is safe to execute a code block. We have implemented DOJ and evaluated it on twelve benchmarks. We achieved an average compilation speedup of 31.15x over OoOJava and an average execution speedup of 12.73x over sequential versions of the benchmarks.

关键词： Algorithms Performance parallel programming Dynamic Analysis Object-Oriented Analysis Heap Analysis parallelization

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VEBO: A vertex- and edge-balanced ordering heuristic to load balance parallel graph processing 19

VEBO: A vertex- and edge-balanced ordering heuristic to load...

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24th acm sigplan symposium on principles and practice of parallel programming, ppopp 2019

作者： Sun, Jiawen Vandierendonck, Hans Nikolopoulos, Dimitrios S. Queen's University of Belfast United Kingdom

ISBN: (纸本)9781450362252

this work proposes Vertex- and Edge-Balanced Ordering (VEBO): balance the number of edges and the number of unique destinations of those edges. VEBO balances edges and vertices for graphs with a power-law degree distribution, and ensures an equal degree distribution between partitions. Experimental evaluation on three shared-memory graph processing systems (Ligra, Polymer and GraphGrind) shows that VEBO achieves excellent load balance and improves performance by 1.09× over Ligra, 1.41× over Polymer and 1.65× over GraphGrind, compared to their respective partitioning algorithms, averaged across 8 algorithms and 7 graphs. VEBO improves GraphGrind performance with a speedup of 2.9× over Ligra on average. © 2019 Copyright held by the owner/author(s).

关键词： Graph theory

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Scalable GPU Graph Traversal 12

Scalable GPU Graph Traversal

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Merrill, Duane Garland, Michael Grimshaw, Andrew Univ Virginia Charlottesville VA 22903 USA NVIDIA Corp Santa Clara CA USA

ISBN: (纸本)9781450311601

Breadth-first search (BFS) is a core primitive for graph traversal and a basis for many higher-level graph analysis algorithms. It is also representative of a class of parallel computations whose memory accesses and work distribution are both irregular and data-dependent. Recent work has demonstrated the plausibility of GPU sparse graph traversal, but has tended to focus on asymptotically inefficient algorithms that perform poorly on graphs with non-trivial diameter. We present a BFS parallelization focused on fine-grained task management constructed from efficient prefix sum that achieves an asymptotically optimal O(|V|+|E|) work complexity. Our implementation delivers excellent performance on diverse graphs, achieving traversal rates in excess of 3.3 billion and 8.3 billion traversed edges per second using single and quad-GPU configurations, respectively. this level of performance is several times faster than state-of-the-art implementations both CPU and GPU platforms.

关键词： Algorithms performance Breadth-first search GPU graph algorithms parallel algorithms prefix sum graph traversal sparse graph

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Advanced synchronization techniques for task-based runtime systems 21

Advanced synchronization techniques for task-based runtime s...

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26th acm sigplan symposium on principles and practice of parallel programming, ppopp 2021

作者： Álvarez, David Sala, Kevin Maroñas, Marcos Roca, Aleix Beltran, Vincenç Barcelona Supercomputing Center Barcelona Spain

ISBN: (纸本)9781450382946

Task-based programming models like OmpSs-2 and OpenMP provide a flexible data-flow execution model to exploit dynamic, irregular and nested parallelism. Providing an efficient implementation that scales well with small granularity tasks remains a challenge, and bottlenecks can manifest in several runtime components. In this paper, we analyze the limiting factors in the scalability of a task-based runtime system and propose individual solutions for each of the challenges, including a wait-free dependency system and a novel scalable scheduler design based on delegation. We evaluate how the optimizations impact the overall performance of the runtime, both individually and in combination. We also compare the resulting runtime against state of the art OpenMP implementations, showing equivalent or better performance, especially for fine-grained tasks. © 2021 acm.

关键词： parallel programming

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Extending a C-like Language for Portable SIMD programming 12

Extending a C-like Language for Portable SIMD Programming

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Leissa, Roland Hack, Sebastian Wald, Ingo Univ Saarland Compiler Design Lab Saarbrucken Germany Intel Corp Visual Applicat Res Santa Clara CA 95051 USA

ISBN: (纸本)9781450311601

SIMD instructions are common in CPUs for years now. Using these instructions effectively requires not only vectorization of code, but also modifications to the data layout. However, automatic vectorization techniques are often not powerful enough and suffer from restricted scope of applicability;hence, programmers often vectorize their programs manually by using intrinsics: compiler-known functions that directly expand to machine instructions. they significantly decrease programmer productivity by enforcing a very error-prone and hard-to-read assembly-like programming style. Furthermore, intrinsics are not portable because they are tied to a specific instruction set. In this paper, we show how a C-like language can be extended to allow for portable and efficient SIMD programming. Our extension puts the programmer in total control over where and how control-flow vectorization is triggered. We present a type system and a formal semantics of our extension and prove the soundness of the type system. Using our prototype implementation IVL that targets Intel's MIC architecture and SSE instruction set, we show that the generated code is roughly on par with handwritten intrinsic code.

关键词： Languages Performance theory language theory parallel programming polymorphism semantics SIMD SIMT type system vectorization

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the Performance Power of Software Combining in Persistence 22

The Performance Power of Software Combining in Persistence

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27th acm sigplan symposium on principles and practice of parallel programming (ppopp)

作者： Fatourou, Panagiota Kallimanis, Nikolaos D. Kosmas, Eleftherios Univ Paris LIPADE F-75006 Paris France Fdn Res Technol Hellas FORTH Inst Comp Sci Ilellas Greece Univ Crete Dept Comp Sci Iraklion Greece

ISBN: (纸本)9781450392044

the availability of Non-Volatile Main Memory (known as NVMM) enables the design of recoverable concurrent algorithms. We study the power of software combining in achieving recoverable synchronization and designing persistent data structures. Software combining is a general synchronization approach, which attempts to simulate the ideal world when executing synchronization requests (i.e., requests that must be executed in mutual exclusion). A single thread, called the combiner, executes all active requests, while the rest of the threads are waiting for the combiner to notify them that their requests have been applied. Software combining significantly decreases the synchronization cost and outperforms many other synchronization techniques in various cases. We identify three persistence principles, crucial for performance, that an algorithm's designer has to take into consideration when designing highly-efficient recoverable synchronization protocols or data structures. We illustrate how to make the appropriate design decisions in all stages of devising recoverable combining protocols to respect these principles. Specifically, we present two recoverable software combining protocols, satisfying different progress properties, that are many times faster and have much lower persistence cost than a large collection of existing persistent techniques for achieving scalable synchronization. We build fundamental recoverable data structures, such as stacks and queues, based on these protocols that outperform by far existing recoverable implementations of such data structures. We also provide the first recoverable implementation of a concurrent heap and present experiments to show that it has good performance when the size of the heap is not very large.

关键词： non-volatile memory NVM-based computing persistence recoverable algorithms and data structures software combining concurrent data structures stack queue heap synchronization wait-freedom performance principles performance analysis

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PARRAY: A Unifying Array Representation for Heterogeneous parallelism 12

PARRAY: A Unifying Array Representation for Heterogeneous Pa...

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Chen, Yifeng Cui, Xiang Mei, Hong Peking Univ Sch EECS HCST Key Lab Beijing 100871 Peoples R China

ISBN: (纸本)9781450311601

this paper introduces a programming interface called PARRAY (or parallelizing ARRAYs) that supports system-level succinct programming for heterogeneous parallel systems like GPU clusters. the current practice of software development requires combining several low-level libraries like Pthread, OpenMP, CUDA and MPI. Achieving productivity and portability is hard with different numbers and models of GPUs. PARRAY extends mainstream C programming with novel array types of the following features:1)the dimensions of an array type are nested in a tree structure, conceptually reflecting the memory hierarchy;2) the definition of an array type may contain references to other array types, allowing sophisticated array types to be created for parallelization;3) threads also form arrays that allow programming in a Single-Program Multiple-Code block (SPMC) style to unify various sophisticated communication patterns. this leads to shorter, more portable and maintainable parallel codes, while the programmer still has control over performance-related features necessary for deep manual optimization. Although the source-to-source code generator only faithfully generates low-level library calls according to the type information,higher-level programming and automatic performance optimization are still possible through building libraries of subprograms on top of PARRAY. the case study on cluster FFT illustrates a simple 30-line code that 2x-outperforms Intel Cluster MKL on the Tianhe-1A system with 7168 Fermi GPUs and 14336 CPUs.

关键词： Languages Performance theory parallel programming Array Representation Heterogeneous parallelism GPU Clusters

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Communication-Centric Optimizations by Dynamically Detecting Collective Operations 12

Communication-Centric Optimizations by Dynamically Detecting...

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Hoefler, Torsten Schneider, Timo Univ Illinois Dept Comp Sci Urbana IL USA Tech Univ Chemnitz Dept Comp Sci Chemnitz Germany

ISBN: (纸本)9781450311601

the steady increase of parallelism in high-performance computing platforms implies that communication will be most important in large-scale applications. In this work, we tackle the problem of transparent optimization of large-scale communication patterns using online compilation techniques. We utilize the Group Operation Assembly Language (GOAL), an abstract parallel dataflow definition language, to specify our transformations in a device-independent manner. We develop fast schemes that analyze dataflow and synchronization semantics in GOAL and detect if parts of the (or the whole) communication pattern express a known collective communication operation. the detection of collective operations allows us to replace the detected patterns with highly optimized algorithms or low-level hardware calls and thus improve performance significantly. Benchmark results suggest that our technique can lead to a performance improvement of orders of magnitude compared with various optimized algorithms written in Co-Array Fortran. Detecting collective operations also improves the programmability of parallel languages in that the user does not have to understand the detailed semantics of high-level communication operations in order to generate efficient and scalable code.

关键词： Performance Languages Collective Communication parallel Compiler Optimization parallel Dataflow

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Portable parallel Performance from Sequential, Productive, Embedded Domain-Specific Languages 12

Portable Parallel Performance from Sequential, Productive, E...

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17th acm sigplan symposium on principles and practice of parallel programming

作者： Kamil, Shoaib Coetzee, Derrick Beamer, Scott Cook, Henry Gonina, Ekaterina Harper, Jonathan Morlan, Jeffrey Fox, Armando Univ Calif Berkeley Berkeley CA 94720 USA Mississippi State Univ Mississippi State MS USA

ISBN: (纸本)9781450311601

Domain-expert productivity programmers desire scalable application performance, but usually must rely on efficiency programmers who are experts in explicit parallel programming to achieve it. Since such programmers are rare, to maximize reuse of their work we propose encapsulating their strategies in mini-compilers for domain-specific embedded languages (DSELs) glued together by a common high-level host language familiar to productivity programmers. the nontrivial applications that use these DSELs perform up to 98% of peak attainable performance, and comparable to or better than existing hand-coded implementations. Our approach is unique in that each mini-compiler not only performs conventional compiler transformations and optimizations, but includes imperative procedural code that captures an efficiency expert's strategy for mapping a narrow domain onto a specific type of hardware. the result is source-and performance-portability for productivity programmers and parallel performance that rivals that of hand-coded efficiency-language implementations of the same applications. We describe a framework that supports our methodology and five implemented DSELs supporting common computation kernels. Our results demonstrate that for several interesting classes of problems, efficiency-level parallel performance can be achieved by packaging efficiency programmers' expertise in a reusable framework that is easy to use for both productivity programmers and efficiency programmers.

关键词： Design Languages Performance Asp SEJITS Python Domain-Specific Languages

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