In Run Time Reconfiguration (RTR) systems, the amount of reconfiguration is considerable when compared to the circuit changes implemented. this is because reconfiguration is not considered as part of the design flow. ...
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this paper describes a Reconfigurable Hybrid Architecture for the developing, distribution and execution of web applications with high computational requirements. the Architecture is a layered model based on a hybrid ...
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this paper describes the implementation of the L3 maze routing accelerator in an FPGA. L3 supports fast single-layer and multi-layer routing, preferential routing, and rip-up-and-reroute. A 16 × 16 single-layer a...
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this paper describes a new efficient multiplier for FPGA-based variable precision processors. the circuit here proposed can adapt itself at runtime to different data wordlengths avoiding time and power consuming recon...
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In this paper, we describe a computer cache memory simulation environment based on a custom board with multiple FPGAs and DRAM DIMMs. this simulation environment is used for future memory hierarchy evaluation of eithe...
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this paper presents an improved Xilinx XC6200 FPGA using IBM SiGe BiCMOS technology. the basic cell performance is greatly enhanced by eliminating redundant signal multiplexing procedures. the simulated combinational ...
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Local search methods such as WSAT have proven to be successful for solving SAT problems. In this paper, we propose two host-FPGA (fieldprogrammable Gate Array) co-implementations, which use modified WSAT algorithms t...
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Considering the growing demand for small-space and high efficiency in DC-DC converters, It is usual way to raising the switching frequency and introducing some digital controllers. But some conventional digital device...
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Considering the growing demand for small-space and high efficiency in DC-DC converters, It is usual way to raising the switching frequency and introducing some digital controllers. But some conventional digital device, such as DSP, will take higher cost. In this paper, we propose a high speed digital PI controller based on FPGA (fieldprogrammable gate array) and apply it to a DC-DC converter in order to show the effectiveness of proposed technique. the proposed high-speed digital PI controller has several features: lower cost, small space and high speed. It is also useful in wide applications.
the continuous technology scaling makes soft errors a critical issue in deep sub-micron technologies, and techniques for assessing their impact are strongly required that combine efficiency and accuracy. FPGA-based em...
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the switch level is an abstraction level between the gate level and the electrical level, offers many advantages. Switch level simulators can reliably model many important phenomena in CMOS circuits, such as bi-direct...
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