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检索条件"任意字段=25th International Conference on Field Programmable Logic and Applications"

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Design of a dual-modality, digital positron emission tomography/computed tomography (PET/CT) scanner for small animal imaging

Design of a dual-modality, digital positron emission tomogra...

引用

Annual international conference of the IEEE Engineering in Medicine and Biology Society (EMBC)

作者： R. Fontaine J.-B. Michaud F. Belanger J. Cadorette J.-D. Leroux J.-F. Pratte S. Robert R. Lecomte Department of Electrical Engineering and Computer Engineering Universite of de Sherbrooke Sherbrooke Quebec Canada Department of Nuclear Medicine and Radiobiology Universite of de Sherbrooke Sherbrooke Quebec Canada

Contemporary PET scanners are commonly implemented with VLSI analog front-end electronics to reduce power consumption, space, noise and cost. Analog processing yields excellent results in dedicated applications, but offers little flexibility for sophisticated signal processing. One design goal of the new Sherbrooke PET/CT scanner is to achieve 1 mm resolution in both emission (PET) and transmission (CT) imaging using the same detection system. One further goal is to be able to use PET detectors and electronics to count and discriminate individual X-ray photons in CT mode. these requirements can be better met by sampling and digitizing the analog signal from each individual channel as early as possible. To meet these requirements, we developed an open digital architecture allowing new technology developments to be incorporated. A specific charge-sensitive amplifier (CSP) satisfying PET and CT needs, a low noise data acquisition system and advanced digital signal processing methods are joined together in order to meet requirements. the hardware is based on standard off-the-shelf 8- bit 100-MHz high-speed analog converters (ADC) and high-performance field programmable gate arrays (FPGA). By implementing 64 channels per board, a 1024-channel PET/CT camera can be created by disposing 16 such modular boards on a ring.

关键词： Positron emission tomography Computed tomography Animals field programmable gate arrays Very large scale integration Energy consumption Noise reduction Costs Signal processing Process design

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Routability prediction for field programmable Gate Arrays with a routing hierarchy

Routability prediction for Field Programmable Gate Arrays wi...

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international conference on VLSI Design

作者： Zhibin Dai D.K. Banerji Visual Insights Inc. Toronto ONT Canada Department of Computing & Information Science University of Guelph Guelph ONT Canada

ISBN: (纸本)0769518680

field programmable Gate Arrays (FPGAs) have emerged as the key technology for rapidly implementing digital circuits in VLSI. Much research has been done on their architecture and applications. One particularly important area of study is their routing implementation, which is greatly affected by the routing architecture and routing resources. this paper explores the effective utilization of a routing hierarchy that is present in the currently available commercial FPGAs. A stochastic model is adopted to investigate the routability on symmetrical FPGAs containing a routing resource hierarchy. the performance of our model is compared to that of an FPGA without a routing hierarchy. Experimental methods are used to determine the switch consumption of various routing resources. Results show that integrating a routing resource hierarchy into FPGAs causes a design to consume fewer routing resources. Consequently, the speed of designs implemented in such FPGAs can be greatly improved.

关键词： field programmable gate arrays Routing Switches Wires logic Wiring Electronic mail Very large scale integration Circuits Pins

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Experimental result of multirate deadbeat control for PWM inverter using FPGA based hardware controller

Experimental result of multirate deadbeat control for PWM in...

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international conference on Telecommunications Energy (INTELEC)

作者： S. Shimogata M. Horiuchi T. Yokoyama Tokyo Denki University Hiki Saitama Japan

A new approach for real time digital feedback control of PWM inverter is proposed, in which a deadbeat control combined with the multirate sampling method is realized using FGPA based hardware controller. the capacity of the output LC filter component occupies ineligible area for the cost performance of the inverter system for the UPS applications. If the capacity of the output LC filter is too small, the output voltage waveforms tends to oscillate between the sampling period when the deadbeat control is applied to the inverter system. In this paper, a novel approach to solve such phenomenon is proposed, which is the deadbeat control method combined with the multirate deadbeat control using FPGA based hardware controller. Deadbeat control ensures the state variables matches at each sampling instant for every sampling period. Also it is reported that the multirate deadbeat control minimizes the tracking error for the reference value. Adopting the multirate deadbeat control, the sampling frequency of the inverter becomes half of the carrier frequency, and it is suitable to implement for higher carrier frequency. Also the FPGA based control hardware enables to realize almost ideal real time feedback controller because of its capability to realize very fast calculation of the control method within a few /spl mu/ second. Design concept and hardware implementation of the FPGA based hardware controller for the PWM inverter is proposed. From the view point of UPS applications, the advantages and the disadvantages are discussed though simulations and experiments, the superiority of the proposed control law is verified.

关键词： Pulse width modulation inverters field programmable gate arrays Hardware Sampling methods Frequency Filters Uninterruptible power systems Feedback control Costs Voltage control

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Multifunction generator using Horner scheme and small tables

Multifunction generator using Horner scheme and small tables

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international conference on Microelectronics, ICM

作者： H. Bessalah N. Anane M. Anane Centre de Developpement des Technologies Avancees Algiers Algeria

this paper deals with the computation of some elementary functions using piecewise Minimax approximation and small tables. the strength of the method is that the same scheme is used to compute all the elementary functions with similar delay and accuracy of lulp (unit in last place). the hardware implementation of this method requires one multiplier and one adder chosen among those available in the Virtex-II FPGA as they present the highest performances concerning the delay and the area. the method has been implemented in a recursive structure which operates at a frequency of over than 25 Mhz.

关键词： Function approximation Polynomials Chebyshev approximation Minimax techniques Hardware field programmable gate arrays Computer architecture Delay programmable logic arrays Approximation error

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field-programmable logic and applications :reconfigurable computing is going mainstream : 12th international conference, FPL 2002, Montpellier, France, September 2-4, 2002 : proceedings

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丛书名： Lecture notes in computer science

2002年

作者： Manfred Glesner Peter Zipf Michel Renovell (eds.)

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Study on the electrical properties of a biodegradable plastic

Study on the electrical properties of a biodegradable plasti...

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international conference on Properties and applications of Properties and applications of Dielectric Materials

作者： K. Shinyama S. Fujita Department of Electronic Intelligence and System Hachinohe Institute of Technology Hachinohe Japan

A polylactic acid (PLA) that is a biodegradable plastic, was subjected to measurements of conduction current and dielectric properties as well as thermal analysis. For the electrical properties of PLA, its volume resistivity (/spl rho/) was larger than those of polyethylene (PE) and polypropylene (PP). the relative permittivity (/spl epsiv//sub r/') indicated intermediate values between that of polyester and those of PE and PP. the dielectric loss tangent (tan/spl delta/) was larger than those of PE and PP, but smaller than that of Polyester. For the electric field dependence of the conduction current of PLA in the high electric field, the current density (J) rapidly increased and /spl rho/ rapidly decreased, with increasing electric field. then, electric breakdown occurred when E/spl ap/2.8 MV/cm. From the results of thermal analyses, it was found that the glass transition temperature (T/sub g/) of PLA was about 60/spl deg/C and the melting point (T/sub m/) was about 166/spl deg/C.

关键词： Biodegradable materials Plastics programmable logic arrays Dielectric losses Current measurement Dielectric measurements Permittivity measurement thermal conductivity Polyethylene Current density

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field-programmable logic and applications: Reconfigurable Computing is Going Mainstream - 12th international conference, FPL 2002, Proceedings

引用

12th international conference on field-programmable logic and applications, FPL 2002

ISBN: (纸本)3540441085

the proceedings contain 135 papers. the topics discussed include: the age of adaptive computing is here;multithreading for logic-centric systems;fast prototyping with co-operation of simulation and emulation;how fast is rapid FPGA-based prototyping: lessons and challenges from the digital TV design prototyping project;implementing asynchronous circuits on LUT based FPGAs;flexible routing architecture generation for domain-specific reconfigurable subsystems;embedded reconfigurable logic core for DSP applications;FPGA QAM demodulator design;modular, fabric-specific synthesis for programmable architectures;improved functional simulation of dynamically reconfigurable logic;dynamic reconfiguration in mobile systems;automatic partitioning for improved placement and routing in complex programmable logic devices;and high-level partitioning of digital systems based on dynamically reconfigurable devices.

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Hardware realization of Walsh functions and their applications using VHDL and reconfigurable logic 14

Hardware realization of Walsh functions and their applicatio...

引用

14th international conference on Microelectronics

作者： Bin Ateeq, AMA Abbasi, SA Alamoud, ARM King Saud Univ Dept Elect Engn Riyadh 11421 Saudi Arabia

ISBN: (纸本)0780375734

Orthogonal functions/transforms such as Rademacher functions and Walsh functions find extensive use in. Scientific and Engineering applications. Software realization of such functions has been common for quite some time. However, hardware realization has distinct Advantages and is now feasible and economically viable due to advancements made in the Microelectronics technology. Rademacher functions and Walsh functions have therefore been realized using high level design techniques targeted to Xilinx FPGAs. the application of these functions in generating digital and analog sinusoidal waves on the same chip has been demonstrated.

关键词： Algorithm design and analysis Application software Digital signal processing chips field programmable gate arrays Hardware Microelectronics Polynomials Power generation economics Reconfigurable logic Signal processing algorithms

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field programmable systems 1

引用

9th international conference on High Performance Computing (HiPC 2002)

作者： Lysaght, P Xilinx Res Labs San Jose CA 95032 USA

ISBN: (数字)9783540362654

ISBN: (纸本)3540003037

the emergence of Platform FPGAs(TM) marks a significant change in the capabilities of FPGAs. Unlike their predecessors, Platform FPGAs are characterized by heterogeneous architectures. In addition to programmable logic, routing and inputs/outputs, they feature soft and hard microprocessors, bus and memory hierarchies, digital signal processing cores and gigabit communications channels. these devices are targeted at high performance computing applications in embedded systems. the complexity and flexibility of Platform FPGAs is unparalleled. We explore some of the potential implications for current and future design of programmable digital systems.

关键词： field programmable gate arrays (FPGA)

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A component architecture for FPGA-based, DSP system design

A component architecture for FPGA-based, DSP system design

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13th IEEE international conference on applications-Specific Systems, Architectures and Processors

作者： Spivey, G Bhattacharyya, SS Nakajima, K Univ Maryland ECE Dept College Pk MD 20742 USA

ISBN: (纸本)0769517129

Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greatest challenges occur in the integration of the various components, we have developed a component architecture and an associated set of software tools, collectively called the logic Foundry. Using the logic Foundry, an FPGA-based DSP system can be easily constructed from pre-built components and implemented on a variety of back-end FPGA platforms. the resulting implementation can then be encapsulated and integrated into a variety of front-end software application environments. this paper develops the component architecture and integration capabilities of the logic Foundry, and examines a number of application case studies that we have experimented with using the logic Foundry.

关键词： Application software Component architectures Computer architecture Digital signal processing field programmable gate arrays Foundries Hardware design languages logic design Mathematical model Software tools

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