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IEEE Nuclear Science Symposium and Medical Imaging conference (NSS/MIC) / 25th international Symposium on Room-Temperature Semiconductor X-Ray and Gamma-Ray Detectors

作者： Turqueti, Marcos Taylor, Jordan Lawrence Berkeley Natl Lab Berkeley CA 94720 USA

ISBN: (纸本)9781538684948

the need for data acquisition and controls operating at deep cryogenic temperatures has become pronounced with the large number of nuclear and high energy physics detectors that are currently running at cryogenic temperatures. At LBNL we have built a FPGA based n-bit Analog to Digital Converter (ADC) for operation at deep cryogenic temperatures (4.2K). this novel device is currently under test and has been evaluated both at cryogenic and room temperatures. Both nuclear and high energy physics experiments running at cryogenic temperatures can greatly benefit from this new development.

关键词： field programmable gate arrays Cryogenics Analog-digital conversion Performance evaluation logic gates Ring oscillators Table lookup

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A Review of Different Methods of Phase Measurement and its Suitable applications

A Review of Different Methods of Phase Measurement and its S...

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international conference for Convergence of Technology (I2CT)

作者： Marim Alan Phillimon Salam Devayani Devi Loitongbam Surajkumar Singh Department of ECE NIT Manipur Langol Imphal India

ISBN: (数字)9781538680759

ISBN: (纸本)9781538680766

the phase measurement technique using field programmable Gate Arrays (FPGAs) is a considerable improvement over previously available methods. It involves designing of simple suitable logic core, employing an improved method for sampling, simple design with less hardware and also with the introduction of the XOR-based phase detector to minimize jitter, thus achieving high accuracy and resolution and operate over a large range of frequency which is supported by the FPGA fabric. However, it is important to consider that there are different FPGAs based phase measurement techniques and are used in different applications considering each methods suits better in particular specific application. this paper presents a brief review of various methods for phase measurement, based on FPGA board, using various concepts and techniques in varied fields of science and technology.

关键词： Phase measurement field programmable gate arrays Clocks Frequency measurement Biomedical measurement Detectors Satellites

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Everyone's a critic: A tool for exploring RISC-V projects 28

Everyone's a critic: A tool for exploring RISC-V projects

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28th international conference on field-programmable logic and applications, FPL 2018

作者： Richmond, Dustin Barrow, Michael Kastner, Ryan Department of Computer Science and Engineering University of California San DiegoCA92195 United States

ISBN: (数字)9781538685174

ISBN: (纸本)9781538685174

the RISC-V specification is a highly flexible specification for low-cost processors. the RISC-V ISA is royalty free, vendor agnostic, easily portable between development environments, and highly flexible to match the demands of an application. these characteristics make RISC-V a natural ISA choice for an FPGA soft processor and this has led to widespread adoption in academia and industry. However, the sheer number of RISC-V projects can be daunting for potential users. this paper describes a tool for exploring RISC-V projects. Our tool provides a web-interface for executing C/C++ code, tests, and benchmarks. Our tool is packaged with interactive tutorials for extending, modifying, and reproducing our work. © 2018 IEEE.

关键词： field programmable gate arrays (FPGA)

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A Portable Image Processing Accelerator using FPGA 7

A Portable Image Processing Accelerator using FPGA

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7th international conference on Modern Circuits and Systems Technologies (MOCAST)

作者： Tsiktsiris, Dimitris Ziouzios, Dimitris Dasygenis, Minas Univ Western Macedonia Dept Informat & Telecommun Engn Kozani 50100 Greece

ISBN: (纸本)9781538647882

One of the most common uses of FPGAs is as implementation platforms for graphics processing applications. their structure can exploit spatial and temporal parallelism, but such parallelisation depends on the processing model and hardware constraints of the system. those restrictions can force the designer to reformulate the algorithm. In this paper we present an FPGA design as a portable USB accelerator device which implements the Grayscale and Sobel Edge Detection algorithms, two of the most fundamental algorithms in digital image processing.

关键词： Acceleration Image processing field programmable gate arrays programmable logic arrays Application software

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A Survey on FPGA Implementations in Embedded Augmented Reality applications 6

A Survey on FPGA Implementations in Embedded Augmented Reali...

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6th international conference on Wireless Networks and Embedded Systems (WECON)

作者： Kaur, Amanpreet Chitkara Univ Inst Engn & Technol Rajpura Punjab India

ISBN: (纸本)9781538670507

Since a long ago, most of the Augmented Reality (AR) applications are built using some general purpose devices such as computers and handhelds. In such general purpose devices, tasks are being processed using different softwares that make it difficult to obtain the real time results with high resolution and frame rate. there is a need to maintain a good performance but it invariably results into high cost of the overall project due to the requirement of higher clock frequency and high power. Mobility and processing power are the two basic requirements of an augmented reality application to provide an efficient immersion to the end user. An embedded architecture developed on field programmable Gate Array logic (FPGA) can supply both mobility and processing power to the AR applications. FPGA is a tiny chip that has the efficiency of hardware level executions. this paper gives a detailed account of FPGAs in AR applications in the field of computer vision & image processing, multimedia & computer graphics, communication and wearable computing.

关键词： FPGA augmented reality embedded systems reconfigurable hardware parallelism

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Realization of fractional order differintegral on the digital platform using FPGA and its time and frequency domain analysis

Realization of fractional order differintegral on the digita...

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international conference on Computing and Networking Technology (ICCNT)

作者： Ruchi Jain Centre for Research in Applied Electronics Indian Institute of Technology New Delhi India

this paper mainly focuses on the realization of the fractional operator on the digital platform. Discretization plays a key step for the practical realization of the fractional operator on hardware. Among the various available techniques of discretization, we have chosen a direct method of discretization using the Tustin operator and combined with the continued fraction expansion to get more effective discretized transfer function and realized the same on FPGA processor. Nowadays, in the domain of real-time applications in the digital world, FPGA emanated as the best alternative with the ability to perform multiple tasks simultaneously, highly flexible and reliable with simple design cycle, lower complexity, effective product cost, field reprogrammability, reusability, and reliability. In this paper, the designed module of the fractional operator in the form of fractional integrator and differentiator of order 0.5 is implemented on programmable logic design software Quartus II and verified on DEO Nano Board (Cyclone IV FPGA family of company Altera). the performance of hardware realized module is analyzed in frequency and time domain, and results are examined with its MATLAB counterpart.

关键词： field programmable gate arrays Hardware Frequency-domain analysis Software Poles and zeros Real-time systems

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thermal Analysis of Tankless Heating System Using PLC 10

Thermal Analysis of Tankless Heating System Using PLC

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10th international conference and Expositions on Electrical and Power Engineering (EPE)

作者： Pintilie, Cosmin Plesca, Adrian Gabor, Georgel Nituca, Costica Adam, Maricel Dragomir, Alin Gheorghe Asachi Tech Univ Iasi Fac Elect Engn Iasi Romania

ISBN: (纸本)9781538650622

this article presents a thermal analysis of a tankless heating system based on programmable logic controller (PLC) which is used to acquire and process the thermal data provided by a suitable temperature transducer. the temperature variation has been recorded during transient and steady-state conditions. the thermal analysis has been performed at different water flow and also for different thermal power. the power consumption of the tankless heating system can be decreased using an automation system based on microcontroller and PLC in the case of industrial applications.

关键词： temperature tankless heating system programmable logic controller

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1st international conference on 'Mechatronics and Artificial Intelligence' (ICMAI-2021)

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Journal of Physics: conference Series 2021年第1期1950卷

PREFACE It was a matter of pleasure to organize 1st international conference on 'Mechatronics and Artificial Intelligence' (ICMAI-2021) at Shree Guru Gobind Singh Tricentenary (SGT) University, Gurugram on 26th and 27th February 2021. the conference was organized in Association of Engineering & Technocrats, Faculty of Engineering and Technology, SGT University. the objective of this conference was to provide a common platform to scientists and researchers from all over India for exchanging their knowledge and views to deal with global challenges. the theme of this conference was not only the fundamental technology in the field of engineering science but also can change our society by exploring new horizons and continuous progress. A diverse range of topics from the neural network, digital image processing, machine learning, programmable logic controller, health care, IoT based systems, deep learning, lean manufacturing, abrasive flow machining, welding technology and simulation-based studies are featured in the conference. In addition to that, you will also hear about the incremental forming, automation integration techniques, wireless sensor techniques, non-invasive methods of diagnosis, robot assembly, data mining and various evolutionary algorithms in different applications. I hope, therefore, that you will get a chance to explore recent emerging technologies. We are delighted to deliver special thanks to IOP Publishing as our publication partner to publish the conference proceedings in JPCS. We sincerely thanks to our sponsors Council of Scientific and Industrial Research (CSIR) Human Resource Development Group (HRDG) and 'Sanranchana', SGT University Center of Research Innovation. We believe that the conference had provided the opportunity to the students and the young researchers for enriching their knowledge through interaction with eminent researchers from various NITs, IITs, state universities and reputed organizations. We hope that everybody had a great ex

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SMEM++: A pipelined and time-multiplexed SMEM seeding accelerator for genome sequencing 28

SMEM++: A pipelined and time-multiplexed SMEM seeding accele...

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28th international conference on field-programmable logic and applications, FPL 2018

作者： Cong, Jason Guo, Licheng Huang, Po-Tsang Wei, Peng Yu, Tianhe University of California Los Angeles United States National Chiao Tung University Taiwan

ISBN: (数字)9781538685174

ISBN: (纸本)9781538685174

Next-generation sequencing motivates the researchof FPGA acceleration for genome sequencing algorithms. therecently developed quadratic-time SMEM seeding algorithmbecomes a time-consuming computation kernel in genomesequencing, but it has not been well studied. the fundamentalchallenge of accelerating the SMEM algorithm is to handle itslarge volume of random memory accesses. While the state-ofthe-art SMEM accelerator attempts sacrifices the performanceof individual processing elements to maximize the task-levelparallelism, this methodology suffers a serious resource underutilizationissue. therefore, we propose SMEM++, a pipelinedand time-multiplexed FPGA accelerator for SMEM ***++ adopts the canonical non-blocking pipelinemethodology and implements a fully pipelined acceleratorwith initiation interval equal to one. Moreover, we designa communication interface adapter to make the acceleratorcompatible to the target platform interface and increase itsportability. Experiments on the Intel HARPv2 platform showthat SMEM++ outperforms the original software by 24x, andoutperforms the state-of-the-art SMEM accelerator design by6.3x, with 43% less logic resource usage. © 2018 IEEE.

关键词： field programmable gate arrays (FPGA)

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CAD Tool Flow for Variation-Tolerant Non-Volatile STT-MRAM LUT based FPGA 2018

CAD Tool Flow for Variation-Tolerant Non-Volatile STT-MRAM L...

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7th international conference on Software and Computer applications (ICSCA)

作者： Kim, Jeongbin Kim, Ki Tae Chung, Eui-Young Yonsei Univ Dept Elect & Elect Engn Seoul South Korea

ISBN: (纸本)9781450354141

field programmable Gate Array (FPGA) is a reconfigurable circuit and it is used for various applications such as image processing, digital signal processing and neural network. FPGA adopts a logic circuit called Look-Up Table (LUT) as a basic circuit structure. Commonly used FPGAs have volatile characteristic because it consists of SRAM based LUT that adopts SRAM as a memory cell. Volatile FPGAs have a disadvantage in terms of power management efficiency. Variation-Tolerant Non-Volatile STT-MRAM (VTNV) LUT has been studied for a nonvolatile FPGAs and it has unique characteristics that can only operate in the half clock period. Accordingly, VTNV LUT based FPGA cannot operate normally with conventional FPGA CAD tool flow. We propose FPGA CAD (Computer Aided Design) tool flow for VTNV LUT based FPGA with supporting unique characteristic of VTNV LUT, and implement a non-volatile FPGA. through proposed FPGA CAD tool flow, non-volatile FPGA based on VTNV LUT could operate normally. Because of high parameters of VTNV LUT, experimental results show that power increases by 29% and critical path delay increases by 16%, but it'll be improved sufficiently by future VTNV LUT researches.

关键词： Computer aided design (CAD) field programmable gate array (FPGA) CAD tool flow non-volatile FPGA

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