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检索条件"任意字段=25th International Conference on Field Programmable Logic and Applications"
1848 条 记 录,以下是831-840 订阅
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Low-cost multiplier-based FPU for embedded processing on FPGA  24
Low-cost multiplier-based FPU for embedded processing on FPG...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Pasca, Bogdan Altera European Technology Centre United Kingdom
Industrial applications often require processing data with large dynamic ranges at low sample rates. As algorithms become more complex, handling the data range of variables required for fixed-point implementations bec... 详细信息
来源: 评论
FPGA implementation of a multi-algorithm parallel FEC for SDR platforms  24
FPGA implementation of a multi-algorithm parallel FEC for SD...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Wu, Zhenzhi Liu, Dake Yang, Zheng Wang, Qingying Zhou, Wei School of Information and Electronics Beijing Institute of Technology Beijing100081 China
Forward Error Correction (FEC) consumes excessive computation in a Software Defined Radio (SDR) system. In this work, a high-throughput flexible FEC processor is proposed for the decoding acceleration. the FEC process... 详细信息
来源: 评论
A mixed integer linear programming approach for design space exploration in FPGA-based MPSoC  24
A mixed integer linear programming approach for design space...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Dammak, Bouthaina Benmansour, Rachid Niar, Smail Baklouti, Mouna Abid, Mohamed LAMIH University of Valenciennes Valenciennes59300 France National School of Engineers of Sfax Sfax3042 Tunisia
Heterogeneous Multiprocessor System-on-Chip (Ht-MPSoC) architectures represent a promising approach as they allow a higher performance/energy consumption trade-off. In such systems, the processor instruction set is en... 详细信息
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Robust and flexible FPGA-based digital PUF  24
Robust and flexible FPGA-based digital PUF
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24th international conference on field programmable logic and applications, FPL 2014
作者: Xu, Teng Potkonjak, Miodrag Computer Science Department University of California Los Angeles United States
We have developed the first FPGA-based digital physical unclonable function (PUF) by leveraging the reconfigurability of an FPGA and introducing a new way of using the standard analog delay PUF. the key observation is... 详细信息
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Efficient multi-standard cognitive radios on FPGAs  24
Efficient multi-standard cognitive radios on FPGAs
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24th international conference on field programmable logic and applications, FPL 2014
作者: Pham, thinh H. Fahmy, Suhaib A. McLoughlin, Ian Vince School of Computer Engineering Nanyang Technological University Singapore Singapore School of Information Science and Technology University of Science and Technology of China Hefei China
Cognitive radios that support multiple standards and modify operation depending on environmental conditions are becoming more important as the demand for higher bandwidth and efficient spectrum use increases. Traditio... 详细信息
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Experimental multi-FPGA GNSS receiver platform  24
Experimental multi-FPGA GNSS receiver platform
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24th international conference on field programmable logic and applications, FPL 2014
作者: Garzia, Fabio Rugamer, Alexander Koch, Robert Neumaier, Philipp Serezhkina, Ekaterina Overbeck, Matthias Rohmer, Gunther Fraunhofer IIS Nuremberg Germany
this paper describes the system architecture and implementation results of a robust and flexible dual-frequency 2×2 array processing GNSS receiver platform. A digital front-end FPGA pre-processes the incoming raw... 详细信息
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HPC-gSpan: An FPGA-based parallel system for frequent subgraph mining  24
HPC-gSpan: An FPGA-based parallel system for frequent subgra...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Stratikopoulos, Athanasios Chrysos, Grigorios Papaefstathiou, Ioannis Dollas, Apostolos Microprocessor and Hardware Laboratory Department of Electronic and Computer Engineering Technical University of Crete Chania Greece
Graph mining is an important research area within the domain of data mining. One of the most challenging tasks of graph mining is frequent subgraph mining. this work presents the first FPGA-based implementation, to th... 详细信息
来源: 评论
Hardware conversion of neural networks simulation models for neural processing accelerator implemented as FPGA-based SoC  24
Hardware conversion of neural networks simulation models for...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Pietras, Marcin Computer Science and Information Technology West Pomeranian University of Technology ZUT Szczecin Poland
the transition from a neural network simulation model to its hardware representation is a complex process, which touches computations precision, performance and effective architecture implementation issues. Presented ... 详细信息
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FlipSyrup: Cycle-accurate hardware simulation framework on abstract FPGA platforms  24
FlipSyrup: Cycle-accurate hardware simulation framework on a...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Takamaeda-Yamazaki, Shinya Kise, Kenji Nara Institute of Science and Technology Japan Tokyo Institute of Technology Japan
FPGA-based rapid prototyping is widely applied for fast simulations of hardware structure verifications. In this paper, we propose flipSyrup, a prototyping framework for cycle-accurate hardware simulations on abstract... 详细信息
来源: 评论
DyRACT: A partial reconfiguration enabled accelerator and test platform  24
DyRACT: A partial reconfiguration enabled accelerator and te...
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24th international conference on field programmable logic and applications, FPL 2014
作者: Vipin, Kizheppatt Fahmy, Suhaib A. School of Computer Engineering Nanyang Technological University Singapore Singapore
Integrating FPGAs with a general purpose computer remains difficult, but recent efforts have resulted in open frameworks that offer a software API and hardware interface to allow easier integration. However, such syst... 详细信息
来源: 评论