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SkILL - A Stochastic inductive logic Learner

SkILL - A Stochastic Inductive Logic Learner

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international conference on Machine Learning and Applications (ICMLA)

作者： Joana Côrte-Real theofrastos Mantadelis Inês Dutra Ricardo Roha Elizabeth Burnside CRACS & INESC TEC University of Porto Rua do Campo Alegre Porto Portugal Universidade do Porto Porto Porto PT Department of Radiology University of Wisconsin WI USA

Probabilistic inductive logic programming (Pilp) is a relatively unexplored area of Statistical Relational Learning which extends classic inductive logic programming (ilp). Within this scope, we introduce SkILL, a Stochastic inductive logic Learner, which takes probabilistic annotated data and produces First Order logic (FOL) theories. Data in several domains such as medicine and bioinformatics have an inherent degree of uncertainty, and because SkILL can handle this type of data, the models produced for these areas are closer to reality. SkILL can then use probabilistic data to extract non-trivial knowledge from databases, and also address efficiency issues by introducing an efficient search strategy for finding hypotheses in Pilp environments. SkILL's capabilities are demonstrated using a real world medical dataset in the breast cancer domain.

关键词： Probabilistic logic Measurement Cancer logic programming Sociology Statistics

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Robots avoid potential failures through experience-based probabilistic planning

Robots avoid potential failures through experience-based pro...

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international conference on Informatics in Control, Automation and Robotics (ICINCO)

作者： Melis Kapotoglu Cagatay Koc Sanem Sariel Artificial Intelligence and Robotics Laboratory Istanbul Technical University Istanbul Turkey

Robots should avoid potential failure situations to safely execute their actions and to improve their performances. For this purpose, they need to build and use their experience online. We propose online learning-guided planning methods to address this problem. Our method includes an experiential learning process using inductive logic programming (ilp) and a probabilistic planning framework that uses the experience gained by learning for improving task execution performance. We analyze our solution on a case study with an autonomous mobile robot in a multi-object manipulation domain where the objective is maximizing the number of collected objects while avoiding potential failures using experience. Our results indicate that the robot using our adaptive planning strategy ensures safety in task execution and reduces the number of potential failures.

关键词： Planning Robot sensing systems Probabilistic logic Context Monitoring

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A cloud-based architecture for network attack signature learning

A cloud-based architecture for network attack signature lear...

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New Technologies, Mobility and Security (NTMS)

作者： Omessaad Hamdi Maïssa Mbaye Francine Krief SUPCOM University of Carthage Tunisia LANI Gaston Berger University Sénégal University of Bordeaux LaBRI France

Intrusion Detection System (IDS) is an essential component of the network security infrastructure. It detects malicious activities by monitoring network traffic. there are two main classes of IDS: the anomaly-based IDS and signature-based IDS. An important challenge, for signature-based IDS, is automating attack signature writing from traffic logs, which can be very hard to be established for human administrator. In this paper, we propose a solution addressing this challenge. We propose cloud-based signature learning service using inductive logic programming (ilp). Learning service generates rule describing properties shared by packets labelled as malicious and that do not cover normal packets. the system uses a background knowledge composed of predicates used to describe network attack signature. the cloud architecture of our IDS enables it to have specialized nodes. Preliminary experimentations show that the proposed system is able to reproduce automatically SNORT signature.

关键词： Cloud computing Intrusion detection Grammar logic programming Databases IP networks Protocols

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IMPROVED ELECTION OF CLUSTER HEADS IN LEACH

IMPROVED ELECTION OF CLUSTER HEADS IN LEACH

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IEEE/ACS international conference on Computer Systems and Applications

作者： Chaima Bejaoui Alexandre Guitton Abdennaceur Kachouri Sfax University National School of Engineers of Sfax Road Soukra km 4 - 3038 Tunisia

ISBN: (纸本)9781509004799

Wireless Sensor Networks (WSNs) are a promising technology to monitor distant or inaccessible areas. As nodes have a limited energy supply, many routing protocols are based on a clustering mechanism: some nodes are elected as cluster heads and have to deal with most of the communication burden of the network, while the other nodes perform only simple operations. In this paper, we propose a new election mechanism with important features: it ensures that all nodes are in range of a cluster head while keeping the number of cluster heads low, it takes into account the residual energy of nodes, and it requires a small communication overhead. We compare the performance of our election mechanism with an optimal election, as well as with the election mechanism of LEACH, which is the main clustering algorithm for WSNs.

关键词： ilp LEACH WSN clustering leaching Wireless sensor networks inductive logic programming WSN gene Ganglia cluster head Head Cluster Analysis residual energy of node Routing protocols Residual energy

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A technology mapper for depth-constrained FPGA logic cells

A technology mapper for depth-constrained FPGA logic cells

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international conference on Field Programmable logic and Applications

作者： Zhenghong Jiang Grace Zgheib Colin Yu Lin David Novo Zhihong Huang Liqun Yang Haigang Yang Paolo Ienne System on Programmable Chip Research Department Institute of Electronics Chinese Academy of Sciences Beijing China Ecole Polytechnique Federale de Lausanne (EPFL) School of Computer and Communication Sciences Lausanne Switzerland

In the last decade, progress in logic synthesis has brought about new advantageous circuit representations. these representations, such as And-Inverter Graphs in the ubiquitous open-source synthesizer ABC, have inspired new designs of Field Programmable Gate Arrays (FPGAs), which, instead of using Look-Up Tables (LUTs), mimic the topology of the circuit representation in the basic logic cells. More recent examples are Majority-Inverter Graphs, another uniform representation which has triggered considerable interest in synthesis and which naturally suggests new logic cells. Yet, in this paper we observe how naïvely adapting technology mapping solutions for classic LUT-based FPGAs to these new architectures incurs severe shortcomings. the key issue is that LUTs are inherently input-constrained (the logic function they implement is irrelevant) and have generally a single output; on the other hand, logic cells made of uniform networks of some fundamental logic function (e.g., And-Invert) are constrained in terms of logic depth and multiple outputs are an integral feature. We introduce novel and effective solutions to address these differences; the result is a highly versatile mapper - thus enabling further research in these new architectures - with a significantly better performance than what is described in literature for one such architecture. Specifically, when we compare with the state of the art on one sample architecture, we obtain a significant decrease in area (on average 18% over several benchmarks) while also improving slightly the critical path (a reduction of 3%).

关键词： Table lookup Delays Field programmable gate arrays Linear programming Libraries logic gates

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Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoC

Function-Level Processor (FLP): Raising Efficiency by Operat...

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IEEE 25th international conference on Application-Specific Systems, Architectures and Processors (ASAP)

作者： Tabkhi, Hamed Bushey, Robert Schirner, Gunar Northeastern Univ Dept Elect & Comp Engn Boston MA 02115 USA Analog Devices Inc ADI Embedded Syst Prod & Technol Norwood MA USA

ISBN: (纸本)9781479936090

the exponential growth in computation demand drives chip vendors to heterogeneous architectures combining Instruction-Level Processors (ilps) and custom HW Accelerators (HWACCs) in an attempt to provide the needed processing capabilities while meeting power/energy requirements. ilps, on one hand, are highly flexible, but power inefficient. Custom HWACCs, on the other hand, are inflexible (focusing on dedicated kernels), but highly power efficient. Since, designing HWACCs for every application is cost prohibitive, large portions of applications still run inefficiently on ilps. New processing architectures are needed that combine the power efficiency of HWACCs while still retaining sufficient flexibility to realize applications across targeted market segments. this paper introduces Function-Level Processors (FLPs) to fill the gap between ilps and dedicated HWACCs. FLPs are comprised of configurable Function Blocks (FBs) implementing selected functions which are then interconnected via programmable point-to-point connections constructing an extensible/configurable macro data-path. An FLP raises programming abstraction to a Function-Set Architecture (FSA) controlling FBs allocation, configuration and scheduling. We demonstrate FLP benefits with an industry example of the Pipeline-Vision Processor (PVP). We highlight the gained flexibility by mapping 10 embedded vision applications entirely to the FLP-PVP offering up to 22.4 GOPs/s with average power of 120 mW. the results also demonstrate that our FLP-PVP solution consumes 14x-18x less power than an ilp and 5x less power than a hybrid ilp+ HWACCs solution.

关键词： fault-location problem PROCESSOR inductive logic programming dynamic efficiency Exponential Growth average power ARCHITECTURE Power (Psychology) Energy sources macro data Target marketing Connection points

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Information Extraction from the Web: An Ontology-Based Method using inductive logic programming

Information Extraction from the Web: An Ontology-Based Metho...

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25th IEEE international conference on Tools with Artificial Intelligence (ICTAI)

作者： Lima, Rinaldo Oliveira, Hilario Freitas, Fred Espinasse, Bernard Pentagrossa, Laura Univ Fed Pernambuco Informat Ctr Recife PE Brazil Aix Marseille Univ LSIS Marseille France

ISBN: (纸本)9781479929719

Relevant information extraction from text and web pages in particular is an intensive and time-consuming task that needs important semantic resources. thus, to be efficient, automatic information extraction systems have to exploit semantic resources (or ontologies) and employ machine-learning techniques to make them more adaptive. this paper presents an Ontology-based Information Extraction method using inductive logic programming that allows inducing symbolic predicates expressed in Horn clausal logic that subsume information extraction rules. Such rules allow the system to extract class and relation instances from English corpora for ontology population purposes. Several experiments were conducted and preliminary experimental results are promising, showing that the proposed approach improves previous work over extracting instances of classes and relations, either separately or altogether.

关键词： Ontology-based Information Extraction Ontology Population inductive logic programming

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Information Extraction from the Web: An Ontology-Based Method Using inductive logic programming

Information Extraction from the Web: An Ontology-Based Metho...

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international conference on Tools for Artificial Intelligence (ICTAI)

作者： Rinaldo Lima Bernard Espinasse Hilário Oliveira Laura Pentagrossa Fred Freitas Informatics Center Federal University of Pernambuco Recife Brazil LSIS Aix Marseille University Marseille France

关键词： Ontologies Information retrieval Feature extraction logic programming Natural language processing Semantics Sociology

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Decomposition, merging, and refinement approach to boost inductive logic programming algorithms

Decomposition, merging, and refinement approach to boost ind...

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15th international conference on Artificial Intelligence: Methodology, Systems, and Applications, AIMSA 2012

作者： Chovanec, Andrej Barták, Roman Charles University in Prague Faculty of Mathematics and Physics Malostranské nám. 25 118 00 Praha 1 Czech Republic

ISBN: (纸本)9783642331848

inductive logic programming (ilp) deals with the problem of finding a hypothesis covering positive examples and excluding negative examples. It uses first-order logic as a uniform representation for examples and hypothesis. In this paper we propose a method to boost any ilp learning algorithm by first decomposing the set of examples to subsets and applying the learning algorithm to each subset separately, second, merging the hypotheses obtained for the subsets to get a single hypothesis for the complete set of examples, and finally refining this single hypothesis to make it shorter. the proposed technique significantly outperforms existing approaches. © 2012 Springer-Verlag.

关键词： Merging

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A Simple inductive Synthesis Methodology and its Applications 10

A Simple Inductive Synthesis Methodology and its Application...

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conference on Object Oriented programming Systems, Languages and Applications/SPLASH 2010

作者： Itzhaky, Shachar Gulwani, Sumit Immerman, Neil Sagiv, Mooly Tel Aviv Univ Tel Aviv Israel Univ Massachusetts Amherst MA 01003 USA Stanford Univ Stanford CA 94305 USA

ISBN: (纸本)9781450302036

Given a high-level specification and a low-level programming language, our goal is to automatically synthesize an efficient program that meets the specification. In this paper, we present a new algorithmic methodology for inductive synthesis that allows us to do this. We use Second Order logic as our generic high level specification logic. For our low-level languages we choose small application-specific logics that can be immediately translated into code that runs in expected linear time in the worst case. We explain our methodology and provide examples of the synthesis of several graph classifiers, e. g, linear-time tests of whether the input graph is connected, acyclic, etc. In another set of applications we automatically derive many finite differencing expressions equivalent to ones that Paige built by hand in his thesis [Pai81]. Finally we describe directions for automatically combining such automatically generated building blocks to synthesize efficient code implementing more complicated specifications. the methods in this paper have been implemented in Python using the SMT solver Z3 [dMB].

关键词： Languages Performance Finite Differencing High Level Program inductive Synthesis Transformational programming

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