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检索条件"任意字段=27th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2014"

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27th international workshop on languages and compilers for parallel computing, lcpc 2014

27th International Workshop on Languages and Compilers for P...

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27th international workshop on languages and compilers for parallel computing, lcpc 2014

ISBN: (纸本)9783319174723

the proceedings contain 25 papers. the special focus in this conference is on Accelerator Programming, Algorithms for parallelism, compilers, Debugging and Vectorization. the topics include: A practical GPGPU optimizing compiler using data sharing and thread coarsening;evaluating performance portability of openACC;NAS parallel benchmarks for GPGPUs using a directive-based programming model;understanding co-run degradations on integrated heterogeneous processors;hiding the overhead of inspector-executor style dynamic parallelization;tiled linear algebra a system for parallel graph algorithms;fast automatic heuristic construction using active learning;jagged tiling for intra-tile parallelism and fine-grain multithreading;memory management techniques for exploiting RDMA in PGAS languages;change detection based parallelism mapping;automatic streamization of image processing applications;parallelism-aware array data flow analysis for openMP;static approximation of MPI communication graphs for optimized process placement;automatic parallelism through macro dataflow in MATLAB;re-engineering compiler transformations to outperform database query optimizers;systematic debugging of concurrent systems using coalesced stack trace graphs;unification of static and dynamic analyses to enable vectorization and efficient exploitation of hyper loop parallelism in vectorization.

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languages and compilers for parallel computing: 27th international workshop, lcpc 2014 Hillsboro, OR, USA, September 15-17, 2014 Revised Selected Papers 27

Languages and Compilers for Parallel Computing: 27th Interna...

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27th international workshop on languages and compilers for parallel computing, lcpc 2014

作者： Brodman, James Tu, Peng Intel Corporation Santa ClaraCA United States

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languages and compilers for parallel computing: 26th international workshop, lcpc 2013 San Jose, CA, USA, September 25-27, 2013 Revised Selected Papers 26

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26th workshop on languages and compilers for parallel computing, lcpc 2013

作者： Cacaval, Clin Montesinos, Pablo Silicon Valley Qualcomm Research San Jose United States

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Jagged Tiling for Intra-tile parallelism and Fine-Grain Multithreading 27

Jagged Tiling for Intra-tile Parallelism and Fine-Grain Mult...

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27th international workshop on languages and compilers for parallel computing (lcpc)

作者： Shrestha, Sunil Manzano, Joseph Marquez, Andres Feo, John Gao, Guang R. Univ Delaware CAPSL Newark DE 19716 USA Pacific NW Natl Lab Richland WA 99354 USA

ISBN: (纸本)9783319174730;9783319174723

In this paper, we have developed a novel methodology that takes into consideration multithreaded many-core designs to better utilize memory/processing resources and improve memory residence on tileable applications. It takes advantage of polyhedral analysis and transformation in the form of PLUTO [6], combined with a highly optimized fine grain tile runtime to exploit parallelism at all levels. the main contributions of this paper include the introduction of multi-hierarchical tiling techniques that increases intra tile parallelism;and a data-flow inspired runtime library that allows the expression of parallel tiles with an efficient synchronization registry. Our current implementation shows performance improvements on an Intel Xeon Phi board up to 32.25% against instances produced by state-of-the-art compiler frameworks for selected stencil applications.

关键词： Program compilers

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Memory Management Techniques for Exploiting RDMA in PGAS languages 27

Memory Management Techniques for Exploiting RDMA in PGAS Lan...

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27th international workshop on languages and compilers for parallel computing (lcpc)

作者： Dalton, Barnaby Tanase, Gabriel Alvanos, Michail Almasi, Gheorghe Tiotto, Ettore IBM Software Grp Toronto ON Canada IBM TJ Watson Res Ctr Yorktown Hts NY USA

ISBN: (纸本)9783319174730;9783319174723

Partitioned Global Address Space (PGAS) languages are a popular alternative when building applications to run on large scale parallel machines. Unified parallel C (UPC) is a well known PGAS language that is available on most high performance computing systems. Good performance of UPC applications is often one important requirement for a system acquisition. this paper presents the memory management techniques employed by the IBM XL UPC compiler to achieve optimal performance on systems with Remote Direct Memory Access (RDMA). Additionally we describe a novel technique employed by the UPC run-time for transforming remote memory accesses on a same shared memory node into local memory accesses, to further improve performance. We evaluate the proposed memory allocation policies for various UPC benchmarks and using the IBM (R) Power (R) 775 supercomputer [1].

关键词： Supercomputers

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languages and compilers for parallel computing 1

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丛书名： Lecture Notes in Computer Science

1000年

作者： James Brodman Peng Tu

ISBN: (数字)9783319174730

ISBN: (纸本)9783319174723

this book constitutes the thoroughly refereed post-conference proceedings of the 27th international workshop on languages and compilers for parallel computing, lcpc 2014, held in Hillsboro, OR, USA, in September 2014. the 25 revised full papers were carefully reviewed and selected from 39 submissions. the papers are organized in topical sections on accelerator programming; algorithms for parallelism; compilers; debugging; vectorization.

关键词： Programming languages, compilers, Interpreters Programming Techniques Software Engineering Operating Systems Algorithm Analysis and Problem Complexity

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Tiled Linear Algebra a System for parallel Graph Algorithms 27

Tiled Linear Algebra a System for Parallel Graph Algorithms

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27th international workshop on languages and compilers for parallel computing (lcpc)

作者： Maleki, Saeed Evans, G. Carl Padua, David A. Univ Illinois Dept Comp Sci Urbana IL 61801 USA

ISBN: (纸本)9783319174730;9783319174723

High performance parallel kernels for solving graph problems are complex and difficult to write. Some systems have been developed to facilitate the implementation of these kernels but the code they produce does not always perform as well as custom software. In this space, we propose Tiled Linear Algebra (TLA), a multi-level system based on linear algebra but with explicit parallel extensions. Programs can be first written in a conventional manner using linear algebra and then tuned for parallel performance using our extension. this separation allows programmers with different expertise to focus on their strengths with writing original codes that can then be tuned by parallel experts. this paper presents the background on using linear algebra to express graph algorithms and describes the extensions TLA provides to implement their parallel versions. the key extensions supported by TLA are: data distribution, partial computation, delaying updates, and communication. With these extensions to the traditional linear algebra operators, we could produce linear algebra based versions of several problems including single source shortest path that should preform close to custom implementations. We present results on several single source shortest path algorithms to demonstrate the features of TLA.

关键词： Linear algebra

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NAS parallel Benchmarks for GPGPUs Using a Directive-Based Programming Model 27

NAS Parallel Benchmarks for GPGPUs Using a Directive-Based P...

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27th international workshop on languages and compilers for parallel computing (lcpc)

作者： Xu, Rengan Tian, Xiaonan Chandrasekaran, Sunita Yan, Yonghong Chapman, Barbara Univ Houston Dept Comp Sci Houston TX 77004 USA

ISBN: (纸本)9783319174730;9783319174723

the broad adoption of accelerators boosts the interest in accelerator programming. Accelerators such as GPGPUs are optimized for throughput and offer high GFLOPS and memory bandwidth. CUDA has been adopted quite rapidly but it is proprietary and only applicable to GPUs, and the difficulty in writing efficient CUDA code has kindled the necessity to create higher-level programming approaches such as OpenACC. Directive-based programming models such as OpenMP and OpenACC offer programmers an option to rapidly create prototype applications by adding annotations to guide compiler optimizations. In this paper we study the effectiveness of a high-level directive based programming model, OpenACC, for parallelizing NAS parallel Benchmarks (NPB) on GPGPUs. We present the application of techniques such as array privatization, memory coalescing, cache optimization and examine their impact on the performance of the benchmarks. the right choice or combination of techniques/hints are crucial for compilers to generate highly efficient codes tuned to a particular type of accelerator. Poorly selected choice or combination of techniques can lead to degraded performance. We also propose a new clause, 'scan', that handles scan operations for arbitrary input array size. We hope that the practices discussed in this paper will provide useful guidance to users to effectively migrate their sequential/CPU-parallel codes to GPGPU architectures and achieve optimal performance.

关键词： Codes (symbols)

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Directive-Based compilers for GPUs 27

Directive-Based Compilers for GPUs

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27th international workshop on languages and compilers for parallel computing (lcpc)

作者： Ghike, Swapnil Gran, Ruben Garzaran, Maria J. Padua, David A. Univ Illinois Dept Comp Sci Champaign IL 61820 USA Univ Zaragoza Dept Informat & Ingn Sistemas Zaragoza Spain

ISBN: (纸本)9783319174730;9783319174723

General Purpose Graphics computing Units can be effectively used for enhancing the performance of many contemporary scientific applications. However, programming GPUs using machine-specific notations like CUDA or OpenCL can be complex and time consuming. In addition, the resulting programs are typically fine-tuned for a particular target device. A promising alternative is to program in a conventional and machine-independent notation extended with directives and use compilers to generate GPU code automatically. these compilers enable portability and increase programmer productivity and, if effective, would not impose much penalty on performance. this paper evaluates two such compilers, PGI and Cray. We first identify a collection of standard transformations that these compilers can apply. then, we propose a sequence of manual transformations that programmers can apply to enable the generation of efficient GPU kernels. Lastly, using the Rodinia Benchmark suite, we compare the performance of the code generated by the PGI and Cray compilers with that of code written in CUDA. Our evaluation shows that the code produced by the PGI and Cray compilers can perform well. For 6 of the 15 benchmarks that we evaluated, the compiler generated code achieved over 85% of the performance of a hand-tuned CUDA version.

关键词： Directive-based compiler OpenACC GPGPU Evaluation Cray PGI Accelerator

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the STAPL Skeleton Framework 27

The STAPL Skeleton Framework

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27th international workshop on languages and compilers for parallel computing (lcpc)

作者： Zandifar, Mani thomas, Nathan Amato, Nancy M. Rauchwerger, Lawrence Texas A&M Univ Dept Comp Sci Parasol Lab College Stn TX 77843 USA

ISBN: (纸本)9783319174730;9783319174723

this paper describes the stapl Skeleton Framework, a high-level skeletal approach for parallel programming. this framework abstracts the underlying details of data distribution and parallelism from programmers and enables them to express parallel programs as a composition of existing elementary skeletons such as map, map-reduce, scan, zip, butterfly, allreduce, alltoall and user-defined custom skeletons. Skeletons in this framework are defined as parametric data flow graphs, and their compositions are defined in terms of data flow graph compositions. Defining the composition in this manner allows dependencies between skeletons to be defined in terms of point-to-point dependencies, avoiding unnecessary global synchronizations. To show the ease of composability and expressivity, we implemented the NAS Integer Sort (IS) and Embarrassingly parallel (EP) benchmarks using skeletons and demonstrate comparable performance to the hand-optimized reference implementations. To demonstrate scalable performance, we show a transformation which enables applications written in terms of skeletons to run on more than 100,000 cores.

关键词： parallel programming

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