Transport in nanowires and nanographene with emphasis on nanotubes is reviewed from classical to quantum, low-field to high-field, nondegenrate to degenerate, scattering limited to ballistic, and beyond. Nonequilibriu...
详细信息
Transport in nanowires and nanographene with emphasis on nanotubes is reviewed from classical to quantum, low-field to high-field, nondegenrate to degenerate, scattering limited to ballistic, and beyond. Nonequilibrium Arora distribution function (NEADF) is shown to be an outgrowth of the Fermi-Dirac statistics by inclusion of the energy gained in a mean free path (mfp). NEADF is highly asymmetric with electrons changing equilibrium random phase to extreme nonequilibrium unilateral phase in a towering electric field. the drift response to the electric field is shown to be limited to the unilateral intrinsic velocity appropriate for twice the carrier concentration as electrons transfer from -x-direction to +x-direction in the presence of an extremely high electric field in the -x-direction. An electron temperature for degenerate statistics is defined to make it compatible with nondegenrate statistics. the intrinsic velocity giving saturation is shown to be independent of the scattering-limited or ballistic mobility. Optical phonon emission may lower the saturation velocity. In a low-field domain, the mobility may become size-dependent and is ballistic when injection from the ohmic contacts is considered.
the paper describes a variable precision floating point simulator, its features and how it is used. the simulator was created at the University of Texas by Darioush Samani, Joshua Ellinger, Edward Powers, and Earl Swa...
详细信息
the paper describes a variable precision floating point simulator, its features and how it is used. the simulator was created at the University of Texas by Darioush Samani, Joshua Ellinger, Edward Powers, and Earl Swartzlander, Jr. (1993). It provides a mechanism for the design and testing of algorithms which use floating point precisions other than the standard single and double precision. the simulator allows the various precisions for floating point operations to be modeled in a virtually transparent mechanism to the user. the existing programming skills of the average user are sufficient to successfully use the simulator. To use the simulator the user simply programs his algorithm using standard mathematical operations and then compiles the simulator code into the program. Techniques and examples that show how both new and existing programs can use the simulator are presented. the various features of the simulator are also described.< >
In the product development of our company's Deep Sub Micron Display Driver IC(DDI), we found that inner cell's and outer cell's characteristic are significantly different. this problem leads to device yiel...
详细信息
In the product development of our company's Deep Sub Micron Display Driver IC(DDI), we found that inner cell's and outer cell's characteristic are significantly different. this problem leads to device yield drop and reliability problem, so we must check the reason why the characteristics changes of inner cell and outer cell were so serious in the array EEPROM cell. First of all, we check the gate oxide area in EEPROM cell on the supposition that inner cell's and outer cell's gate oxide thickness are different. After we checked it, we found that the most effective reason of the characteristics changes was Gate Oxide thickness changes had a decisive effect on the EEPROM Cell' changes according to the degree of STI profile(Top Corner Rounding). And the difference of STI profile is cause of active pattern difference. In this paper, we suggested the profile improvement method by STI process and characteristics improvement by insulting Dummy cell.
the trapping of charge carriers in Ti-doped Ta 2 O 5 (6 nm) stacks on nitrided Si during constant current stress of metal-insulator-semiconductor capacitors has been investigated. Both, the charge buildup on pre-exis...
详细信息
the trapping of charge carriers in Ti-doped Ta 2 O 5 (6 nm) stacks on nitrided Si during constant current stress of metal-insulator-semiconductor capacitors has been investigated. Both, the charge buildup on pre-existing traps as well as on traps generated by the stress have been taken into account to explain the observed evolution of the gate voltage during the measurement. the cross section of pre-existing traps has been estimated by applying the first order kinetic model. Two types of neutral trapping sites with cross sections of 2.8·10 -18 cm 2 and 3.7·10 -19 cm 2 were identified to exist simultaneously in each of the four technologically different Ti-doped Ta 2 O 5 stacks. One of these traps (σ = 3.7·10 -19 cm 2 ) is inherent for the Ta 2 O 5 structure itself, while the other one (σ = 2.8·10 -18 cm 2 ) originates from the presence of Ti. Evidences are presented which support the idea that Ti-related center might be neutral complex obtained by coupling Ti-atoms with an oxygen vacancy.
Devices dedicated to automotive applications have to reach exacting specifications especially in terms of reliability. the burn-in HTGB test is dedicated to evaluate gate oxide integrity with gate biased under high te...
详细信息
Devices dedicated to automotive applications have to reach exacting specifications especially in terms of reliability. the burn-in HTGB test is dedicated to evaluate gate oxide integrity with gate biased under high temperature. therefore, gate oxide quality is an exacting parameter which contributes to device reliability. this paper is based on the study of planar technology and more precisely on vertical double-diffused power MOSFETs. First of all, the purpose of this work is to correlate the gate oxide process quality and the influence of wet cleanings at silicon level on die reliability. Actually, the cleaning performed just before oxide growth is linked with gate oxide robustness as shown with GOI measurements on dedicated structures and QBD measurements on power devices. Another key point is the homogeneity of breakdown voltage due to parallel MOSFETs used in application. Probe electrical results and TEM observations has demonstrated a correlation between BVdss establishment and cleaning used on silicon surface. In conclusion, the kind of cleaning performed at silicon level before oxide growth has been identified to generate irreversible damages for power VDMOSFETs.
Samples investigated in this work contain Hf-doped layers of Ta 2 O 5 , i.e. the mixture of two most favorable high-k materials, which proved appropriate characteristics for application in DRAMs and MOSFETs. the influ...
详细信息
Samples investigated in this work contain Hf-doped layers of Ta 2 O 5 , i.e. the mixture of two most favorable high-k materials, which proved appropriate characteristics for application in DRAMs and MOSFETs. the influence of the top electrode material, with different work functions, on the electrical properties of MIS structures is of particular interest and was studied in this work. Here we confirmed that the presence of interface states causes frequency dispersion of C-V characteristics, but still the negligible hysteresis indicates very low slow states density of the order of 10 10 cm -2 . Another effect observed here is due to the nature of the gate electrodes. It is observed only in the case of high-work-function metal, when trapping of charges in the emptied positive traps in doped Ta 2 O 5 occurs, case that was previously observed in pure Ta 2 O 5 . Here we have determined the parameters of the traps responsible for this effect.
暂无评论