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Maximizing performance on parallel machines

Maximizing performance on parallel machines

引用

Proceedings of the 1997 2nd international symposium on parallel Symbolic Computation, PASCO

作者： Lam, Monica Stanford Univ Stanford United States

parallel machines, especially in the form of shared memory multiprocessors, are becoming pervasive. There is already a large established base of multiprocessor workstations in the field. The recent introduction of highly affordable multiprocessor personal computers and large-scale shared memory machines are likely to make parallel machines even more universal. A critical question that must be addressed is how to make effective use of these shared memory machines. This talks focuses on a critical subsystem of the machine: the memory hierarchy. By modeling the memories of remote processors as yet another level of the memory hierarchy, the problem of minimizing interprocessor communication can be reduced to the fundamental problem of improving the locality of reference in a program. The same set of basic techniques can be applied to improve the cache hit rates and thereby make the individual processors run faster, or to reduce communication overheads and thereby obtain a reasonable speed up on parallel machines. These two factors together lead to a high overall performance. The basic principles in memory hierarchy optimizations are rather simple. Computation involving the same data should be executed close together in time or space (same processor), when possible;similarly, data accessed close together in time or space should reside close together in memory when possible. We have developed a large suite of memory hierarchy optimizations based on these principles, as part of our research on parallelizing and optimizing compilers for numeric applications. These techniques include data and computation transformations, page coloring algorithms and data prefetching, and have been demonstrated to be critical in achieving performance on parallel machines.

关键词： parallel processing systems

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Evaluating parallel logic programming systems on scalable multiprocessors

Evaluating parallel logic programming systems on scalable mu...

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Proceedings of the 1997 2nd international symposium on parallel Symbolic Computation, PASCO

作者： Costa, Vitor Santos Bianchini, Ricardo de Castro Dutra, Ines Porto Univ Porto Portugal

parallel logic programming systems are sophisticated examples of symbolic computing systems. They address problems such as dynamic memory allocation, scheduling irregular execution patterns, and managing different types of implicit parallelism. Most parallel logic programming systems have been developed for bus-based shared-memory architectures. The complexity of parallel logic programming systems and the large amount of data they process raises the question of whether logic programming systems can still obtain good performance on scalable architectures, such as distributed shared-memory systems. In this work we use execution-driven simulation to investigate the access patterns and caching behaviour exhibited by a parallel logic programming system, Andorra-I. We show that the system obtains reasonable performance, but that it does not scale well. By studying the behaviour of the major data structures in Andorra-I in detail, we conclude that this result is largely a consequence of the scheduling and work manipulation implementation used in the system. We also show that the Andorra-I's data structures exhibit widely-varying memory access patterns and caching behaviour, which not only depend on the number of processors, but also on the amount and type of parallelism available in the application program. Some of these data structures clearly favour invalidate-based cache coherence protocols, while others favour update-based protocols. Since most of Andorra-I's data structures are common to other parallel logic programming systems, we believe that these systems can greatly benefit from flexible coherence schemes where either the compiler can specify the protocol to be used for each data structure or the protocol can adapt to varying memory access patterns.

关键词： parallel processing systems

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Scheduling of parallel processing systems based on algorithmic skeletons

Scheduling of parallel processing systems based on algorithm...

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IEEE international Workshop on Software Engineering for parallel and distributed Systems

作者： B. Kalthoff Heinz Nixdorf Institut Paderborn University Paderborn Germany

We motivate the use of algorithmic skeletons for modeling parallel applications in the context of scheduling. Scalability and other features of the skeletal approach are used to improve the quality of scheduling parallel applications in multiprogramming systems. We show how skeletons can be used to model parallel applications that can perform dynamical remapping. This technique modifies schedules during runtime and increases system efficiency.

关键词： parallel processing Scheduling algorithm Skeleton Processor scheduling Scalability Dynamic scheduling Concurrent computing Throughput Heuristic algorithms Hardware

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Evaluating the performance of software distributed shared memory as a target for parallelizing compilers

Evaluating the performance of software distributed shared me...

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Proceedings of the 1997 11th international parallel processing symposium, IPPS 97

作者： Cox, Alan L. Dwarkadas, Sandhya Lu, Honghui Zwaenepoel, Willy Rice Univ Houston United States

In this paper, we evaluate the use of software distributed shared memory (DSM) on a message passing machine as the target for a parallelizing compiler. We compare this approach to compiler-generated message passing, hand-coded software DSM, and hand-coded message passing. For this comparison, we use six applications: four that are regular and two that are irregular. Our results are gathered on an 8-node IBM SP/2 using the TreadMarks software DSM system. We use the APR shared-memory (SPF) compiler to generate the shared memory programs, and the APR XHPF compiler to generate message passing programs. The hand-coded message passing programs run with the IBM PVMe optimized message passing library. On the regular programs, both the compiler-generated and the hand-coded message passing outperform the SPF/TreadMarks combination: the compiler-generated message passing by 5.5% to 40%, and the hand-coded message passing by 7.5% to 49%. On the irregular programs, the SPF/TreadMarks combination outperforms the compiler-generated message passing by 38% and 89%, and only slightly underperforms the hand-coded message passing, differing by 4.4% and 16%. We also identify the factors that account for the performance differences, estimate their relative importance, and describe methods to improve the performance.

关键词： distributed computer systems

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An interface based on transputers to simulate the dynamic equation of robot manipulators using parallel computing 2nd

An interface based on transputers to simulate the dynamic eq...

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2nd international Conference on Vector and parallel processing - Systems and applications, VECPAR 1996

作者： Fernández, J.C. Peñalver, L. Sobejano, M. Martínez, J. Hernández, V. Tornero, J. Dpto. Informática. Universidad Jaume I Castellón12071 Spain Dpto. Ing. Stmas. Comp. y Automática Univ. Politécnica Valencia46071 Spain Dpto. Stmas. Inform. y Comp Univ. Politécnica Valencia46071 Spain

ISBN: (纸本)3540628282

The inverse dynamics control of robot manipulators is based on the application of a nonlinear feedback control law. The implementation of this control requires the computation of all the terms of the dynamic equation at each sample instant. In order to solve this problem, distributed memory parallel algorithms using the Lagrange-Euler formulation are presented. This formulation permits us to establish matrix structures that are distributed among the processors by rows with a good computational load balance. A new Windows interface, called WinServer, based on transputers, which permits us to modify the robot parameters and to simulate the dynamic equation is also presented. This interface can be used as a monitoring tool that allows the user to know the situation of the different processes. © Springer-Verlag Berlin Heidelberg 1997.

关键词： Transputers

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Testing parallel and distributed programs with temporal logic specifications

Testing parallel and distributed programs with temporal logi...

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IEEE international Workshop on Software Engineering for parallel and distributed Systems

作者： M. Frey M. Oberhuber Institut für Informatik Technische Universität München Munich Germany LRR-TUM Technische Universität München Munich Germany

This paper presents a new approach for testing parallel and distributed programs based on specifications. The requirements are formulated in temporal logic. The description of test cases is extended by control patterns enabling to cope with the demands of parallel applications. For the formulation of these patterns, an abstract execution model called POEM is introduced. After executing a parallel program with respect to a test case specification and its patterns, the resulting trace is checked against the temporal logic specification of the predefined requirements.

关键词： Logic testing parallel processing Software engineering Application software Software testing Software quality Software tools Debugging Message passing Flow graphs

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Prototype-oriented development of high-performance systems

Prototype-oriented development of high-performance systems

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IEEE international Workshop on Software Engineering for parallel and distributed Systems

作者： G.R.R. Justo P. Vekariya T. Delaitre J. Zemerly S. Winter Centre for Parallel Computing University of Westminster London UK

We discuss the problem of developing performance-oriented software and the need for methodologies. We then present the EDPEPPS (Environment for Design and Performance Evaluation of Portable parallel Software) approach to the problem of designing and evaluating high-performance (parallel) applications. The EDPEPPS toolset is based on a rapid prototyping philosophy, where the designer synthesises a model of the intended software which may be simulated, and the performance is subsequently analysed using visualisation. The toolset combines a graphical design tool, a simulation facility, and a visualisation tool. The same design is used to produce a code suitable for simulation and real execution.

关键词： Prototypes Software prototyping Application software Software performance Analytical models Skeleton parallel processing Virtual prototyping Visualization Software engineering

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Hierarchical optimization of parallel applications

Hierarchical optimization of parallel applications

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IEEE international Workshop on Software Engineering for parallel and distributed Systems

作者： A. Mitschele-Thiel IMMD VII Universität Erlangen Nürnberg Erlangen Germany

In order to allow the efficient implementation of parallel application programs, various design decisions have to be made and implemented. These include the task mapping and schedule, the task granularity as well as decisions concerning code optimizations. The paper describes a hierarchical concept for system design and implementation. The concept has been implemented in the DSPL programming environment, an integrated approach to generate efficient parallel programs from data-flow specifications. It supports the design itself as well as the implementation of the design decisions. In contrast to most programming environments for MIMD systems that simply use a runtime kernel or an operating system to implement the design decisions, the DSPL programming environment actually transforms the application program to implement the design decisions as the task schedule and granularity. In this paper we focus on the hierarchical strategy to compute and implement the design decisions concerning the task schedule. We show how most of the schedule can be decided statically even in the presence of input-dependent program behavior. This results in much lower runtime overhead than incurred with dynamic approaches based on operating systems.

关键词： Processor scheduling parallel programming Programming environments Operating systems Signal design Algorithm design and analysis Signal processing algorithms World Wide Web Runtime environment Dynamic scheduling

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Enhancing software DSM for compiler-parallelized applications

Enhancing software DSM for compiler-parallelized application...

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international symposium on parallel processing

作者： P. Keleher Chau-Wen Tseng Department of Computer Science University of Maryland College Park MD USA

Current parallelizing compilers for message-passing machines only support a limited class of data-parallel applications. One method for eliminating this restriction is to combine powerful shared-memory parallelizing compilers with software distributed shared-memory (DSM) systems. We demonstrate such a system by combining the SUIF parallelizing compiler and the CVM software DSM. Innovations of the system include compiler-directed techniques that: (1) combine synchronization and parallelism information communication on parallel task invocation, (2) employ customized routines for evaluating reduction operations, and (3) select a hybrid update protocol that pre-sends data by flushing updates at barriers. For applications with sufficient granularity of parallelism, these optimizations yield very good eight processor speedups on an IBM SP-2 and DEC Alpha cluster usually matching or exceeding the speedup of equivalent HPF and message-passing versions of each program. Flushing updates, in particular, eliminates almost all nonlocal memory misses and improves performance by 13% on average.

关键词： Application software Program processors parallel processing Protocols Computer architecture Concurrent computing parallel machines Workstations Software performance Computer science

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Predicting queue times on space-sharing parallel computers

Predicting queue times on space-sharing parallel computers

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international symposium on parallel processing

作者： A.B. Downey San Diego Supercomputer Center San Diego CA USA Computer Science Division University of California Berkeley CA USA

We present statistical techniques for predicting the queue times experienced by jobs submitted to a space-sharing parallel machine with first-come-first-served (FCFS) scheduling. We apply these techniques to trace data from the Intel Paragon at the San Diego Supercomputer Center and the IBM SP2 at the Cornell Theory Center. We show that it is possible to predict queue times with accuracy that is acceptable for several intended applications. The coefficient of correlation between our predicted queue times and the actual queue times from simulated schedules is between 0.65 and 0.72.

关键词： Concurrent computing Processor scheduling Supercomputers Application software distributed computing Time sharing computer systems Queueing analysis Computational modeling Predictive models Computer simulation

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