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Challenges and Opportunities in Designing High-Performance and Scalable Middleware for HPC and AI: Past, Present, and Future

Challenges and Opportunities in Designing High-Performance a...

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international symposium on parallel and distributed processing (IPDPS)

作者： D K Panda

This talk focuses on challenges and opportunities emerging over the years (past, present, and future) in designing middleware for HPC and AI (Deep/Machine Learning) workloads on modern high-end computing systems. The talk initially presents the challenges in designing HPC runtime environments with MPI+X programming models by considering support for dense multi-core CPUs, high-performance interconnects, GPUs, and emerging DPUs. Advanced designs and solutions (such as RDMA, in-network computing, GPUDirect RDMA, on-the-fly compression) to exploit novel features of these emerging technologies and their benefits in the context of MVAPICH2 libraries are presented. Next, the talk focuses on MPI-driven solutions for the Deep/Machine Learning domains to extract performance and scalability for popular Deep Learning frameworks, large out-of-core models, GPUs, and DPUs. MPI-driven solutions to accelerate data science applications like Dask are highlighted. Challenges and experiences in deploying this middleware to the HPC cloud environments for Azure, AWS, and Oracle Cloud are presented. The talk concludes with an overview of the newly established NSF-AI Institute ICICLE (https://***/) to address challenges in designing future high-performance edge-to-HPC/ cloud middleware for AI-driven data-intensive applications.

关键词： Middleware Libraries distributed processing Deep learning Computational modeling Scalability Runtime environment

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A General Offloading Approach for Near-DRAM processing-In-Memory Architectures

A General Offloading Approach for Near-DRAM Processing-In-Me...

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international symposium on parallel and distributed processing (IPDPS)

作者： Dan Chen Hai Jin Long Zheng Yu Huang Pengcheng Yao Chuangyi Gui Qinggang Wang Haifeng Liu Haiheng He Xiaofei Liao Ran Zheng National Engineering Research Center for Big Data Technology and System/Services Computing Technology and System Lab/Clusters and Grid Computing Lab Huazhong University of Science and Technology China

processing-in-memory (PIM) is promising to solve the well-known data movement challenge by performing in-situ computations near the data. Leveraging PIM features is pretty profitable to boost the energy efficiency of applications. Early studies mainly focus on improving the programmability for computation offloading on PIM architectures. They lack a comprehensive analysis of computation locality and hence fail to accelerate a wide variety of applications. In this paper, we present a general-purpose instruction-level offloading technique for near-DRAM PIM architectures, namely IOTPIM, to exploit PIM features comprehensively. IOTPIM is novel with two technical advances: 1) a new instruction offloading policy that fully considers the locality of the whole on-chip cache hierarchy, and 2) an offloading performance benefit prediction model that directly predicts offloading performance benefits of an instruction based on the input dataset characterizes, preserving low analysis overheads. The evaluation demonstrates that IOTPIM can be applied to accelerate a wide variety of applications, including graph processing, machine learning, and image processing. IOT-PIM outperforms the state-of-the-art PIM offloading techniques by 1.28×-1.51× while ensuring offloading accuracy as high as 91.89% on average.

关键词： Analytical models Technological innovation distributed processing Systematics Image processing Computer architecture Machine learning

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A Trend of 2D Human Pose Estimation Base on Deep Learning 4

A Trend of 2D Human Pose Estimation Base on Deep Learning

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4th international symposium on Smart and Healthy Cities, ISHC 2022

作者： Wei, Chunyan Long, Wei Jiang, Sudong Chen, Changxue Wu, Dongfang Jiang, Linhua Fudan University Academy for Engineering and Technology Shanghai China School of Information Engineering Huzhou University Zhejiang Huzhou China Chongqing Changan Automobile Co. Ltd Chongqing China

ISBN: (纸本)9781665491808

The research on Human pose estimation remains the most fundamental and challenging problem in computer vision. In this context, computer vision-based automobile safety-assisted driving technology has received comprehensive attention and is widely used in automobile-assisted driving systems. Powered by advanced artificial intelligence, the scale of data to be learned by deep learning networks is increasing, the processing tasks are becoming more and more complex, and the model parameters are also increasing. In the field of distributed parallel computing research has also received extensive attention. In this work, we focus on the challenge of human posture estimation in two dimensions, using both conventional and deep learning techniques, with an emphasis on its study's potential use in traffic-related settings. Recent approaches for estimating human poses are introduced, and a summary of how to extract bone joint points using deep learning techniques is provided. In conclusion, it elaborates on the present state of going beyond the bounds of single-computer computing resources and merging distributed architecture with deep learning to address the challenges and opportunities in human pose estimation. Human posture estimation has several technological applications, including the detection of driving behaviour and the analysis of fitness data. © 2022 IEEE.

关键词： Computer vision

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An Efficient Vectorization Scheme for Stencil Computation

An Efficient Vectorization Scheme for Stencil Computation

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international symposium on parallel and distributed processing (IPDPS)

作者： Kun Li Liang Yuan Yunquan Zhang Yue Yue Hang Cao State Key Laboratory of Computer Architecture Chinese Academy of Sciences Institute of Computing Technology Beijing School of Computer Science and Technology University of Chinese Academy of Sciences Beijing

Stencil computation is one of the most important kernels in various scientific and engineering applications. A variety of work has focused on vectorization and tiling techniques, aiming at exploiting the in-core data parallelism and data locality respectively. In this paper, the downsides of existing vectorization schemes are analyzed. Briefly, they either incur data alignment conflicts or hurt the data locality when integrated with tiling. Then we propose a novel transpose layout to preserve the data locality for tiling and reduce the data reorganization overhead for vectorization simultaneously. To further improve the data reuse at the register level, a time loop unroll-and-jam strategy is designed to perform multistep stencil computation along the time dimension. Experimental results on the AVX2 and AVX-S12 CPUs show that our approach obtains a competitive performance with the classic vectorization methods (Auto Vectorization and Data Reorganization), state-of-the-art compilers (Pluto and SDSL), and highly-optimized work (DLT and Tessellation).

关键词： Concurrent computing distributed processing Layout parallel processing Registers Computational efficiency Kernel

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Shared-Memory parallel Algorithms for Fully Dynamic Maintenance of 2-Connected Components

Shared-Memory Parallel Algorithms for Fully Dynamic Maintena...

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international symposium on parallel and distributed processing (IPDPS)

作者： Chirayu Anant Haryan G. Ramakrishna Kishore Kothapalli Dip Sankar Banerjee Indian Institute of Technology Tirupati India International Institute of Information Technology Hyderabad India Indian Institute of Technology Jodhpur India

Finding the biconnected components of a graph has a large number of applications in many other graph problems including planarity testing, computing the centrality metrics, finding the (weighted) vertex cover, coloring, and the like. Recent years saw the design of efficient algorithms for this problem across sequential and parallel computational models. However, current algorithms do not work in the setting where the underlying graph changes over time in a dynamic manner via the insertion or deletion of edges. Dynamic algorithms in the sequential setting that obtain the biconnected components of a graph upon insertion or deletion of a single edge are known from over two decades ago. parallel algorithms for this problem are not heavily studied. In this paper, we design shared-memory parallel algorithms that obtain the biconnected components of a graph subsequent to the insertion or deletion of a batch of edges. Our algorithms hence will be capable of exploiting the parallelism adduced due to a batch of updates. We implement our algorithms on an AMD EPYC 7742 CPU having 128 cores. Our experiments on a collection of 10 real-world graphs from multiple classes indicate that our algorithms outperform parallel state-of-the-art static algorithms. 1 1 The implementation and an extended version of this paper is at [5].

关键词： Semiconductor device modeling Measurement distributed processing Heuristic algorithms Instruction sets Computational modeling Maintenance engineering

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Keynote Talk 2 Training Large Language Models: Challenges and Opportunities

Keynote Talk 2 Training Large Language Models: Challenges an...

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IEEE international symposium on parallel and distributed processing Workshops and Phd Forum (IPDPSW)

作者： Mostofa Patwary NVIDIA

ISBN: (数字)9781665497473

ISBN: (纸本)9781665497480

Language models with large number of parameters trained on massive datasets can achieve state-of-the-art accuracies in various natural language processing applications including summarization, automatic dialogue generation, translation, semantic search, and code autocompletion. However, training such models is challenging as these models no longer fit in the largest GPU memory and can require a very long training time. Therefore, numerous innovations and breakthroughs are required in dataset, algorithms, software, and hardware altogether to make training these models a reality. In this talk, I present our efforts to train the Megatron-Turing Natural Language Generation model (MT-NLG), the largest and the most powerful monolithic transformer language model trained to date, with 530 billion parameters. I will also showcase several applications of MT-NLG and discuss future research and numerous opportunities that this model presents.

关键词： Training Natural language processing distributed processing Conferences Web and internet services Transformers Technological innovation

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A Novel Big Data processing Approach to Feature Extraction for Electrical Discharge Machining based on Container Technology

A Novel Big Data Processing Approach to Feature Extraction f...

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22nd IEEE/ACIS international Conference on Software Engineering, Artificial Intelligence, Networking and parallel/distributed Computing (SNPD-Fall)

作者： Alimadji, Denata Rizky Hung, Min-Hsiung Lin, Yu-Chuan Suryajaya, Benny Chen, Chao-Chun Chinese Culture Univ Dept Comp Sci & Informat Engn Taipei Taiwan Natl Cheng Kung Univ Inst Mfg Informat & Syst Tainan Taiwan

ISBN: (纸本)9781665404037

EDM (Electrical Discharge Machining) is a process to remove metal from conductive materials using electrical sparks. To monitor the EDM process using virtual metrology (VM), we need to obtain the electrode's voltage and current signals of a machine tool. Due to the nature of EDM, the sensors installed on the machine tool acquire the signals at a high sampling rate and generate a vast amount of data in a short time, thereby raising the big-data processing issue. Our previous work proposed an efficient approach called BEDPS to process the EDM big data in a Hadoop distributed cluster. This paper presents a novel big data processing approach to feature extraction for EDM by using container technology (i.e., Docker and Kubernetes). We reimplement some Spark algorithms of BEDPS in Python (originally in Scala) and then run the refined BEDPS in containers in a Kubernetes cluster. Testing results show that the refined BEDPS developed in this study can reduce the execution time by almost half, compared to the original Scala version (9.6577 minutes vs. 19.2735 minutes). The adoption of Python in Spark is also shown to have similar performance with Scala, although there are some cases where Python performance falls short, for example, parallel processing using Python parallel processing library. The results also show that the Kubernetes cluster is promising to be an alternative way, other than the Hadoop, for processing big data. At the same time, it can bring some advantages to the big data processing applications, such as easy deployment, robustly running, load balance, self-healing, failover, and horizontal auto-scaling for containerized applications.

关键词： Electrical Discharge Machining (EDM) Virtual Metrology Feature Extraction Big Data Hadoop Docker Container Kubernetes Python

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Generalized Flow-Graph Programming Using Template Task-Graphs: Initial Implementation and Assessment

Generalized Flow-Graph Programming Using Template Task-Graph...

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international symposium on parallel and distributed processing (IPDPS)

作者： Joseph Schuchart Poornima Nookala Mohammad Mahdi Javanmard Thomas Herault Edward F. Valeev George Bosilca Robert J. Harrison Innovative Computing Laboratory The University of Tennessee Knoxville TN USA Institute for Advanced Computational Science Stony Brook University Stony Brook NY USA Meta Platforms Inc New York NY USA Department of Chemistry Virginia Polytechnic Institute and State University Blacksburg VA USA

We present and evaluate TTG, a novel programming model and its C++ implementation that by marrying the ideas of control and data flowgraph programming supports compact specification and efficient distributed execution of dynamic and irregular applications. Programming interfaces that support task-based execution often only support shared memory parallel environments; a few support distributed memory environments, either by discovering the entire DAG of tasks on all processes, or by introducing explicit communications. The first approach limits scalability, while the second increases the complexity of programming. We demonstrate how TTG can address these issues without sacrificing scalability or programmability by providing higher-level abstractions than conventionally provided by task-centric programming systems, without impeding the ability of these runtimes to manage task creation and execution as well as data and resource management efficiently. TTG supports distributed memory execution over 2 different task runtimes, PaRSEC and MADNESS. Performance of four paradigmatic applications (in graph analytics, dense and block-sparse linear algebra, and numerical integrodifferential calculus) with various degrees of irregularity implemented in TTG is illustrated on large distributed-memory platforms and compared to the state-of-the-art implementations.

关键词： Runtime Processor scheduling Scalability distributed databases C++ languages Programming Data models

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Coloring the Vertices of 9-pt and 27-pt Stencils with Intervals

Coloring the Vertices of 9-pt and 27-pt Stencils with Interv...

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international symposium on parallel and distributed processing (IPDPS)

作者： Dante Durrman Erik Saule Dept. Mathematics UNC Charlotte Charlotte NC Dept. Computer Science UNC Charlotte Charlotte NC

Graph coloring is commonly used to schedule computations on parallel systems. Given a good estimation of the computational requirement for each task, one can refine the model by adding a weight to each vertex. Instead of coloring each vertex with a single color, the problem is to color each vertex with an interval of colors. In this paper, we are interested in studying this problem for particular classes of graphs, namely stencil graphs. Stencil graphs appear naturally in the parallelisation of applications where the location of an object in a space affects the state of neighboring objects. Rectilinear decompositions of a space generate conflict graphs that are 9-pt stencils for 2D problems and 27-pt stencils for 3D problems. We show that the 5-pt stencil and 7-pt stencil relaxations of the problem can be solved in polynomial time. We prove that the decision problem on 27-pt stencil is NP-Complete. We discuss approximation algorithms with a ratio of 2 for the 9-pt stencil case, and 4 for the 27-pt stencil case. We identify two lower bounds for the problem that are used to design heuristics. We evaluate the effectiveness of several different algorithms experimentally on a set of real instances. Furthermore, these algorithms are integrated into a real application to demonstrate the soundness of the approach.

关键词： Schedules distributed processing Three-dimensional displays Runtime Heuristic algorithms Computational modeling Estimation

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Development of parallel CFD applications on distributed Memory with Chapel 34

Development of Parallel CFD Applications on Distributed Memo...

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34th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Parenteau, Matthieu Bourgault-Cote, Simon Plante, Frederic Laurendeau, Eric Polytech Montreal Dept Mech Engn Montreal PQ Canada

ISBN: (纸本)9781728174457

Traditionally, Computational Fluid Dynamics (CFD) software uses Message Passing Interface (MPI) to handle the parallelism over distributed memory systems. For a new developer, such as a student or a new employee, the barrier of entry can be high and more training is required for each particular software package, which slows down the research process on actual science. The Chapel programming language offers an interesting alternative for research and development of CFD applications. In this paper, the developments of two CFD applications are presented: the first one as an experiment by re-writing a 2D structured flow solver and the second one as writing from scratch a research 3D unstructured multi-physics simulation software. Details are given on both applications with emphasis on the Chapel features which were used positively in the code design, in particular to improve flexibility and extend to distributed memory. Some performance pitfalls are discussed with solutions to avoid them. The performance of the unstructured software is then studied and compared to a traditional open-source CFD software package programmed in C++ with MPI for communication (SU2). The results show that our Chapel implementation achieves performances similar to other CFD software written in C and C++, thus confirming that Chapel is a viable language for high-performance CFD applications.

关键词： CFD RANS Chapel distributed memory HPC

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