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Near-Optimal Straggler Mitigation for distributed Gradient Methods 32

Near-Optimal Straggler Mitigation for Distributed Gradient M...

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32nd IEEE international parallel and distributed processing symposium (IPDPS)

作者： Li, Songze Kalan, Seyed Mohammadreza Mousavi Avestimehr, A. Salman Soltanolkotabi, Mahdi Univ Southern Calif Los Angeles CA 90089 USA

ISBN: (纸本)9781538655559

Modern learning algorithms use gradient descent updates to train inferential models that best explain data. Scaling these approaches to massive data sizes requires proper distributed gradient descent schemes where distributed worker nodes compute partial gradients based on their partial and local data sets, and send the results to a master node where all the computations are aggregated into a full gradient and the learning model is updated. However, a major performance bottleneck that arises is that some of the worker nodes may run slow. These nodes a.k.a. stragglers can significantly slow down computation as the slowest node may dictate the overall computational time. We propose a distributed computing scheme, called Batched Coupon's Collector (BCC) to alleviate the effect of stragglers in gradient methods. We prove that our BCC scheme is robust to a near optimal number of random stragglers. We also empirically demonstrate that our proposed BCC scheme reduces the run-time by up to 85.4% over Amazon EC2 clusters when compared with other straggler mitigation strategies. We also generalize the proposed BCC scheme to minimize the completion time when implementing gradient descent-based algorithms over heterogeneous worker nodes.

关键词： Training Computational modeling Encoding Task analysis distributed databases Data models"

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On Optimizing Complex Stencils on GPUs

On Optimizing Complex Stencils on GPUs

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international symposium on parallel and distributed processing (IPDPS)

作者： Prashant Singh Rawat Miheer Vaidya Aravind Sukumaran-Rajam Atanas Rountev Louis-Noël Pouchet P. Sadayappan The Ohio State University USA Colorado State University USA

Stencil computations are often the compute-intensive kernel in many scientific applications. With the increasing demand for computational accuracy, and the emergence of massively data-parallel high-bandwidth architectures like GPUs, stencils have steadily become more complex in terms of the stencil order, data accesses, and reuse patterns. Many prior efforts have focused on optimizing simpler stencil computations on various platforms. However, existing stencil code generators face challenges in optimizing such complex multi-statement stencil DAGs. This paper addresses the challenges in optimizing high-order stencil DAGs on GPUs by focusing on two key considerations: (1) enabling the domain expert to guide the code optimization, which may otherwise be extremely challenging for complex stencils; and (2) using bottleneck analysis via runtime profiling to guide the application of optimizations, and the tuning of various code generation parameters. We implement these abstractions in a prototype code generation framework termed ARTEMIS, and evaluate its efficacy over multiple stencil kernels with varying complexity and operational intensity on an NVIDIA P100 GPU.

关键词： Optimization DSL Graphics processing units Registers Kernel Generators Instruction sets

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Millipede: Die-Stacked Memory Optimizations for Big Data Machine Learning Analytics 32

Millipede: Die-Stacked Memory Optimizations for Big Data Mac...

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32nd IEEE international parallel and distributed processing symposium (IPDPS)

作者： Nitin Thottethodi, Mithuna Vijaykumar, T. N. NVIDIA Santa Clara CA 95051 USA Purdue W Lafayette IN 47907 USA Purdue Univ ECE W Lafayette IN 47907 USA

ISBN: (纸本)9781538643686

The technology-push of die stacking and application-pull of Big Data machine learning analytics (BMLA) have created a unique opportunity for processing-near-memory (PNM). This paper makes four contributions: (1) While previous PNM work explores general MapReduce workloads, we identify three application characteristics of most BMLAs: (a) irregular-and-compute-light (i.e., perform only a few operations per input word which include data-dependent branches and indirect memory accesses);(b) compact (i.e., the relevant portion of the input data and the intermediate live data for each thread are small);and (c) memory-row-dense (i.e., process the input data without skipping over many bytes). These characteristics, except for irregularity, are necessary for bandwidth-and energy-efficient PNM, irrespective of the architecture. (2) Based on these characteristics, we propose memory optimizations for a "sea of simple MIMD cores (SSMC)" PNM architecture, called Millipede, which (pre) fetches and operates on entire memory rows to exploit BMLAs' row-density. Instead of this row-oriented access and compute-schedule, traditional multicores opportunistically improve row locality while fetching and operating on cache blocks. (3) Millipede employs well-known MIMD execution to handle BMLAs' irregularity, and sequential prefetch of input data to hide memory latency. In Millipede, however, one corelet prefetches a row for all the corelets which may stray far from each other due to their MIMD execution. Consequently, a leading corelet may prematurely evict the prefetched data before a lagging corelet has consumed the data. Millipede employs cross-corelet flow-control to prevent such eviction. (4) Millipede further exploits its flow-controlled prefetch for frequency scaling based on coarse-grain compute-memory rate-matching which decreases (increases) the processor clock speed when the prefetch buffers are empty (full). Using simulations, we compare PNM architectures to show that Millipede i

关键词： Prefetching Multicore processing Bandwidth parallel processing Big Data Stacking"

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2D Otsu segmentation algorithm improvement based on FOCPSO 16

2D Otsu segmentation algorithm improvement based on FOCPSO

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16th IEEE ISPA / 17th IEEE IUCC / 8th IEEE BDCloud / 11th IEEE SocialCom / 8th IEEE SustainCom

作者： Zhang, Yingjie Zeng, Liang Zhang, Ying Meng, Jie Hunan Univ Coll Comp Sci & Elect Engn Changsha Hunan Peoples R China Australian Natl Univ Coll Engn & Comp Sci Canberra ACT Australia

ISBN: (纸本)9781728111414

This paper presents a particle -swarm -optimized 2D Otsu segmentation algorithm based on fractional order differential and cloud model (hereinafter called the TOCPSO) to solve the low efficiency of the traditional 2D Otsu segmentation algorithm. The proposed algorithm uses 2D Otsu as fitness function, and adaptively changes the fractional order according to the state of particle swarm. It updates the speed and position values by obtaining the a -order derivative at the current moment. Based on the fitness value, the particles are divided into different populations. Experiments show that the proposed segmentation process improves the convergence speed of the algorithm under the premise of guaranteeing the segmentation effect.

关键词： fractional order differential cloud model 2D Otsu image segmentation

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Exploiting Flow Graph of System of ODEs to Accelerate the Simulation of Biologically-Detailed Neural Networks

Exploiting Flow Graph of System of ODEs to Accelerate the Si...

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international symposium on parallel and distributed processing (IPDPS)

作者： Bruno R. C. Magalhães Michael Hines Thomas Sterling Felix Schüermann Blue Brain Project École polytechnique fédérale de Lausanne Switzerland Yale University New Haven CT US CREST - Center for Research in Extreme Scale Technologies Indiana University Bloomington 47404 IN

Exposing parallelism in scientific applications has become a core requirement for efficiently running on modern distributed multicore SIMD compute architectures. The granularity of parallelism that can be attained is a key determinant for the achievable acceleration and time to solution. Motivated by a scientific use case that requires the simulation of long spans of time - the study of plasticity and learning in detailed models of brain tissue - we present a strategy that exposes and exploits multicore and SIMD micro-parallelism from unrolling flow dependencies and concurrent outputs in a large system of coupled ordinary differential equations (ODEs). An implementation of a parallel simulator is presented, running on the HPX runtime system for the ParalleX execution model, providing dynamic taskscheduling and asynchronous execution. The implementation was tested on different architectures using a previously published brain tissue model. Benchmark of single neurons on a single compute node present a speed-up of circa 4-7× when compared with the state of the art Single Instruction Multiple Data (SIMD) implementation and 13-40× over its Single Instruction Single Data (SISD) counterpart. Large scale benchmarks suggest almost ideal strong scaling and a speed-up of 2-8× on a distributed architecture of 128 Cray X6 compute nodes.

关键词： Computational modeling Neurons Mathematical model Biological system modeling Brain modeling parallel processing

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A Unified Programming Model for Time- and Data-Driven Embedded applications 26

A Unified Programming Model for Time- and Data-Driven Embedd...

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26th Euromicro international Conference on parallel, distributed, and Network-Based processing (PDP)

作者： Breaban, Gabriela Stuijk, Sander Goossens, Kees Eindhoven Univ Technol Eindhoven Netherlands Top Embedded Prod Best Netherlands

ISBN: (纸本)9781538649756

Modern embedded systems encompass a fast-increasing range of applications, spanning from automotive to multimedia, and industrial automation. To tackle the increasing design complexity, the model-based design paradigm promotes the use of Models of Computation (MoCs) to capture the essential application properties. Existing MoCs are split between the event/time-triggered paradigm and the data-driven paradigm. However, time and data are two inter-related dimensions that are essential for defining the correct application behavior. In this paper we advocate a unified MoC that integrates the notions of time and data while accounting for imperfect clocks. We present the formal properties of our model and show how the Synchronous Data Flow (SDF) MoC can be used to analyze the time performance guarantees.

关键词： Clocks Task analysis Synchronization Jitter Semantics Analytical models Protocols

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Performance of Hierarchical-matrix BiCGStab Solver on GPU clusters 32

Performance of Hierarchical-matrix BiCGStab Solver on GPU cl...

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27th international Heterogeneity in Computing Workshop in conjunction with 32nd IEEE international parallel and distributed processing symposium (IPDPS)

作者： Yamazaki, Ichitaro Abdelfattah, Ahmad Ida, Akihiro Ohshima, Satoshi Tomov, Stanimire Yokota, Rio Dongarra, Jack Univ Tennessee Innovat Comp Lab Knoxville TN 37996 USA Univ Tokyo Ctr Informat Technol Tokyo Japan Kyushu Univ Res Inst Informat Technol Fukuoka Japan Tokyo Inst Technol Global Sci Informat & Comp Ctr Tokyo Japan

ISBN: (纸本)9781538643686

HACApK is a software package for solving dense linear systems of equations and is used in other software packages, like ppohBEM for solving boundary integral equations. To enable the solution of large-scale boundary value problems, HACApK hierarchically compresses the coefficient matrix and uses the BiConjugate Gradient Stabilized (BiCGStab) method for solving the linear system. To extend HACApK's capability, this paper outlines how we ported the HACApK linear solver onto GPU clusters. Though the potential of GPUs has been widely accepted in high-performance computing, it is still a challenge to utilize the GPUs for a solver, like HACApK, that requires fine-grained irregular computation and global communication. To utilize the GPUs, we integrated the variable-size batched GPU kernel that was recently released in the MAGMA software package. This is the first time the variable-size batched kernels were used in a solver or application code. We discuss several techniques to improve the performance of the batched kernel and demonstrate the effects of these techniques on two state-of-the-art GPU clusters. For instance, with two 14-core Intel Xeon CPUs and four NVIDIA P100 GPUs per node, the GPU kernel obtained a solver speedup of 8x on one node and 4x on eight nodes. We also show that when the inter-GPU communication becomes significant, the solution time can be further reduced by a factor of 2x by carefully designing the communication layer with the underlying node architecture in mind.

关键词： Graphics processing units Kernel Linear systems Task analysis Acceleration Integral equations"

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Big Data processing in Fog - Smart Parking Case Study 16

Big Data Processing in Fog - Smart Parking Case Study

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16th IEEE ISPA / 17th IEEE IUCC / 8th IEEE BDCloud / 11th IEEE SocialCom / 8th IEEE SustainCom

作者： Sang Nguyen Salcic, Zoran Zhang, Xuyun Univ Auckland Auckland New Zealand

ISBN: (纸本)9781728111414

The introduction of Internet of Things (IoT) and its positive effects within city life context will be first seen in the applications that most obviously affect people's lives, such as improving traffic efficiency, reducing time spent in vehicles while travelling around the city and generally mitigating traffic congestion. Vehicle parking and its management represent the major issues that directly affect people's time and can have significant financial effects, thus making it directly interesting to both service providers and users. Parking can be more efficient by making it smarter. This can be achieved by extensive use of IoT-based sensing in carparks, then processing and further contextualising the huge amount of generated data for two types of goals: (1) long-term goals of efficient carparks management and (2) short-term goal of helping the drivers by reducing time for finding a suitable carpark. In this paper, we propose an IoT-based platform for monitoring carpark occupancy around a city and then doing data analytics near its sources, at the fog level, without streaming and storing all sensing data in the cloud. The data analytics system in our platform uses Hadoop MapReduce and is run on a cluster of commodity computers at each fog computing node. We explore the efficiency and scalability of the approach by performing data analytics tasks related to smart parking on the parking datasets of various sizes collected from a real sensor-based system and by extrapolating it by significant increase in its size.

关键词： Smart parking Internet of Things (IoT) big data analytics Hadoop MapReduce scalability

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S2R: Service trading based response time optimization in mobile edge computing 16

S2R: Service trading based response time optimization in mob...

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16th IEEE ISPA / 17th IEEE IUCC / 8th IEEE BDCloud / 11th IEEE SocialCom / 8th IEEE SustainCom

作者： Mishra, Pritish Tiwary, Mayank Yang, Laurence T. Puthal, Deepak SAP Labs Prod & Innovat Bangalore Karnataka India St Francis Xavier Univ Antigonish NS Canada Univ Technol Sydney Sydney NSW Australia

ISBN: (纸本)9781728111414

New caching forms coupled with Mobile Edge Computing (MEC) supports new computing architecture at the physical proximity of the end-users. One of the similar architectures is mobile cloudlet, where a smartphone offers computations to another smartphone. However, the mobile edge computing architecture still has lots of issues related to response time optimization and resource provisioning. This paper focuses on a novel auction strategy to optimize resource utilization and as a result, proposed scheme minimizes the response time. The auction scheme is developed using multiple-leader and multiple-follower Stackelberg game model, which optimizes the utility of both users and mobile edges using non-cooperative approach for users and co-operative approach for mobile edges. Finally, the proposed scheme is simulated in NS3 environment and compared with existing schemes to validate the performance of proposed scheme. We observe that with the proposed scheme, there is a steep increase in overall utility in terms of response time and resource utilization.

关键词： Mobile Cloudlets Price Trading Multiple-Leader-Multiple-Follower Stackelberg Game Response Time Smart-Phones

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Automatic Energy Efficient HPC Programming: A Case Study 16

Automatic Energy Efficient HPC Programming: A Case Study

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16th IEEE ISPA / 17th IEEE IUCC / 8th IEEE BDCloud / 11th IEEE SocialCom / 8th IEEE SustainCom

作者： Rais, Issam Coullon, Helene Lefevr, Laurent Perez, Christian INRIA IMT Atlantique LS2N UBL F-44307 Nantes France Univ Claude Bernard Lyon 1 Univ Lyon CNRS INRIAENS LyonLIP Lyon France

ISBN: (纸本)9781728111414

Energy consumption is one of the major challenges of modern datacenters and supercomputers. By applying Green Programming techniques, developers have to iteratively implement and test new versions of their software, thus evaluating the impact of each code version on their energy, power and performance objectives. This approach is manual and can be long, challenging and complicated, especially for High Performance Computing applications. In this paper, we formally introduces the definition of the Code Version Variability (CVV) leverage and present a first approach to automate Green Programming (i.e., CVV usage) by studying the specific use-case of an HPC stencil-based numerical code, used in production. This approach is based on the automatic generation of code versions thanks to a Domain Specific Language (DSL), and on the automatic choice of code version through a set of actors. Moreover, a real case study is introduced and evaluated though a set of benchmarks to show that several trade-offs are introduced by CVV1. Finally, different kinds of production scenarios are evaluated through simulation to illustrate possible benefits of applying various actors on top of the CVV automation.

关键词： Code version variability leverage green programming automation energy efficiency power capping high performance computing DSL shallow-water equations

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