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检索条件"任意字段=30th International Conference on Logic Programming"

共 1045 条记录，以下是651-660 订阅

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Dynamical models and tracking regret in online convex programming

Dynamical models and tracking regret in online convex progra...

引用

30th international conference on Machine Learning, ICML 2013

作者： Hall, Eric C. Willett, Rebecca M. Duke University Department of Electrical and Computer Engineering Durham NC 27708 United States

ISBN: (纸本)9781629933061

this paper describes a new online convex optimization method which incorporates a family of candidate dynamical models and establishes novel tracking regret bounds that scale with the comparator's deviation from the best dynamical model in this family. Previous online optimization methods are designed to have a total accumulated loss comparable to that of the best comparator sequence, and existing tracking or shifting regret bounds scale with the overall variation of the comparator sequence. In many practical scenarios, however, the environment is non-stationary and comparator sequences with small variation are quite weak, resulting in large losses. the proposed Dynamic Mirror Descent method, in contrast, can yield low regret relative to highly variable comparator sequences by both tracking the best dynamical model and forming predictions based on that model. this concept is demonstrated empirically in the context of sequential compressive observations of a dynamic scene and tracking a dynamic social network. Copyright 2013 by the author(s).

关键词： Comparators (optical)

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Niels Bohr. the causality problem in atomic physics. New theories in physics, conference organized in collaboration with the international Union of Physics and the Polish Intellectual Co-operation Committee, Warsaw, May 30th-June 3rd 1938, international Institute of Intellectual Co-operation, Paris1939, pp. 11–38. Discussion, pp. 38–45, by C. Białobrzeski, L. Brillouin, Jean-Louis Destouches, J. von Neumann, and the author. - Werner Heisenberg. Language and reality in modern physics. Physics and philosophy, the revolution in modern science, by Werner Heisenberg, Harper &Brothers, New York1958, pp. 167–186. - Evert Willem Beth. Die Stellung der Logik im Gebäude der heutigen Wissenschaft. Studium generate, vol. 8 (1955), pp. 425–431.

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the Journal of Symbolic logic 2014年第1期23卷 66-66页

作者： Alfons Borgers

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Study on Architecture of Smart Home Management System and Key Devices

Study on Architecture of Smart Home Management System and Ke...

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international conference on Computer Science and Network Technology

作者： Chunlai Zhou Wenhui Huang Xiaoyun Zhao Commun. Univ. of China Beijing Beijing China

ISBN: (纸本)9781479905607

the architecture of smart home management system and key devices are studied according to the specifications on smart home gateway, socket and terminal issued by State power grid corp. in Nov. 30th, 2011, and smart home gateway, smart jack and smart terminal software are developed. Several communication technologies are used, including Zigbee, used to acquire data of wireless sensor network;TCP, used for video monitor;DALI, used to control lamps;Modbus, used to operate actuators, Wi-Fi, used between the terminal device and the gateway;as well as SOAP used for web services. the architecture and devices developed in this paper work well, and satisfy the needs of smart home management.

关键词： Web services Zigbee home automation home networks internetworking service-oriented architecture transport protocols wireless LAN wireless sensor networks DALI Modbus SOAP TCP WiFi communication technology control lamps key devices smart home gateway smart home management system smart jack smart terminal software state power grid corp video monitor wireless sensor network Computer architecture Lifting equipment logic gates Protocols Smart homes Wireless sensor networks Smart home WSN Wi-Fi architecture ZigBee Smart homes Wireless sensor networks Wi-Fi Web Service Soaps video monitoring Communication technology Building construction ARCHITECTURE granite pegmatite internetworking home automation Computer Architecture transport protocols

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A Stochastic Reconfigurable Architecture for Fault-Tolerant Computation with Sequential logic

A Stochastic Reconfigurable Architecture for Fault-Tolerant ...

引用

30th IEEE international conference on Computer Design (ICCD)

作者： Li, Peng Qian, Weikang Lilja, David J. Univ Minnesota Dept Elect & Comp Engn Minneapolis MN 55414 USA

ISBN: (纸本)9781467330527

Computation performed on stochastic bit streams is less efficient than that based on a binary radix because of its long latency. However, for certain complex arithmetic operations, computation on stochastic bit streams can consume less energy and tolerate more soft errors. In addition, the latency issue could be solved by using a faster clock frequency or in combination with a parallel processing approach. To take advantage of this computing technique, previous work proposed a combinational logic-based reconfigurable architecture to perform complex arithmetic operations on stochastic streams of bits. In this paper, we enhance and extend this reconfigurable architecture using sequential logic. Compared to the previous approach, the proposed reconfigurable architecture takes less hardware area and consumes less energy, while achieving the same performance in terms of processing time and fault-tolerance.

关键词： Reconfigurable architectures

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Fast Error Aware Model for Arithmetic and logic Circuits

Fast Error Aware Model for Arithmetic and Logic Circuits

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30th IEEE international conference on Computer Design (ICCD)

作者： Zaynoun, Samy Khairy, Muhammad S. Eltawil, Ahmed M. Kurdahi, Fadi J. Khajeh, Amin Univ Calif Irvine Dept Elect Engn & Comp Sci Irvine CA 92717 USA

ISBN: (纸本)9781467330527

As a result of supply voltage reduction and process variations effects, the error free margin for dynamic voltage scaling has been drastically reduced. this paper presents an error aware model for arithmetic and logic circuits that accurately and rapidly estimates the propagation delays of the output bits in a digital block operating under voltage scaling to identify circuit-level failures (timing violations) within the block. Consequently, these failure models are then used to examine how circuit-level failures affect system-level reliability. A case study consisting of a CORDIC DSP unit employing the proposed model provides tradeoffs between power, performance and reliability.

关键词： error aware model failure analysis timing violation voltage over sclaing

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Development and Application of a Heuristic to Assess Trends in API Documentation 12

Development and Application of a Heuristic to Assess Trends ...

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30th ACM international conference on Design of Communication (SIGDOC)

作者： Watson, Robert Univ Washington Seattle WA 98195 USA

ISBN: (纸本)9781450314978

Computer technology has made amazing advances in the past few decades;however, the software documentation of today still looks strikingly similar to the software documentation used 30 years ago. If this continues into the 21st century, more and more software developers could be using 20th-century-style documentation to solve 21st-century problems with 21st-century technologies. Is 20th-century-style documentation up to the challenge? How can that be measured? this paper seeks to answer those questions by developing a heuristic to identify whether the documentation set for an application programming interface (API) contains the key elements of API reference documentation that help software developers learn an API. the resulting heuristic was tested on a collection of software documentation that was chosen to provide a diverse set of examples with which to validate the heuristic. In the course of testing the heuristic, interesting patterns in the API documentation were observed. For example, twenty-five percent of the documentation sets studied did not have any overview information, which, according to studies, is one of the most basic elements an API documentation set needs to help software developers learn to use the API. the heuristic produced by this research can be used to evaluate large sets of API documentation, track trends in API documentation, and facilitate additional research.

关键词： Application programming interface API API reference documentation Software documentation Software libraries

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A Spectral Transform Approach to Stochastic Circuits

A Spectral Transform Approach to Stochastic Circuits

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30th IEEE international conference on Computer Design (ICCD)

作者： Alaghi, Armin Hayes, John P. Univ Michigan Dept Elect Engn & Comp Sci Adv Comp Architecture Lab Ann Arbor MI 48109 USA

ISBN: (纸本)9781467330527

Stochastic computing (SC) processes data in the form of long pseudo-random bit-streams denoting probabilities. Its key advantages are simple computational elements and high soft-error tolerance. Recent technology developments have revealed important new SC applications such as image processing and LDPC decoding. Despite its long history, SC still lacks a comprehensive design methodology;existing methods tend to be ad hoc and limited to a few arithmetic functions. We demonstrate a fundamental relation between stochastic circuits and spectral transforms. Based on this, we propose a transform approach to the analysis and synthesis of SC circuits. We illustrate the approach for a variety of basic combinational SC design problems, and show that the area cost associated with stochastic number generation can be significantly reduced.

关键词： Design methodology logic synthesis probabilistic methods stochastic computing

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Timing Aware Partitioning for Multi-FPGA Based logic Simulation Using Top-down Selective Hierarchy Flattening

Timing Aware Partitioning for Multi-FPGA Based Logic Simulat...

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30th IEEE international conference on Computer Design (ICCD)

作者： Swaminathan, Subramanian Poothamkurissi Lin, Pey-Chang Kent Khatri, Sunil P. Texas A&M Univ Dept ECE College Stn TX 77843 USA

ISBN: (纸本)9781467330527

In order to accelerate logic simulation, it is highly beneficial to simulate the circuit design on FPGA hardware. this is often referred to as emulation, and we use the terms simulation and emulation interchangeably in this paper. However, limited hardware on FPGAs prevents large designs from being implemented on a single FPGA. Hence there is a need to partition the design and simulate it on a multi-FPGA platform. In contrast to existing FPGA-based post-synthesis partitioning approaches which first completely flatten the circuit and then possibly perform bottom-up clustering, we perform a selective top-down flattening and thereby avoid the potential netlist blowup. this also allows us to preserve the design hierarchy to guide the partitioning and to make subsequent debugging easier. Our approach analyzes the hierarchical design and selectively flattens instances using two metrics based on slack. the resulting partially flattened netlist is converted to a hypergraph, partitioned using hMetis, and reconverted back to a plurality of FPGA netlists, one for each FPGA of the FPGA-based accelerated logic simulation platform. We compare our approach with a partitioning approach that operates on a completely flattened netlist. Static timing analysis was performed for both approaches, and over 15 large examples from the OpenCores project, our approach yields a 52% logic simulation speedup and about 0.74x runtime for the entire flow, compared to the completely flat approach. the entire tool chain of our approach is automated in an end-to-end flow from hierarchy extraction, selective flattening, partitioning, and netlist reconstruction. Compared to an existing method which also performs slack-based partitioning of a hierarchical netlist, we obtain a 35% simulation speedup. Our method scales very well, yielding a significantly better simulation speedup and runtime improvement for larger examples.

关键词： Field programmable gate arrays (FPGA)

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Solving Graded/Probabilistic Modal logic via Linear Inequalities (System Description)

Solving Graded/Probabilistic Modal Logic via Linear Inequali...

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18th international conference on logic for programming, Artificial Intelligence, and Reasoning (LPAR)

作者： Snell, William Pattinson, Dirk Widmann, Florian Univ London Imperial Coll Sci Technol & Med Dept Comp London SW7 2AZ England

ISBN: (纸本)9783642287176

We present the experience gained from implementing a new decision procedure for both graded and probabilistic modal logic. While our approach uses standard tableaux for propositional connectives, modal rules are given by linear constraints on the arguments of operators. the implementation uses binary decision diagrams for propositional connectives and a linear programming library for the modal rules. We compare our implementation, for graded modal logic, with other tools, showing average performance. Due to lack of other implementations, no comparison is provided for probabilistic modal logic, the main new feature of our implementation.

关键词： Binary decision diagrams

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Hypercube algebra: A diagrammatic and sentential notation to support inferences in logic 12

Hypercube algebra: A diagrammatic and sentential notation to...

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30th European conference on Cognitive Ergonomics, ECCE 2012

作者： Morineau, thierry Centre de Recherche En Psychologie Cognition et Communication Université de Bretagne-Sud France

ISBN: (纸本)9781450317863

Motivation - Our objective was to design a Boolean algebra allowing both a diagrammatic and sentential representation of logical propositions in an intuitive manner. the purpose of this notation is to support inferential activity without heavy deductive procedure to follow. Research approach - this research is founded on the notions of logical space proposed by Wittgenstein and of hypercube proposed by Pólya. Findings/Design - Complex propositions in propositional logic can be depicted by hypercube within a coordinate system, and by sequences of lexical symbols allowing operations on hypercube with more than three dimensions. Research limitations/Implications - Empirical studies are now required to validate the intuitiveness of this notation. Its scope of application must also be delimited. Originality/Value - Contrary to classical diagrammatic notations based on Euler topological diagrams in logic, the hypercube algebra involves a coordinate-based representation combining diagrams and lexical symbols. this is a new form of notation. Take away message - Rather than the format, the important variables in designing a representational system are those specifying the cognitive activity induced, e.g. straightforward inferences, abstraction level of symbols. Copyright 2012 ACM.

关键词： Boolean algebra

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