A Novel 40-ns high speed (HS) and 30 mA low power (LP) embedded flash memory modules (EFMM) such as 1 M flash memory cell array, three (4V, 5V, 9V) positive high voltage circuits and -7V negative high voltage circuit ...
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A Novel 40-ns high speed (HS) and 30 mA low power (LP) embedded flash memory modules (EFMM) such as 1 M flash memory cell array, three (4V, 5V, 9V) positive high voltage circuits and -7V negative high voltage circuit plus VHDL-modeled logic sub-systems implemented on 0.25 /spl mu/m CMOS SLP/5LM technology are presented. It is shown that our EFMM which is being used in multi-cube results in 30 mA active read current and 100 /spl mu/A standby current. Mixed mode design for analogs-high voltage charge pump shows stable 9V high for programming and further 1.2V bandgap reference voltage interfacing withthe high voltage circuits and for logic designs are developed by optimized IP-standard (set by Synopsys) VHDL modeling. Chip size with 56-pin indicates 5.7 mm/sup 2/.
SNP detection is a fundamental procedure in genome analysis. A popular SNP detection tool SOAPsnp can take more than one week to analyze one human genome with a 20-fold coverage. To improve the efficiency, we develope...
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ISBN:
(数字)9783319201191
ISBN:
(纸本)9783319201191;9783319201184
SNP detection is a fundamental procedure in genome analysis. A popular SNP detection tool SOAPsnp can take more than one week to analyze one human genome with a 20-fold coverage. To improve the efficiency, we developed mSNP, a parallel version of SOAPsnp. mSNP utilizes CPU cooperated with Intel (R) Xeon Phi (TM) for large-scale SNP detection. Firstly, we redesigned the key data structure of SOAPsnp, which significantly reduces the overhead of memory operations. Secondly, we devised a coordinated parallel framework, in which CPU collaborates with Xeon Phi for higher hardware utilization. thirdly, we proposed a read-based window division strategy to improve throughput and parallel scale on multiple nodes. To the best of our knowledge, mSNP is the first SNP detection tool empowered by Xeon Phi. We achieved a 45x speedup on a single node of Tianhe-2, without any loss in precision. Moreover, mSNP showed promising scalability on 4,096 nodes on Tianhe-2.
Neuromorphic Computing offers energy efficient AI inference for Edge Computing as well as morphologically adaptive and complex machine learning systems inspired by the nature. Hardware-software codesign approach prese...
Neuromorphic Computing offers energy efficient AI inference for Edge Computing as well as morphologically adaptive and complex machine learning systems inspired by the nature. Hardware-software codesign approach presents the optimum solution for performing neuromorphic computations. Hardware Software Codesign is an embedded systems approach that target sharing computational costs between the software and hardware with using system-on-chip (SoC) that contains general purpose microprocessors, FPGAs, ASIC cores, memory block periperals and interconnection buses in one *** this study, we determine the basic requirements of neuromorphic hardware systems and the problems in the hardware design. We use the hardware-software codesign approach to solve those problems. By comparing the HDL models of spiking neurons with a programmable spiking neuron designed with hardware-software codesign approach in terms of speed, timing and hardware cost, we demonstrate the superiority of the hardware-software co-design approach in neuromorphic computing over pure hardware or pure software solutions.
Runtime testing is important for improving the quality of software systems. this fact holds true especially for systems which cannot be completely assembled at development time, such as mobile or ad-hoc systems. the c...
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Runtime testing is important for improving the quality of software systems. this fact holds true especially for systems which cannot be completely assembled at development time, such as mobile or ad-hoc systems. the concepts of built-in-test (BIT) can be used to cope with runtime testing, but to our knowledge there does not exist an implemented infrastructure for BIT. the MORABIT project realizes such an infrastructure and extends the BIT concepts to allow for a smooth integration of the testing process and the original business functionality execution. In this paper the requirements on the infrastructure and our solution are presented
Nowadays, the world is moving towards the use of the "Future Internet" concepts. the emergence of the Internet of things (IoT) as a new Future Internet concept has led to a new wave of application potential ...
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ISBN:
(纸本)9781538681688;9781538681671
Nowadays, the world is moving towards the use of the "Future Internet" concepts. the emergence of the Internet of things (IoT) as a new Future Internet concept has led to a new wave of application potential which could play an important role in our daily life. the performance of existing applications may be improved greatly by applying IoT-enabling technologies efficiently. this paper presents a developed IoT-based access control system for vehicles passing through the entry and exit gates in Truck-Loading Fuels Terminals. the developed system follows a new design approach utilizing one of the most prominent IoT technologies, the Radio Frequency Identification (RFID), with its write capabilities. the novel design approach followed in developing the presented topic aims at offering enhanced system performance with regard to speed, security and allocated resources.
We propose techniques for exploratory search in large databases. the goal is to provide new functionality that aids users in homing in on the right query conditions to find what they are looking for. Query refinement ...
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ISBN:
(纸本)9781479925568
We propose techniques for exploratory search in large databases. the goal is to provide new functionality that aids users in homing in on the right query conditions to find what they are looking for. Query refinement proceeds interactively by repeatedly consulting the user to manage query conditions. this process is characterized by three key challenges: (1) dealing with incomplete and imprecise user input, (2) keeping user effort low, and (3) guaranteeing interactive system response time. We address the first two challenges with a probability-based framework that guides the user to the most important query conditions. To recover from input errors, we introduce the notion of sensitivity and propose efficient algorithms for identifying the most sensitive user input, i.e., those inputs that had the greatest influence on the query results. For the third challenge, we develop techniques that can deliver estimates of the required probabilities within a given hard realtime limit and are able to adapt automatically as the interactive query refinement proceeds.
Software testing and retesting occurs continuously during the software development lifecycle to detect errors as early as possible. the sizes of test suites grow as software evolves. Due to resource constraints, it is...
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Software testing and retesting occurs continuously during the software development lifecycle to detect errors as early as possible. the sizes of test suites grow as software evolves. Due to resource constraints, it is important to prioritize the execution of test cases so as to increase chances of early detection of faults. Prior techniques for test case prioritization are based on the total number of coverage requirements exercised by the test cases. In this paper, we present a new approach to prioritize test cases based on the coverage requirements present in the relevant slices of the outputs of test cases. We present experimental results comparing the effectiveness of our prioritization approach withthat of existing techniques that only account for total requirement coverage, in terms of ability to achieve high rate of fault detection. Our results present interesting insights into the effectiveness of using relevant slices for test case prioritization
Programmers often omit input validation when inputs can appear in many different formats or when validation criteria cannot be precisely specified. To enable validation in these situations, we present a new technique ...
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Programmers often omit input validation when inputs can appear in many different formats or when validation criteria cannot be precisely specified. To enable validation in these situations, we present a new technique that puts valid inputs into a consistent format and that identifies "questionable" inputs which might be valid or invalid, so that these values can be double-checked by a person or a program. Our technique relies on the concept of a "tope", which is an application-independent abstraction describing how to recognize and transform values in a category of data. We present our definition of topes and describe a development environment that supports the implementation and use of topes. Experiments with web application and spreadsheet data indicate that using our technique improves the accuracy and reusability of validation code and also improves the effectiveness of subsequent data cleaning such as duplicate identification.
In addition to learning good practices and reusing code from mining code examples, programmers can be supported in their learning and code improvement processes through negative, or poorly written, code examples. Whil...
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In addition to learning good practices and reusing code from mining code examples, programmers can be supported in their learning and code improvement processes through negative, or poorly written, code examples. While it is challenging to identify negative code examples automatically from within source code, we leverage a key insight that the natural language in questions that include code examples posted on forums can provide adequate clues. In this paper, we describe an automatic sentiment analysis-based technique for mining negative code examples from developer question and answer forums along with a technique to automatically mine negative sentiment indicators commonly used by developers, which are used to drive the sentiment-based technique.
this paper presents an adaptive scheme for gateway discovery in MANETs connected to the Internet. Basically, the proposed scheme reduces the flooding processes related to gateway discovery. To do so, the algorithm dyn...
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this paper presents an adaptive scheme for gateway discovery in MANETs connected to the Internet. Basically, the proposed scheme reduces the flooding processes related to gateway discovery. To do so, the algorithm dynamically adjusts the interval of emission of the gateway advertisement messages to the need for updated routes to the gateway. the tuning is supported by the analysis of the spatial distribution of nodes in the MANET and by the impact that the relative position of nodes has on the route lifetimes. the simulations show that the proposed adaptive mechanism outperforms the conventional schemes: it decreases network saturation while it achieves lower end-to-end delay and it minimizes the routing overhead.
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