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2nd Workshop on Virtual Machines and Intermediate languages for Emerging Modularization Mechanisms, VMIL 2008

作者： Sewe, Andreas Bockisch, Christoph Mezini, Mira Technische Universität Darmstadt Hochschulstr. 10 64289 Darmstadt Germany

ISBN: (纸本)9781605583846

Various aspect-oriented languages, e.g., AspectJ, Aspect- Werkz, and JAsCo, have been proposed as extensions to one particular object-oriented base language, namely Java. But these extensions do not fully take the interactions with the Java 2 security model into account. In particular, the implementation technique of advice weaving gives rise to two security issues: the erroneous assignment of aspects to protection domains and the violation of namespace separation. Therefore, a comprehensive discussion of the design choices available with respect to interactions with the dynamic class loading facilities of the Java VM is provided. ©2008.

关键词： Aspect oriented programming

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MAP: A functional analysis and design method

Proceedings of the ACM SIGPLAN International Conference on F...

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Proceedings of the acm sigplan International conference on Functional programming, ICFP 1998年 342-342页

作者： Russell, Dan Kingston Univ Surrey United Kingdom

MAP has been developed to address the need for an analysis and design method which directly supports software development using a functional language. MAP breaks down software development into a set of manageable and linked techniques which are combined to make a productive whole. In addition, it can be used as a natural communication medium which avoids the idiosyncracies of particular implementation languages, and through CASE tool support can act as an effective and efficient consistency checker.

关键词： Software engineering

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Spatial computation

Spatial computation

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11th International conference on Architectural Support for programming languages and Operating Systems

作者： Budiu, M Venkataramani, G Chelcea, T Goldstein, SC Carnegie Mellon Univ Pittsburgh PA 15213 USA

This paper describes a computer architecture, Spatial Computation (SC), which is based on the translation of high-level language programs directly into hardware structures. SC program implementations are completely distributed, with no centralized control. SC circuits are optimized for wires at the expense of computation units. In this paper we investigate a particular implementation of SC: ASH (Application-Specific Hardware). Under the assumption that computation is cheaper than communication, ASH replicates computation units to simplify interconnect, building a system which uses very simple, completely dedicated communication channels. As a consequence, communication on the datapath never requires arbitration;the only arbitration required is for accessing memory. ASH relies on very simple hardware primitives, using no associative structures, no multiported register files, no scheduling logic, no broadcast, and no clocks. As a consequence, ASH hardware is fast and extremely power efficient. In this work we demonstrate three features of ASH: (1) that such architectures can be built by automatic compilation of C programs;(2) that distributed computation is in some respects fundamentally different from monolithic superscalar processors;and (3) that ASIC implementations of ASH use three orders of magnitude less energy compared to high-end superscalar processors, while being on average only 33% slower in performance (3.5x worst-case).

关键词： measurement performance design spatial computation dataflow machine application-specific hardware low-power

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Harmless advice

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acm sigplan NOTICES 2006年第1期41卷 383-396页

作者： Dantas, DS Walker, D Princeton Univ Princeton NJ 08544 USA

This paper defines an object-oriented language with harmless aspect-oriented advice. A piece of harmless advice is a computation that, like ordinary aspect-oriented advice, executes when control reaches a designated control-flow point. However, unlike ordinary advice, harmless advice is designed to obey a weak non-interference property. Harmless advice may change the termination behavior of computations and use I/O, but it does not otherwise influence the final result of the mainline code. The benefit of harmless advice is that it facilitates local reasoning about program behavior. More specifically, programmers may ignore harmless advice when reasoning about the partial correctness properties of their programs. In addition, programmers may add new pieces of harmless advice to pre-existing programs in typical "after-the-fact" aspect-oriented style without fear they will break important data invariants used by the mainline code. In order to detect and enforce harmlessness, the paper defines a novel type and effect system related to information-flow type systems. The central technical result is that well-typed harmless advice does not interfere with the mainline computation. The paper also presents an implementation of the language and a case study using harmless advice to implement security policies.

关键词： design experimentation security languages theory aspect-oriented harmless advice aspects noninterference

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Trellis driver: Distributing a Java workflow across a network of workstations

Trellis driver: Distributing a Java workflow across a networ...

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33rd International conference on Parallel Processing

作者： Lamb, N Lu, P Fyshe, A Univ Alberta Dept Comp Sci Edmonton AB T6G 2E6 Canada

ISBN: (纸本)0769521983

Some applications in science and engineering consist of a main job that invokes, or drives, other jobs. For example, a server process may receive a request, then invoke a workflow of stand-alone scripts or executables to handle the request, and then generate the final response. Java's *** () function allows jobs to be invoked from within a master Java program. However, these jobs are usually restricted to the same machine. If the number of jobs in the workflow is large, then it can be desirable to load balance the workload across different servers to maximize throughput. We describe the design and implementation of the Trellis Driver, a newly-developed Java module that runs jobs using *** () and allows jobs to be scheduled across clusters and metacomputers (i.e., aggregations of servers). Using a Java-based bioinformatics application as a case study, we evaluate the performance improvement Trellis Driver offers through workflow parallelism.

关键词： Java programming language

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Engineering with logic: HOL specification and symbolic-evaluation testing for TCP implementations

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acm sigplan NOTICES 2006年第1期41卷 55-66页

作者： Bishop, S Fairbairn, M Norrish, M Sewell, P Smith, M Wansbrough, K Univ Cambridge Comp Lab Cambridge CB2 1TN England NICTA Canberra ACT Australia

The TCP/IP protocols and Sockets API underlie much of modem computation, but their semantics have historically been very complex and ill-defined. The real standard is the de facto one of the common implementations, including, for example, the 15 00020000 lines of C in the BSD implementation. Dealing rigorously with the behaviour of such bodies of code is challenging. We have recently developed a post-hoe specification of TCP, UDP, and Sockets that is rigorous, detailed, readable, has broad coverage, and is remarkably accurate. In this paper we describe the novel techniques that were required. Working within a general-purpose proof assistant (HOL), we developed language idioms (within higher-order logic) in which to write the specification: operational semantics with nondeterminism, time, system calls, monadic relational programming, etc. We followed an experimental semantics approach, validating the specification against several thousand traces captured from three implementations (FreeBSD, Linux, and WinXP). Many differences between these were identified, and a number of bugs. Validation was done using a special-purpose symbolic model checker programmed above HOL. We suggest that similar logic engineering techniques could be applied to future critical software infrastructure at design time, leading to cleaner designs and (via specification-based testing using a similar checker) more predictable implementations.

关键词： documentation design standardization theory verification network protocols TCP/IP sockets API specification conformance testing higher-order logic HOL operational semantics

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A Hitchhiker’s guide to reinventing a prolog machine 33

A Hitchhiker’s guide to reinventing a prolog machine

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Technical Communications of the 33rd International conference on Logic programming, ICLP 2017

作者： Tarau, Paul Department of Computer Science and Engineering University of North Texas Denton United States

ISBN: (纸本)9783959770583

We take a fresh, "clean-room" look at implementing Prolog by deriving its translation to an executable representation and its execution algorithm from a simple Horn Clause meta-interpreter. The resulting design has some interesting properties. The heap representation of terms and the abstract machine instruction encodings are the same. No dedicated code area is used as the code is placed directly on the heap. Unification and indexing operations are orthogonal. Filtering of matching clauses happens without building new structures on the heap. Variables in function and predicate symbol positions are handled with no performance penalty. A simple English-like syntax is used as an intermediate representation for clauses and goals and the same simple syntax can be used by programmers directly as an alternative to classic Prolog syntax. Solutions of (multiple) logic engines are exposed as answer streams that can be combined through typical functional programming patterns, with flexibility to stop, resume, encapsulate and interleave executions. Performance of a basic interpreter implementing our design is within a factor of 2 of a highly optimized compiled WAM-based system using the same host language. To help placing our design on the fairly rich map of Prolog systems, we discuss similarities to existing Prolog abstract machines, with emphasis on separating necessary commonalities from arbitrary implementation choices. © Paul Tarau

关键词： Functional programming

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design of a Deep Q-Network Based Simulation System for Actuation Decision in Ambient Intelligence 33rd

Design of a Deep Q-Network Based Simulation System for Actua...

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33rd International conference on Advanced Information Networking and Applications, AINA 2019

作者： Oda, Tetsuya Ueda, Chiaki Ozaki, Ryo Katayama, Kengo 1-1 Ridaicho Kita-ku Okayama 700–0005 Japan

ISBN: (纸本)9783030150341

Ambient Intelligence (AmI) deals with a new world of ubiquitous computing devices, where physical environments interact intelligently and unobtrusively with people. AmI environments can be diverse, such as homes, offices, meeting rooms, schools, hospitals, control centers, vehicles, tourist attractions, stores, sports facilities, and music devices. This paper presents design and implementation of a simulation system based on Deep Q-Network (DQN) for actuation decision in AmI. DQN is a deep neural network structure used for estimation of Q-value of the Q-learning method. We implemented the proposed simulating system by Rust programming language. We describe the design and implementation of the simulation system, and show some simulation results to evaluate its performance. © 2019, Springer Nature Switzerland AG.

关键词： Ambient intelligence

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A general-purpose custom-designed assembler in C

A general-purpose custom-designed assembler in C

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Frontiers in Education (FIE) conference

作者： B. Hatfield Mei Zhang Lan Jin Department of computer Science Salem State College Salem MA USA Cadence Design Systems Inc. CA USA Department of Computer Science California State University CA USA

In this paper, we introduced the design and implementation of a general-purpose assembler that can be written and modified to be adaptive for any given assembly language to generate the target machine code and carry out the execution. The system consists of a parsing module and an execution module. The former generates the target machine code from an inputted assembly language code, and the latter simulates the hardware operation of a computer and executes the instructions. Due to its versatility and flexibility, this assembler allows easy modification to reconfigure itself for implementing any given instruction set architecture. As the major objective of this project, the assembler can help students to learn assembly-language programming and develop an in-depth understanding of its close relationship with the instruction set architecture.

关键词： Assembly programming profession Writing Computer architecture Education Computational modeling Computer aided instruction Data structures Computer simulation Hardware

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FPGA-based neural network for simulation of photovoltaic array: application for estimating the output power generation

FPGA-based neural network for simulation of photovoltaic arr...

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2008 33rd IEEE Photovoltaic Specialists conference

作者： A. Mellit H. Mekki S. Shaari Department of LMDlElectronics LAMEL Laboratory Jijel University Jijel Algeria Department of Electronics Blida University Algeria Universiti Teknologi MARA Shah Alam Selangor Darul Ehsan Malaysia

This paper introduces the preliminary results of the simulation and implementation of PV array based on neural network and Hardware Description language (VHDL). In fact, an experimental database of meteorological data (irradiation, temperature) and output electrical generation signals of the PV array (current and voltage) has been used in this study. The inputs of the ANN-PV array are the total solar irradiation and the temperature while the outputs are the current and voltage generated from the PV-array. Firstly, a dataset of 4x365 have been used for training the network. Subsequently, the neural network (MLP) corresponding to PV array is simulated using VHDL language based on the saved weights and bias of the network. Simulation results of the trained MLP-PV array based on Matlab and VHDL are presented. The proposed ANN-VHDL model permits the evaluation of the performance of the PV array using only the environmental factors and involves less computational efforts. It can also be used for predicting the output electrical energy from the PV array and for estimating the I–V characteristic of PV-array. The implementation of the PV-array based on reconfigurable Field programming Gate Array (FPGA) is suggested in this paper for a real time PV simulator.

关键词： Power generation Neural networks Photovoltaic systems Solar power generation Computational modeling Temperature Voltage Field programmable gate arrays Hardware design languages Databases

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