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3rd ieee International NanoElectronics Conference (INEC)/symposium on Nanoscience and Nanotechnology in China

作者： Sui, Bingcai Chi, Yaqing Fang, Liang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Hunan 410073 China National University of Defense Technology China

ISBN: (纸本)9781424435432

Single-electronic transistors (SETs) are considered as the attractive candidates for post-COMS VLSI due to their ultra-small size and low power consumption. Because SETs with single island can not work at room temperature normally, more and more researchers begin to make research on the SETs with 1-dimension multi-islands. A new simulation method-nSET, is introduced in this paper Compared with other methods, nSET can simulate the SET device with 1-Dimension multiple islands with high speed and accuracy. Through the comparison, it can be get that nSET is accurate and fast compared with the classical Monte Carlo(MC) simulator, and is very useful for the ASIC design of SET devices.

关键词： Monte Carlo simulation single-electron tunneling device single-electron transistor multiple islands

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A case study of SWIM: Optimization of memory intensive application on GPGPU

A case study of SWIM: Optimization of memory intensive appli...

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International symposium on parallel Architectures, Algorithms, and Programming

作者： Yi, Wei Tang, Yuhua Wang, Guibin Fang, Xudong National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9780769543123

Recently, GPGPU has been adopted well in the High Performance Computing (HPC) field. The limited global memory bandwidth poses a great challenge to many GPGPU programmers trying to exploit parallelism within the CPUGPU heterogeneous platform. In this paper, we choose SWIM, a typical memory intensive application from the SPEC OMP 2001 benchmark suite, for case study. We attempt to optimize the performance and energy consumption of the application utilizing different memory access mechanisms and present optimization methods including matrix transposition and kernel fusion. The experimental results on the Intel CoreTM i920 CPU plus GeForce GTX 295 platform shows that, the proposed optimizing methods achieve a speedup of 8.7X over the original OpenMP program and reduce the energy consumption by 83% for the problem size of 2048*2048. © 2010 ieee.

关键词： Energy utilization

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distributed motor control system with transmission time delay

Distributed motor control system with transmission time dela...

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3rd ieee International symposium on Control, Communications and Signal processing (ISCCSP 2008)

作者： Nagano, Tomoaki Gouko, Manabu Ito, Koji Tokyo Inst Technol Dept Computat Intelligence & Syst Sci Interdisciplinary Grad Sch Sci & Engn Midori Ku Yokohama Kanagawa 2268502 Japan

ISBN: (纸本)9781424416875

The multi-link system such as the musculoskeletal mechanism has a recursive dynamics representation. In order to control the body by the parallel calculation of the recursive algorithms of the inverse dynamics, the time delays of information transmission between the distributed calculation elements are required. These time delays are important to model and analyze the biological motor control as a distributed system, because the neural signal speeds are limited and the time delays are not negligible in the quick movement. And some time delays in the control loop make the moment unstable generally, but the biological motor control are stable and can handle the delays. In this paper, we focus on the function of the renshaw cell in the spinal cord of the biological motor control system. The renshaw cell forms the negative feedback loop of the motor neuron output, then we model the renshaw cell as the low-pass filter of torque output. And we propose a hierarchical distributed motor control system including the time delays for 3-dimensional movements, and the reaching simulation results that the time delay makes the movement unstable and the low-pass filter of torque output could contribute toward stabilizing the time delay loop in the distributed control system.

关键词： Time delay

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Implementing replica placements: Feasibility and cost minimization

Implementing replica placements: Feasibility and cost minimi...

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21st International parallel and distributed processing symposium, Ipdps 2007

作者： Loukopoulos, Thanasis Tziritas, Nikos Lampsas, Petros Lalis, Spyros Department of Computer and Communications Engineering University of Thessaly Glavani 37 38221 Volos Greece Department of Informatics and Computer Technology Technological Educational Institute of Lamia 3rd km Old Ntl. Rd. 35100 Lamia Greece

ISBN: (纸本)1424409101

Given two replication schemes Xold and Xnew, the Replica Transfer Scheduling Problem (RTSP) aims at reaching Xnew, starting from Xold, with minimal implementation cost. In this paper we generalize the problem description to include special cases, where deadlocks can occur while in the process of implementing Xnew. We address this impediment by introducing artificial (dummy) transfers. We then prove that RTSP-decision is NP-complete and propose two kinds of heuristics. The first attempts to replace dummy transfers with valid ones, while the second minimizes the implementation cost. Experimental evaluation of the algorithms illustrates the merits of our approach. ©2007 ieee.

关键词： Scheduling

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Exploiting programmable network interfaces for parallel query execution in workstation clusters 20

Exploiting programmable network interfaces for parallel quer...

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20th ieee International parallel and distributed processing symposium, Ipdps 2006

作者： Kumar, V. Santhosh Thazhuthaveetil, M.J. Govindarajan, R. Supercomputer Edn. and Res. Centre Indian Institute of Science Bangalore 560 012 India Supercomputer Edn. and Res. Centre Dept. of Computer Science and Automation Indian Institute of Science Bangalore 560 012 India

ISBN: (纸本)1424400546

Workstation clusters equipped with high performance interconnect having programmable network processors facilitate interesting opportunities to enhance the performance of parallel, application run on them. In this paper, we propose schemes where certain application level processing in parallel database query execution is performed on the network processor. We evaluate the performance of TPC-H queries executing on a high end cluster where all tuple processing is done on the host processor, using a timed Petri net model, and find that tuple processing costs on the host processor dominate the execution time. These results are validated using a small cluster. We therefore propose 4 schemes where certain tuple processing activity is offloaded to the network processor. The first 2 schemes offload the tuple splitting activity - computation to identify the node on which to process the tuples, resulting in an execution time speedup of 1.09 relative to the base scheme, but with I/O bus becoming the bottleneck resource. In the 3rd scheme in addition to offloading tuple processing activity, the disk and network interface are combined to avoid the I/O bus bottleneck, which results in speedups upto 1.16, but with high host processor utilization. Our 4th scheme where the network processor also performs a part of join operation along with the host processor, gives a speedup of 1.47 along with balanced system resource utilizations. Further we observe that the proposed schemes perform equally well even in a scaled architecture i.e., when the number of processors is increased from 2 to 64. © 2006 ieee.

关键词： Interfaces (computer)

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Exploiting programmable network interfaces for parallel query execution in workstation clusters 06

Exploiting programmable network interfaces for parallel quer...

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International symposium on parallel and distributed processing (Ipdps)

作者： V.S. Kumar M.J. Thazhuthaveetil R. Govindarajan Supercomputer Edn. and Research Centre Indian Institute of Science Bangalore India Department of Computer Science and Automation Supercomputer Edn. and Research Centre Indian Institute of Science Bangalore India

ISBN: (纸本)9781424400546

Workstation clusters equipped with high performance interconnect having programmable network processors facilitate interesting opportunities to enhance the performance of parallel application run on them. In this paper, we propose schemes where certain application level processing in parallel database query execution is performed on the network processor. We evaluate the performance of TPC-H queries executing on a high end cluster where all tuple processing is done on the host processor, using a timed Petri net model, and find that tuple processing costs on the host processor dominate the execution time. These results are validated using a small cluster. We therefore propose 4 schemes where certain tuple processing activity is offloaded to the network processor. The first 2 schemes offload the tuple splitting activity - computation to identify the node on which to process the tuples, resulting in an execution time speedup of 1.09 relative to the base scheme, but with I/O bus becoming the bottleneck resource. In the 3rd scheme in addition to offloading tuple processing activity, the disk and network interface are combined to avoid the I/O bus bottleneck, which results in speedups up to 1.16, but with high host processor utilization. Our 4th scheme where the network processor also performs apart of join operation along with the host processor, gives a speedup of 1.47 along with balanced system resource utilizations. Further we observe that the proposed schemes perform equally well even in a scaled architecture i.e., when the number of processors is increased from 2 to 64

关键词： Network interfaces Intelligent networks Workstations Application software Databases Concurrent computing Costs High performance computing Supercomputers Bandwidth

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TP transformation based dynamic system modeling for nonlinear control

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ieee TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT 2005年第6期54卷 2191-2203页

作者： Baranyi, P Várkonyi-Kóczy, AR Hungarian Acad Sci Comp & Automat Res Inst H-1111 Budapest Hungary Integrated Intelligent Syst Japanese Hunagarian Lab H-1111 Budapest Hungary

The aim of this paper is to propose a numerical controller design methodology. This methodology is based on two steps. In the first step, the tensor product (TP) model transformation is applied, which is capable of transforming a given nonlinear state-space dynamic model into TP model form. Then, in the second step, the linear matrix inequality (LMI) theorems are used within the parallel distributed compensation (PDC) controller design frameworks. The main novelty of this paper is the TP model transformation of the first step. It is also capable of dealing with the tradeoff between complexity and accuracy of the resulting TP model. The TP model transformation is a numerical method that leads to the following advantages: it is capable of functioning with models given either by analytic explicit forms or by various soft-computing based identification techniques;it does not need problem dependent analytic derivations, but can be executed "automatically" by computers. Numerical simulations are used to provide empirical validation of the proposed control design methodology. In order to demonstrate the effectiveness of the TP model transformation a controller is derived for the prototypical aeroelastic wing section that exhibits limit cycle oscillation and chaotic behavior.

关键词： linear matrix inequality nonlinear control design parallel distributed compensation tensor product (TP) model

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Communication benchmarking and performance modelling of MPI programs on cluster computers

Communication benchmarking and performance modelling of MPI ...

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3rd International Workshop on Performance Modelling, Evaluation, and Optimization of parallel and distributed Systems held in Conjunction with the 18th International parallel and distributed processing symposium

作者： Grove, DA Coddington, PD Univ Adelaide Sch Comp Sci Adelaide SA 5005 Australia

ISBN: (纸本)0769521320

This paper gives an overview of two related tools that we have developed to provide more accurate measurement and modelling of the performance of message-passing communication and application programs on distributed memory parallel computers. MPIBench uses a very precise, globally synchronised clock to measure the performance of MPI communication routines. It can generate probability distributions of communication times, not just the average values produced by other MPI benchmarks. This allows useful insights to be made into the MPI communication performance of parallel computers, and in particular how performance is affected by network contention. The Performance Evaluating Virtual parallel Machine (PEVPM) provides a simple, fast and accurate technique for modelling and predicting the performance of message-passing parallel programs. It uses a virtual parallel machine to simulate the execution of the parallel program. The effects of network contention can be accurately modelled by sampling from the probability distributions generated by MPIBench. These tools are particularly useful on clusters with commodity Ethernet networks, where relatively high latencies, network congestion and TCP problems can significantly affect communication performance, which is difficult to model accurately using other tools. Experiments with example parallel programs demonstrate that PEVPM gives accurate performance predictions on commodity clusters. We also show that modelling communication performance using average times rather than sampling from probability distributions can give misleading results, particularly for programs running on a large number of processors.

关键词： parallel computing cluster computing performance modelling

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DGMonitor: A performance monitoring tool for sandbox-based desktop grid platforms

DGMonitor: A performance monitoring tool for sandbox-based d...

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作者： Cicotti, P Taufer, M Chien, AA Univ Calif San Diego Dept Comp Sci & Engn La Jolla CA 92093 USA Scripps Res Inst Dept Mol Biol La Jolla CA 92037 USA Univ Texas Dept Comp Sci El Paso TX 79968 USA

ISBN: (纸本)0769521320

Accurate, continuous resource monitoring and profiling are critical for enabling performance tuning and scheduling optimization. In desktop grid systems that employ sandboxing, these issues are challenging because (1) subjobs inside sandboxes are executed in a virtual computing environment and (2) the state of this virtual environment within the sandboxes is reset to an initial empty state after a subjob completion. DGMonitor is a monitoring tool which builds a global, accurate, and continuous view of real resource utilization for desktop grids with sandboxing. Our monitoring tool measures performance unobtrusively and reliably, uses a simple performance data model, and is easy to use. Our measurements demonstrate that DGMonitor can scale to large desktop grids (up to 12000 PCs) with low monitoring overhead in terms of resource consumption (less than 0.1% per machine). Though we originally developed DGMonitor with the Entropia DCGrid platform, our tool is easily portable and integrated into other desktop grid systems. In all of these systems, DGMonitor data can support existing and novel information services, particularly for performance tuning and scheduling. In this paper, the high scalability and monitoring power of DGMonitor are demonstrated with the Entropia DCGrid platform and the BOINC platform respectively.

关键词： performance monitoring and profiling sandboxing techniques distributed computing

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Increasing the performance of CDNs using replication and caching: A hybrid approach

Increasing the performance of CDNs using replication and cac...

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19th ieee International parallel and distributed processing symposium, Ipdps 2005

作者： Bakiras, Spiridon Loukopoulos, Thanasis Department of Computer Science Hong Kong University of Science and Technology Clear Water Bay Hong Kong Hong Kong Department of Informatics Technical Educational Institute of Lamia 3rd km. Old National Road Lamia Greece

ISBN: (纸本)0769523129

Caching and replication have emerged as the two primary techniques for reducing the delay experienced by end users when downloading web pages. Even though these techniques may benefit from each other, previous research work tends to focus on either one of them separately. In this paper we investigate the potential performance gains by using a CDN server both as a replicator and as a proxy server. We assume a common storage space for both techniques, and develop an analytical model that characterizes caching performance under various system parameters. Based on the models predictions, we can reason whether it is beneficial to reduce the caching space in order to allocate extra replicas. The resulting problem of finding which object replicas should be created where, given that any free space will be used for caching, is NP-complete. Therefore, we propose a hybrid heuristic algorithm (based on the greedy paradigm), in order to solve the combined replica placement and storage allocation problem. Our simulation results indicate that a simple LRU caching scheme can considerably improve the response time of HTTP requests, when utilized over a replication-based infrastructure.

关键词： Websites

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