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检索条件"任意字段=3rd Southern Conference on Programmable Logic"

共 479 条记录，以下是21-30 订阅

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Digital Twin Architecture for Production Logistics: The Critical Role of programmable logic Controllers (PLCs) 3

Digital Twin Architecture for Production Logistics: The Crit...

引用

3rd International conference on Industry 4.0 and Smart Manufacturing (ISM)

作者： Thurer, Matthias Li, Shan Shan Qu, Ting Jinan Univ Sch Intelligent Syst Sci & Engn Jinan 519000 Guangdong Peoples R China

Digital Twin is a key enabling technology of Industry 4.0, Smart Manufacturing and Made in China 2025, and a broad literature emerged. But existing literature tends to focus on large-scale equipment or large products, often in a fixed position layout. This study argues that this is due to the use of centralized data and system models. It proposes new architectures for digital twins based on local product and resource twins that use digital encapsulated information to create higher level system twins. Using Action Design Research, a first tentative to develop a prototype of this new architecture is presented. A main learning outcome is that the programmable logic Controller (PLC) is an essential part of a digital twin implementation, which receives insufficient research attention. The capability of the PLC largely determines the architecture of a digital twin. (C) 2022 The Authors. Published by Elsevier B.V.

关键词： Digital Twin programmable logic Controller (PLC) Digital Encapsulated Information Action Design Research Smart Manufacturing

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Unipolar and Bipolar Mathematical Inference of Weight Adjustment Mode of Single Layer Perceptron on and logic Gate 3

Unipolar and Bipolar Mathematical Inference of Weight Adjust...

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3rd International conference on Advances in Electrical, Computing, Communication and Sustainable Technologies, ICAECT 2023

作者： Devi, M. Shyamala Goni, S. Tasneem, P. Vintha, Karthikeyani Kumar, Dubba Sai Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology Computer Science & Engineering Tamilnadu Chennai India

ISBN: (纸本)9781665494007

In order to ensure that electrical terminals only 'switch on' after the proper logic process has been applied, logic gates are employed to make judgments. Each logic gate has a name that explains how various inputs will affect the potential outcomes. To perform logical functions on one or more binary sequence of inputs and produce a single digital output, logic gates are utilized. Embedded systems, microcontrollers, electrical and electronics circuit boards, and programmable logic applications generally make use of logic gates. When the sensor receives no information, it generates low Output impedance for logic 0. It has been determined that using logic gates to create an edge avoider robotics that lowers project budget and speeds up the robot. With the growth of technology, the neural network could also be used for implementing the logic gate using Single Layer Perceptron neural network often termed as Linear Threshold Gate. This paper attempt to analyze the mathematical inference on the number of execution steps for the weight adjustment in the activation function of AND logic gate. This inference carried out by varying the input of Single layer Perceptron Neural Network in the form of unipolar and bipolar input. The activation function weight adjustment had carried out using batch and sequential mode of execution. Mathematical implementation of AND logic gate exhibits that Bipolar sequential and Bipolar batch mode weight adjustment had less number of execution steps reaching 100% accuracy by matching the desired and predicted output when compared to the unipolar. The detailed execution steps are produced herewith for the validation of outcome. © 2023 IEEE.

关键词： Network layers

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Enhancing Industrial Automation: A Comprehensive Study on programmable logic Controllers (PLCs) and their Impact on Manufacturing Efficiency 3

Enhancing Industrial Automation: A Comprehensive Study on Pr...

引用

3rd International conference on Technological Advancements in Computational Sciences, ICTACS 2023

作者： Saxena, Aditi Jabbar, Kadim A. Fezaa, Laith H.A. Gla UniversityMathura Department of Electronics and Communication Engineering India National University of Science and Technology Dhi Qar Iraq Al-Zahrawi University College Department of Optical Techniques Karbala Iraq

ISBN: (纸本)9798350342338

The main goal of this study is to investigate programmable logic Controllers (PLCs) and their effects on industrial automation production productivity in depth. Due to their capacity to automate complicated tasks, monitor manufacturing procedures, and improve operational performance, programmable logic controllers are now an essential part of contemporary manufacturing processes. This abstract highlight the significance of PLCs in developing industrial automation and their function in raising manufacturing productivity. The research examines a variety of PLC technology-related topics, including programming, communication protocols, and interaction with other automation systems. The results of this study will help us better comprehend the function of PLCs in simplifying and increasing efficiency in industrial operations. PLCs gather data from sensors and input devices, which provides them with critical information about how effectively the production system is doing. This data may be evaluated in order to identify potential improvement areas, optimize production parameters, and reduce equipment downtime. By integrating PLCs with other systems like HMIs and SCADA, manufacturers may bolster operational performance, centralize command, and make communication easier. © 2023 IEEE.

关键词： automation system Impact optimize operational efficiency PLC productivity

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A Study on Multi-Objective Cloud-Edge Collaborative Task Scheduling Method for Edge Networks 3

A Study on Multi-Objective Cloud-Edge Collaborative Task Sch...

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3rd International conference on Cloud Computing, Big Data Application and Software Engineering, CBASE 2024

作者： Yu, Yun Lin, Kequan Huang, Xiang Wu, Wenpeng Zeng, Xichi China Southern Power Grid Company Limited Guangdong Guangzhou510623 China China Southern Power Grid Company Limited Southern Power Grid Digital Grid Research Institute Co.Ltd Guangdong Provincial Key Laboratory of Digital Grid Technology Guangdong Guangzhou510623 China

ISBN: (纸本)9798331506582

As the expansion of new services continues to grow, there may be a shortage of equipment computing, storage and communication resources. At the same time, tasks have the possibility of computation and transmission failure when device resources are limited. Therefore, this paper proposes a research on a multi-objective cloud-edge cooperative task scheduling method for edge networks. The method fully considers the multi-objective optimisation requirements such as task execution efficiency, delay, resource utilisation and energy consumption, and designs an adaptive scheduling strategy by constructing a dynamic model of tasks and resources. The strategy combines genetic algorithms and deep reinforcement learning techniques to achieve reasonable distribution and collaborative processing of tasks between cloud centres and edge nodes. On the basis of the service configuration mechanism, a processing model for microservices is established. By analysing the constraints in task scheduling, priority constraints, capacity constraints and execution time constraints are pointed out. And the scheduling scheme is selected for the task by a multi-criteria decision-making method based on fuzzy logic. The experimental results show that the proposed method has significant advantages in improving the task execution efficiency, reducing the delay and optimising the resource utilisation, which effectively meets the demand of multi-objective optimisation in edge networks, and provides new ideas and references for task scheduling in edge computing environments. © 2024 IEEE.

关键词： Energy utilization

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Comparison and realization of digital circuit and PLC designed four-way responder 3

Comparison and realization of digital circuit and PLC design...

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3rd International conference on Electronics, Electrical and Information Engineering, ICEEIE 2023

作者： Zhao, Jing Wang, Fangqing School of Physics & Electronic Technology Liaoning Normal University Dalian116029 China School of Foreign Languages Shanxi Datong University Datong037009 China

ISBN: (纸本)9781510671423

According to the requirement of four-way responder, two different methods of digital circuit and PLC are designed and compared in this paper. The first method is to use the integrated chip "4511" and "555" and the corresponding peripheral circuit to achieve, according to the four-way scrambler design block diagram, successfully designed the schematic diagram and the corresponding PCB diagram, and actually made the finished product;The other method is to use programmable logic controller PLC to realize, designed the ladder diagram and the corresponding statement table of the four-way responder PLC control, and actually made the finished product. Both of these methods have been successfully implemented, have good application value in practice, and can be based on this idea, expand into more and better multiroute responder. © 2023 SPIE.

关键词： programmable logic controllers

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Implementation of Gigabit Custom Protocol Stack and its Application in Laser Marking 3

Implementation of Gigabit Custom Protocol Stack and its Appl...

引用

3rd International conference on Electrical Engineering and Mechatronics Technology, ICEEMT 2023

作者： Xu, Conghao Wang, Yan Zhang, Yang Zhou, Zeng University of South China College of Electrical Engineering Hunan Hengyang China

ISBN: (纸本)9798350303698

To solve the transmission problem of laser marking instruction and coordinate data in the laser marking system, a field editable logic device FPGA is proposed to realize the Ethernet custom protocol stack. In this paper, a laser marking data transmission system based on FPGA is designed. The protocol stack is defined by reconstructing Ethernet protocol frames, and the dual-channel analysis and storage of laser marking instructions and coordinate data are completed. At the same time, the system control module receives the multi-channel synchronization signal of the laser galvanometer and the moving platform, realizes the synchronization of the nanosecond signal, and completes the digital adjustable control of the CO2 coherent laser. The experiment proves that the system has high transmission stability, the fastest transmission rate of the custom protocol is 986 Mbps, which can reach the industrial level, the system function is stable, and the test performance is superior. © 2023 IEEE.

关键词： Field programmable gate arrays (FPGA)

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A Fully Actuated System Approach to Interval Observer Design with Applications in Fault Detection 3

A Fully Actuated System Approach to Interval Observer Design...

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3rd conference on Fully Actuated System Theory and Applications (FASTA)

作者： Duan, Weijie Guang-Ren Duan, Guang-Ren Kong, He Southern Univ Sci & Technol Shenzhen Key Lab Control Theory & Intelligent Sys Shenzhen 518055 Peoples R China Harbin Inst Technol Ctr Control Theory & Guidance Technol Harbin 150001 Peoples R China

ISBN: (纸本)9798350373707;9798350373691

This paper explores a fully actuated system approach for interval observer design with applications in fault detection. Leveraging the full-actuation property, a stabilization control law is initially implemented to cancel open-loop nonlinearities, resulting in a constant high-order linear system. Subsequently, two interval observer design approaches are introduced. Employing the parametric design method, the challenge of determining the observer gain and nonsingular transformation matrix is converted into solving the generalized Sylvester matrix equation. This method allows for the free assignment of the eigenstructure of the observer error system. Additionally, a fault detection logic is presented. Finally, the feasibility and effectiveness of the proposed interval observers are demonstrated through an illustrative example.

关键词： Fully actuated system approach Interval observer Fault detection Parametric design

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Design and Implementation of Single Precision Floating-point Arithmetic logic Unit for RISC Processor on FPGA 3

Design and Implementation of Single Precision Floating-point...

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3rd IEEE International Maghreb Meeting of the conference on Sciences and Techniques of Automatic Control and Computer Engineering, MI-STA 2023

作者： Adela, Noor Alhuda Saad Yousuf, Amani Najeeb Ben Eljhani, Mohamed Muftah University of Tripoli Department of Computer Engineering Tripoli Libya

ISBN: (纸本)9798350319897

The main purpose of conducting this research is to design and implement a single precision floating-point arithmetic logic unit (ALU) that considered as a part of the math coprocessor. The main advantage of floating-point representation is that it can support more values than fixed-point and integer representations. Summation, Subtraction, multiplication and division are arithmetic functions in these calculations. In this floating-point unit, input must be provided in IEEE-754 format, which is 32 single precision floating point values. The application of This arithmetic unit is located in the math coprocessor. Commonly referred to as reduced instruction set computation (RISC) processor. In this processor, for a signal processing, a value with high accuracy is required and as it is an iterative process, the calculation should be as fast as possible. A fixed-point and integer central processing unit (CPU) can't meet the requirements. The floating-point representation can calculate very large or very small process quickly and accurately. The system designed, verified and implemented with Verilog hardware description language using Intel Altera software tools. © 2023 IEEE.

关键词： Field programmable gate arrays (FPGA)

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Design and Implementation of an Optimized High-Speed Vedic-Based Squarer Circuit Using Reversible logic Gates 3rd

Design and Implementation of an Optimized High-Speed Vedic-B...

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3rd International conference on Micro and Nanoelectronics Devices, Circuits and Systems, MNDCS 2023

作者： Halder, Saurabh Saha, Mihir Lal Malvika Talukdar, Jagritee Mummaneni, Kavicharan Department of Electronics and Communication Engineering National Institute of Technology Silchar Assam Silchar India

ISBN: (纸本)9789819944941

The primary purpose of this research is to investigate and evaluate the effectiveness of a 4â€‰×â€‰4 squarer circuit based on Vedic mathematics and reversible logic gates. A high-speed squarer circuit has been developed using Fredkin, Peres, BME, and HNG gates. The simulations are performed using the iSim simulator in Xilinx ISE 14.7. In addition, using several FPGA models, the delay, a fundamental aspect of a digital circuit, is also explored. The individual blocks of the existing circuits are implemented using different types of available reversible logic gates. Lastly, a comparison of the proposed circuit's different attributes with those of the existing designs such as gate count, the proportion of ancilla inputs, and garbage outputs and quantum cost are calculated and presented in a tabular form. Along with this, a brief comparison of FPGA hardware utilized and power consumed is also given. Finally, it is noted that as the quantum cost is greatly decreased by around 75%, also the delay is improved compared to the existing designs by 2.7%, and hence the proposed circuit becomes a viable candidate for high-speed applications. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024.

关键词： Field programmable gate arrays (FPGA)

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Fuzzy logic Based Power Train Controller for Different Hybrid Electric Vehicle Configurations 3

Fuzzy Logic Based Power Train Controller for Different Hybri...

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3rd IEEE International conference on Intelligent Technologies, CONIT 2023

作者： Garg, Rinku Sharma, Ashish Yadav, Kanchan Kaur, Manpreet Rana, Arti University Institute of Computing Chandigarh University Punjab Mohali India Chandigarh University Department of Electrical Engineering Mohali India GLA University Department of Electrical Engineering Mathura India Gulzar Group of Institutions Department of CSE Khanna India Uttranchal University Department of CSE UIT Dehradun India

ISBN: (纸本)9798350338607

The most important contribution made by this study is the proposal of a fuzzy logic global power management strategy for hybrid electric vehicles powered by the machine Electric powertrain. This has been investigated from three different vantage points throughout the process. The first challenge is finding the optimal distribution of power between all of the internal combustion engines. The second step is to maximise the amount of potential energy that can be absorbed by the vehicle while it is braking. Finally, a dependable ON/OFF controller of the Internal Combustion Engine (ICE) implements a State of Charge (SOC) maintenance strategy for the battery. In order to accomplish these goals, the development of three different fuzzy logic (FL) controllers was necessary. The level of charge in the battery, the speed of the vehicle, the traction torque, and the amount of power that is required are all used in the creation of the FL controllers. In order to integrate the researched system, the simulation model technique is utilised. This technique is founded on the programmable MATLAB/Simulink environment. In this paper, a Fuzzy logic Controller (FLC) is proposed as a means of providing optimal switching and controlling of Hybrid Electric Vehicles (HEV). FLC is utilised so that the desired speed can be attained from the Motor or IC Engine in a very short amount of time. The distribution of power between the ICE and the EM is the most important aspect of the fuzzy logical controller (FLC). In addition, the size and weight of electrical components like inverters and batteries can be significantly reduced in Plug-in Hybrid Electric Vehicles(PHEVs) mainly due to the design of these vehicles. © 2023 IEEE.

关键词： Controllers

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