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检索条件"任意字段=45th ACM/IEEE Design Automation Conference, vol.1"
177 条 记 录,以下是1-10 订阅
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SystemVerilog implicit port enhancements accelerate system design & verification
SystemVerilog implicit port enhancements accelerate system d...
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45th acm/ieee design automation conference
作者: Cummings, Clifford E. Sunburst Design Inc Beaverton OR 97005 USA
the ieee Std 1800-2005 SystemVerilog Standard added new implicit port instantiation enhancements that help accelerate toplevel composition of large ASIC & FPGA designs. this paper details the new .* and .name impl... 详细信息
来源: 评论
Flow engineering for physical implementation: theory and practice
Flow engineering for physical implementation: Theory and pra...
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45th acm/ieee design automation conference
作者: Golson, Steve Churchill, Pete Trilobyte Syst 388 Stearns St Carlisle MA USA EdgeRate Consulting Carlisle MA USA
Two consultants, each with over twenty years of experience designing integrated circuits at a variety of companies large and small, are fed up with the imperfect flows typically used by their clients. Drawing on a car... 详细信息
来源: 评论
Challenges in gate level modeling for delay and SI at 65nm and below
Challenges in gate level modeling for delay and SI at 65nm a...
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45th acm/ieee design automation conference
作者: Keller, Igor Tam, King Ho Kariat, Vinod Cadence Design Syst Inc San Jose CA 95134 USA
In this paper we review the prior art and recent advances in the area of standard cell modeling for delay and noise analyses, suggest a taxonomy of different cell models, and discuss their strengths and weaknesses. We... 详细信息
来源: 评论
Standard interfaces in mobile terminals - Increasing the efficiency of device design and accelerating innovation
Standard interfaces in mobile terminals - Increasing the eff...
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45th acm/ieee design automation conference
作者: Savolainen, Risto Rissa, Tero Architecture and System Design Nokia Devices R and D Finland
Handheld mobile terminals have developed from simple phones to devices featuring a wide variety of modem multimedia functions, being in fact multimedia computers. In today's mobile terminals, computational demand ... 详细信息
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An embedded infrastructure of debug and trace interface for the DSP platform
An embedded infrastructure of debug and trace interface for ...
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45th acm/ieee design automation conference
作者: Hsieh, Ming-Chang Huang, Chih-Tsun Natl Tsing Hua Univ Dept Comp Sci Hsinchu 30013 Taiwan
the paper presents an infrastructure for debug and trace of the embedded digital signal processor (DSP) system, consisting of the in-system trace interface and its methodology to optimize the compression rate of the p... 详细信息
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design of high performance pattern matching engine through compact deterministic finite automata
Design of high performance pattern matching engine through c...
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45th acm/ieee design automation conference
作者: Piyachon, Piti Luo, Yan Univ Massachusetts Dept Elect & Comp Engn Lowell MA 01854 USA
Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern matching, we identify its limitations... 详细信息
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Miss reduction in embedded processors through dynamic, power-friendly cache design
Miss reduction in embedded processors through dynamic, power...
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45th acm/ieee design automation conference
作者: Bournoutian, Garo Orailoglu, Alex Univ Calif San Diego La Jolla CA 92093 USA
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result, traditional methods for addressing p... 详细信息
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Predictive design space exploration using genetically programmed response surfaces
Predictive design space exploration using genetically progra...
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45th acm/ieee design automation conference
作者: Cook, Henry Skadron, Kevin Univ Calif Berkeley Dept Elect Engn & Comp Sci Berkeley CA 94720 USA Univ Virginia Dept Comp Sci Charlottesville VA 22903 USA
Exponential increases in architectural design complexity threaten to make traditional processor design optimization techniques intractable. Genetically programmed response surfaces (GPRS) address this challenge by tra... 详细信息
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Phase-adjustable Error Detection Flip-Flops with 2-Stage Hold Driven Optimization and Slack Based Grouping Scheme for Dynamic voltage Scaling
Phase-adjustable Error Detection Flip-Flops with 2-Stage Hol...
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45th acm/ieee design automation conference
作者: Kurimoto, Masanori Suzuki, Hiroaki Akiyama, Rei Yamanaka, Tadao Ohkuma, Haruyuki Takata, Hidehiro Shinohara, Hirofumi Renesas Technol Corp 4-1 Mizuhara Itami Hyogo 6640005 Japan Renesas Design Corp 4-1 Mizuhara Itami Hyogo 6640005 Japan
Error Detection FFs for Dynamic voltage Scaling (DVS) has been proposed. this technique controls the clock phase based on the timing slack, and reduces the energy consumption by 19.8% compared to non-DVS. the error si... 详细信息
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C-based design flow: A case study on G.729A for Voice over Internet Protocol (VoIP)
C-based design flow: A case study on G.729A for Voice over I...
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45th acm/ieee design automation conference
作者: Reshadi, Mehrdad Gorjara, Bita Gajski, Daniel Univ Calif Irvine CECS Irvine CA 92697 USA
In this paper we present the design of a G.729a codec in a C-based design flow. the codec is used in VoIP applications for sending speech over internet protocol. We started from the standard reference C implementation... 详细信息
来源: 评论