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4th international conference on Foundations of Software Science and Computation Structures, FOSSACS 2001 Held as Part of the Joint European conferences on theory and Practice of Software, ETAPS 2001

作者： Calcagno, Cristiano O’Hearn, Peter W. Queen Mary University of London United Kingdom DISI University of Genova Italy

ISBN: (纸本)3540418644

Garbage collection relieves the programmer of the burden of managing dynamically allocated memory, by providing an automatic way to reclaim unneeded storage. this eliminates or lessens program errors that arise from attempts to access disposed memory, and generally leads to simpler programs. One might therefore expect that reasoning about programs in garbage collected languages would be much easier than in languages where the programmer has more explicit control over memory. But existing program logics are based on a low level view of storage that is sensitive to the presence or absence of unreachable cells, and Reynolds has pointed out that the Hoare triples derivable in these logics are even incompatible with garbage collection. We present a semantics of program logic assertions based on a view of the heap as finite, but extensible;this is for a logical language with primitives for dereferencing pointer expressions. the essential property of the semantics is that all propositions are invariant under operations of adding or removing garbage cells;in short, they are garbage insensitive. We use the assertion language to formulate notions of partial and total correctness for a small programming language, and provide logical characterizations of two natural notions of observational equivalence between programs. © Springer-Verlag Berlin Heidelberg 2001.

关键词： Semantics

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Forward and backward chaining in constraint programming (INVITED TALK)

Lecture Notes in Computer Science (including subseries Lectu...

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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 1997年 1265卷 1-1页

作者： Jaffar, Joxan Liu, Bing Yap, Roland H. C. Dept. of Information Systems and Computer Science National University of Singapore 10 Kent Ridge Crescent 119260 Singapore

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A flash IC card with programmable security code

A flash IC card with programmable security code

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international conference on ASIC

作者： Liu Kai Pan li-yang Zhu jun Institute of Micro Electronics Tsinghua University Beijing China

A flash IC card with programmable security code and embedded 2 Kb flash memory has been developed. Using the NORST (NOR with Select Transistor) flash EEPROM cell make this flash memory suitable for the embedded applications. the needed high positive and negative boosted voltages when programming and erasing are provided by the Dickson charge pump on chip. Two circuit techniques are proposed for the charge pump in order to minimize the influence of the body effect and threshold voltage. there are two main parts to the whole card: digital control logic and analog macro cell. A two level fuse circuit is adopted to distinguish the state of testing and normal use.

关键词： EPROM Digital control Flash memory Programmable logic arrays Digital integrated circuits logic arrays Circuit testing logic circuits Low voltage Security

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Towards discovery of deep and wide first-order structures: A case study in the domain of mutagenicity 4th

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4th international conference on Discovery Science, DS 2001

作者： Horváth, Tamás Wrobel, Stefan Institute for Autonomous intelligent Systems Fraunhofer Gesellschaft Schlos Birlinghoven Sankt AugustinD-53754 Germany Otto-von-Guericke-Universität Magdeburg IWS P.O.Box 4120 MagdeburgD-39106 Germany

ISBN: (纸本)9783540429562

In recent years, it has been shown that methods from Inductive logic programming (ILP) are powerful enough to discover new first-order knowledge from data, while employing a clausal representation language that is relatively easy for humans to understand. Despite these successes, it is generally acknowledged that there are issues that present fundamental challenges for the current generation of systems. Among these, two problems are particularly prominent: learning deep clauses, i.e., clauses where a long chain of literals is needed to reach certain variables, and learning wide clauses, i.e., clauses with a large number of literals. In this paper we present a case study to show that by building on positive results on acyclic conjunctive query evaluation in relational database theory, it is possible to construct ILP learning algorithms that are capable of discovering clauses of significantly greater depth and width. We give a detailed description of the class of clauses we consider, describe a greedy algorithm to workwith these clauses, and show, on the popular ILP challenge problem of mutagenicity, how indeed our method can go beyond the depth and width barriers of current ILP systems. © Springer-Verlag Berlin Heidelberg 2001.

关键词： Deep learning

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Low power design of embedded NOR type FLASH memory module (EFMM)

Low power design of embedded NOR type FLASH memory module (E...

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international conference on ASIC

作者： M. Myung-Ok Lee Seung-Min Lee Young-Min Kim Young-Cheol Kim Department of Information and Communication Dong-shin University Naju Chungcheongnam South Korea

A Novel 40-ns high speed (HS) and 30 mA low power (LP) embedded flash memory modules (EFMM) such as 1 M flash memory cell array, three (4V, 5V, 9V) positive high voltage circuits and -7V negative high voltage circuit plus VHDL-modeled logic sub-systems implemented on 0.25 /spl mu/m CMOS SLP/5LM technology are presented. It is shown that our EFMM which is being used in multi-cube results in 30 mA active read current and 100 /spl mu/A standby current. Mixed mode design for analogs-high voltage charge pump shows stable 9V high for programming and further 1.2V bandgap reference voltage interfacing with the high voltage circuits and for logic designs are developed by optimized IP-standard (set by Synopsys) VHDL modeling. Chip size with 56-pin indicates 5.7 mm/sup 2/.

关键词： Flash memory Voltage CMOS logic circuits logic arrays logic programming Log periodic antennas Flash memory cells CMOS memory circuits CMOS technology Charge pumps

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Applicative programming 79

Applicative programming

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Proceedings of the 4th international conference on Software engineering

作者： R. M. Burstall

the talk will discuss the advantages and drawbacks of the applicative style of programming, also called non-procedural or functional. this stems from “pure LISP”, although it is independent of the syntactic peculiarities of LISP, and is well-exemplified by Burge's book “Recursive programming”. the idea is to do without assignment and rely on functions which produce results. Developments for this style include PROLOG and the school of logic programming, (Colmerauer,Kowalski), also the functional programming of Backus which avoids variables altogether, rather in the manner of combinatory logic. the author has recently been experimenting with the design of an applicative language, “HOPE”.

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15th international conference on Practical Applications of Agents and Multi-Agent Systems, PAAMS 2017

15th International Conference on Practical Applications of A...

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4th international conference on Augmented Reality, Virtual Reality, and Computer Graphics, AVR 2017

ISBN: (纸本)9783319599298

the proceedings contain 40 papers. the special focus in this conference is on Practical Applications of Agents and Multi-Agent Systems. the topics include: Concept of a multi agent based decentralized production system for the automotive industry;addressing the challenges of conservative event synchronization for the sarl agent-programming language;agent-based integration of complex and heterogeneous distributed energy resources in virtual power plants;interactions among information sources in weather scenarios;a proposal for deploying teleo-reactive nodes for IOT systems;practical reasoning about complex activities;integrating decentralized coordination and reactivity in mas for repair-task allocations;coordination of mobile mules via facility location strategies;agent-based modelling for security risk assessment;scheduling access to shared space in multi-robot systems;multi-agent system for distributed cache maintenance;agent negotiation techniques for improving quality-attribute architectural tradeoffs;a multi-level multi-agent simulation framework in animal epidemiology;replication-based self-healing of mobile agents exploring complex networks;improvement of robustness to environmental changes by autonomous divisional cooperation in multi-agent cooperative patrol problem;multi-agent parking place simulation;a knowledge-based virtual conversation agent;message analysis between agents for detection of emerging behaviors in open environments;managing disruptions with a multi-agent system for airline operations control;an actor-based platform for developing emergent behaviour;learning environment to teach logic;learning styles multi-agents simulation and multi-agent system for distributed cache maintenance.

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Synthesis of Reversible logic Using Enhanced Genetic programming Approach

Synthesis of Reversible Logic Using Enhanced Genetic Program...

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international conference on Computer and Information Sciences (ICCOINS)

作者： Mustapha Yusuf Abubakar Low Tang Jung Computer Science Department School of Technology Kano State Polytechnic Kano Nigeria Computer and Information Science Department Universiti Teknologi PETRONAS Seri Iskandar Perak Darul Ridzuan Malaysia

A new enhanced reversible logic circuit synthesis method was developed using reversible gates that include NOT, CNOT (Feynman), Toffoli, Fredkin, Swap, and Peres gates. the synthesis method was done using newly developed genetic programming. Usually previous synthesis methods that uses genetic algorithms or other similar evolutionary algorithms suffers a problem known as blotting which is a sudden uncontrolled growth of an individual (circuit), which may render the synthesis inefficient because of memory utilization, making the algorithm difficult to continue running and eventually stack in a local minima, there for an optimized reversible circuit may not be generated. In this method the algorithm used was blot free, the blotting was carefully controlled by fixing a suitable length and size of the individuals in the population. Following this approach, the cost of generating circuits was greatly reduced giving the algorithm to reach the end of the last designated generation to give out optimal or near optimal results. the results of the circuits generated using this method were compared with some of the results already in the literature, and in many cases, our results appeared to be better in terms of gate count and quantum cost metrics.

关键词： logic gates Libraries Vegetation logic circuits Genetic programming Measurement Sociology

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A design framework for system re-engineering

A design framework for system re-engineering

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Asia-Pacific conference on Software Engineering

作者： X. Liu Z. Chen H. Yang H. Zedan W.C. Chu Software Technology Research Laboratory De Montfort University UK Department of Information Engineering Feng Chia University FCU Taiwan

Discusses the current situation of formal methods and their use in the re-engineering of computing systems, especially real-time systems. Based on the analysis results, a solution which uses a consistent 4-sector Wide Spectrum Language (WSL) is proposed, which presently includes the general architecture and work flow, the structure of the Object-Action Model, the syntax and semantics of the Object-oriented Temporal Agent Model (ObTAM) and the Timed Guarded Command Language (TGCL). A small case study shows an optimistic future for our WSL technique. Further research will aim to build the complete semantic kernel of the WSL and its associated algebraic laws, including transformation rules and abstraction rules.

关键词： Educational institutions Real time systems Object oriented modeling Design engineering Laboratories Computer architecture Kernel logic Costs Accidents

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Filtering isomorphic models by invariants 27

Filtering isomorphic models by invariants

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27th international conference on Principles and Practice of Constraint programming, CP 2021

作者： Araújo, João Chow, Choiwah Janota, Mikoláš NOVA University Lisbon Portugal Universidade Aberta Lisbon Portugal Czech Technical University in Prague Czech Republic

ISBN: (纸本)9783959772112

the enumeration of finite models of first order logic formulas is an indispensable tool in computational algebra. the task is hindered by the existence of isomorphic models, which are of no use to mathematicians and therefore are typically filtered out a posteriori. this paper proposes a divideand- conquer approach to speed up and parallelize this process. We design a series of invariant properties that enable us to partition existing models into mutually non-isomorphic blocks, which are then tackled separately. the presented approach is integrated into the popular tool Mace4, where it shows tremendous speed-ups for a variety of algebraic structures. © João Araújo, Choiwah Chow, and Mikoláš Janota.

关键词： Formal logic

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