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检索条件"任意字段=4th International Symposium on Parallel and Distributed Processing and Applications, ISPA 2006"

共 105 条记录，以下是31-40 订阅

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Adaptive technique for automatic communication access pattern discovery applied to data prefetching in distributed applications using neural networks and stochastic models 4th

引用

4th international symposium on parallel and distributed processing and applications

作者： Dodonov, Evgueni de Mello, Rodrigo Fernandes Yang, Laurence Tianruo Univ Sao Paulo Inst Ciencias Matemat & Computac Sao Carlos SP Brazil St Francis Xavier Univ Antigonish NS Canada

ISBN: (纸本)9783540680673

the distributed computing performance is usually limited by the data transfer rate and access latency. Techniques such as data caching and prefetching were developed to overcome this limitation. However, such techniques require the knowledge of application behavior in order to be effective. In this sense, we propose new application communication behavior discovery techniques that, by classifying and analyzing application access patterns, is able to predict future application data accesses. the proposed techniques use stochastic methods for application state change prediction and neural networks for access pattern discovery based on execution history, and is evaluated using the NAS parallel Benchmark suite.

关键词： Stochastic models

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FPGA-based DSP - It's about time

FPGA-based DSP - It's about time

引用

4th international symposium on Signal processing and Its applications (ISSPA 96)

作者： Goslin, G Xilinx Inc San Jose United States

ISBN: (纸本)1864352094

there are many features that facilitate high performance digital signal processing (DSP) design built into the field programmable gate array (FPGA) architecture. the FPGA can provide all the benefits and has all the features of a fixed point programmable DSP. the performance advantage of FPGA-based DSP design comes from the ability to build parallel data flow structures internal to the FPGA. FPGA-based DSP offers a scaleable methodology for DSP design implementation based technique uses distributed arithmetic. the scalability of bit-serial and bit-parallel distributed arithmetic optimizes the design by implementing the DSP function in an optimized FPGA-based DSP solution based on performance requirements.

关键词： Digital signal processing

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4CaaSt: Comprehensive management of cloud services through a PaaS

4CaaSt: Comprehensive management of cloud services through a...

引用

2012 10th IEEE international symposium on parallel and distributed processing with applications, ispa 2012

作者： García-Gómez, Sergio Escriche-Vicente, Manuel Arozarena-Llopis, Pablo Lelli, Francesco Taher, Yehia Momm, Christof Spriestersbach, Axel Vogel, Jürgen Giessmann, Andrea Junker, Frederic Jiménez-Gañán, Miguel Biro, József Le Jeune, Goulven Dao, Michel Carrie, Stephane P. Niemoller, Joerg Mazmanov, Dimitri Telefónica Digital Spain ERISS University of Tilburg Netherlands SAP Research Center Karlsruhe and Zürich Germany University of St. Gallen Switzerland Universidad Politécnica de Madrid Spain Nokia Siemens Networks Budapest Hungary Bull Grenoble France Orange Labs. Paris France Ericsson Research Sweden

ISBN: (纸本)9780769547015

the 4CaaSt project aims at developing a PaaS framework that enables flexible definition, marketing, deployment and management of Cloud-based services and applications. the major innovations proposed by 4CaaSt are the blueprint and its lifecycle management, a one stop shop for Cloud services and a PaaS level resource management featuring elasticity. 4CaaSt also provides a portfolio of ready to use Cloud native services and Cloud-aware immigrant technologies. © 2012 IEEE.

关键词： Web services

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Mobile Agents based collective communication: An application to a parallel plasma simulation 4th

引用

4th international symposium on parallel and distributed processing and applications

作者： Venticinque, Salvatore Di Martino, Beniamino Aversa, Rocco Vlad, Gregorio Briguglio, Sergio Univ Naples 2 Dipartimento Ingn Informaz Real Casa dellAnnunziataVia Roma 29 I-81031 Aversa CE Italy Associaz EURATOM-ENEA sulla Fus CR Frascati I-00044 Rome Italy

ISBN: (纸本)9783540680673

Collective communication libraries are widely developed and used in scientific community to support parallel and Grid programming. On the other side they often lack in Mobile Agents systems even if message passing is always supported to grant communication ability to the agents. Collective communication primitives can help to develop agents based parallel application. they can also benefit social ability and interactions of collaborative agents. Here we present a collective communication service implemented in the Jade agent platform. Furthermore we propose its exploitation to interface transparently heterogeneous executions instances of a scientific parallel application that runs in a distributed environment.

关键词： Mobile agents

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Security enhancements in EMV protocol for NFC mobile payment 15

Security enhancements in EMV protocol for NFC mobile payment

引用

Joint 15th IEEE international Conference on Trust, Security and Privacy in Computing and Communications, 10th IEEE international Conference on Big Data Science and Engineering and 14th IEEE international symposium on parallel and distributed processing with applications, IEEE TrustCom/BigDataSE/ispa 2016

作者： Madhoun, Nour El Pujolle, Guy Sorbonne Universités UPMC Univ Paris 06 CNRS LIP6 UMR 7606 4 place Jussieu Paris75005 France

ISBN: (纸本)9781509032051

Today, by integrating Near Field Communication (NFC) technology in smartphones, bank cards and payment terminals, a purchase transaction can be executed immediately without any physical contact, without entering a PIN code or a signature. Europay Mastercard Visa (EMV) is the standard dedicated for securing contactless-NFC payment transactions. However, it does not ensure two main security proprieties: (1) the authentication of the payment terminal to the client's payment device, (2) the confidentiality of personal banking data. In this paper, we first of all detail EMV standard and its security vulnerabilities. then, we propose a solution that enhances the EMV protocol by adding a new security layer aiming to solve EMV weaknesses. We formally check the correctness of the proposal using a security verification tool called Scyther. © 2016 IEEE.

关键词： Smartphones

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Accelerating Blockchain Transfer System Using FPGA-Based NIC 16

Accelerating Blockchain Transfer System Using FPGA-Based NIC

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16th IEEE ispa / 17th IEEE IUCC / 8th IEEE BDCloud / 11th IEEE SocialCom / 8th IEEE SustainCom

作者： Sakakibara, Yuma Tokusashi, Yuta Morishima, Shin Matsutani, Hiroki Keio Univ Dept Informat & Comp Sci Kohoku Ku 3-14-1 Hiyoshi Yokohama Kanagawa Japan

ISBN: (纸本)9781728111414

Blockchain is core technology for cryptocurrency and it is possible to become fundamental platform for industry and business. Especially, a blockchain-based digital asset transfer system using Internet of things (IoT) products has recently been considered as a new practical platform, but the protocol limits performance. Previous research has improved performance by proposing new protocols, but further improvement is necessary for dealing with increasing transactions via IoT products. therefore, we propose an in-Network Interface Card (in-NIC) processing approach using a Field Programmable Gate Array (FPGA) to improve performance of a blockchain-based transfer system. To be more concrete, we design and implement a prototype NIC with a key-value data store written in a P4 language on the FPGA that has four 10Gigabit Ethernet (10GbE) network interfaces. the prototype system supports frequently-used commands (CREATE, ISSUE, TRANSFER and REFER) for transferring digital asset. It reduces time for processing a kernel network protocol stack and accessing the data store. In fact, we measured throughput and latency of our prototype system compared to those of a blockchain software application. As a result, we found that our solution is able to obtain throughput 6.04 times higher on average and latency 15.4 times lower on average for all typical blockchain operations.

关键词： Blockchain FPGA Key-Value Store P4

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Enforcing consistency during the adaptation of a parallel component

Enforcing consistency during the adaptation of a parallel co...

引用

ISPDC 2005: 4th international symposium on parallel and distributed Computing

作者： Buisson, Jérémy André, Françoise Pazat, Jean-Louis IRISA INSA de Rennes Avenue du General Leclerc 35042 Rennes France IRISA Université de Rennes 1 Avenue du General Leclerc 35042 Rennes France

ISBN: (纸本)0769524346

As Grid architectures provide execution environments that are distributed, parallel and dynamic, applications require to be not only parallel and distributed, but also able to adapt themselves to their execution environment. this article presents a model for designing self-adaptable parallel components that can be assembled to build applications for Grid. this model includes the definition of a consistency criterion for the dynamic adaptation of SPMD components. We propose a solution to implement this criterion. It has been evalued on both synthetic and real codes to exhibit the behavior of the several proposed strategies. © 2005 IEEE.

关键词： parallel processing systems

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4th international workshop on embedded HPC systems and applications (EHPC’99) workshop co-chairs 13th

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13th international parallel processing symposium, IPPS 1999 Held in Conjunction with the 10th symposium on parallel and distributed processing, SPDP 1999

作者： Bhatt, Devesh Prasanna, Viktor Honeywell Technology Center United States Univ of Southern California United States

ISBN: (纸本)3540658319

the international Workshop on Embedded HPC Systems and applications (EHPC) is a forum for the presentation and discussion of approaches, research findings, and experiences in the applications of High Performance Computing (HPC) technology for embedded systems. Of interest are both the development of relevant technology (e.g.: hardware, middleware, tools) as well as the embedded HPC applications built using such technology. In the last three workshops, EHPC’99 has brought together industry, academia, and government researchers/users to explore the special needs and issues in applying HPC technologies to defense and commercial applications. © Springer-Verlag Berlin Heidelberg 1999.

关键词： Middleware

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Constructing virtual Architectures on a tiled processor 06

Constructing virtual Architectures on a tiled processor

引用

4th international symposium on Code Generation and Optimization

作者： Wentzlaff, David Agarwal, Anant MIT CSAIL Cambridge MA 02139 USA

ISBN: (纸本)0769524990

As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these resources as individually controllable, parallel processing elements. While such architectures excel at parallel applications, they seldom support legacy single-threaded applications. In this work, we propose using parallel resources to facilitate execution of legacy codes with acceptable performance on parallel architectures containing a drastically different instruction set through the use of an all software parallel dynamic binary translation engine. this engine spatially implements different portions of a superscalar processor across distinct parallel elements thus exploiting the pipeline parallelism inherent in a superscalar this virtual microarchitecture facilitates changing the allocation of silicon resources between different superscalar units in software which is not possible when special purpose physical resources are built. We propose building dynamically reconfigurable architectures that inspect the current virtual machine configuration along with the dynamic instruction stream and change the configuration to best suit the program's needs at runtime. An x86 to Raw parallel translation engine was built in which tiles dedicated to translation can be traded for tiles dedicated to the memory system as an example of dynamic reconfiguration.

关键词： Engines Silicon Computer architecture Application software Tiles Process control parallel processing parallel architectures Software performance Pipelines

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A parallel mutual information based image registration algorithm for applications in remote sensing 4th

引用

4th international symposium on parallel and distributed processing and applications

作者： Du, Yunfei Zhou, Haifang Wang, Panfeng Yang, Xuejun Liu, Hengzhu Natl Univ Def Technol Sch Comp Changsha 410073 Hunan Peoples R China

ISBN: (纸本)9783540680673

Image registration is a classical problem that addresses the problem of finding a geometric transformation that best aligns two images. Since the amount of multisensor remote sensing imagery are growing tremendously, the search for matching transformation with mutual information is very time-consuming and tedious, and fast and automatic registration of images from different sensors has become critical in the remote sensing framework. So the implementation of automatic mutual information based image registration methods on high performance machines needs to be investigated. First, this paper presents a parallel implementation of a mutual information based image registration algorithm. It takes advantage of cluster machines by partitioning of data depending on the algorithm's peculiarity. then, the evaluation of the parallel registration method has been presented in theory and in experiments and shows that the parallel algorithm has good parallel performance and scalability.

关键词： Image registration

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