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检索条件"任意字段=4th International Symposium on Parallel and Distributed Processing and Applications"

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Extending Sparse Tensor Accelerators to Support Multiple Compression Formats 35

Extending Sparse Tensor Accelerators to Support Multiple Com...

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35th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Qin, Eric Jeong, Geonhwa Won, William Kao, Sheng-Chun Kwon, Hyoukjun Srinivasan, Sudarshan Das, Dipankar Moon, Gordon E. Rajamanickam, Sivasankaran Krishna, Tushar Georgia Tech Atlanta GA 30332 USA Intel Labs Bangalore Karnataka India Korea Aerosp Univ Goyang South Korea Sandia Natl Labs POB 5800 Albuquerque NM 87185 USA

ISBN: (纸本)9781665440660

Sparsity, which occurs in both scientific applications and Deep Learning (DL) models, has been a key target of optimization within recent ASIC accelerators due to the potential memory and compute savings. these applications use data stored in a variety of compression formats. We demonstrate that both the compactness of different compression formats and the compute efficiency of the algorithms enabled by them vary across tensor dimensions and amount of sparsity. Since DL and scientific workloads span across all sparsity regions, there can be numerous format combinations for optimising memory and compute efficiency. Unfortunately, many proposed accelerators operate on one or two fixed format combinations. this work proposes hardware extensions to accelerators for supporting numerous format combinations seamlessly and demonstrates similar to 4x speedup over performing format conversions in software.

关键词： Deep learning distributed processing Tensors Computational modeling Memory management Hardware Software

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Mixed Data-parallel Scheduling for distributed Continuous Integration

Mixed Data-Parallel Scheduling for Distributed Continuous In...

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26th IEEE international parallel and distributed processing symposium (IPDPS) / Workshop on High Performance Data Intensive Computing

作者： Beaumont, Olivier Bonichon, Nicolas Courtes, Ludovic Hanin, Xavier Dolstra, Eelco Univ Bordeaux CNRS UMR 5800 F-33400 Talence France 4SH Bordeaux France Delft Univ Technol Delft Netherlands

ISBN: (纸本)9780769546766

In this paper, we consider the problem of scheduling a special kind of mixed data-parallel applications arising in the context of continuous integration. Continuous integration (CI) is a software engineering technique, which consists in rebuilding and testing interdependent software components as soon as developers modify them. the CI tool is able to provide quick feedback to the developers, which allows them to fix the bug soon after it has been introduced. the CI process can be described as a DAG where nodes represent package build tasks, and edges represent dependencies among these packages;build tasks themselves can in turn be run in parallel. thus, CI can be viewed as a mixed data-parallel application. A crucial point for a successful CI process is its ability to provide quick feedback. thus, makespan minimization is the main goal. Our contribution is twofold. First we provide and analyze a large dataset corresponding to a build DAG. Second, we compare the performance of several scheduling heuristics on this dataset.

关键词： DAG Scheduling mixed parallelism continuous integration

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A parallel algorithm of path planning for DEM terrain data 17

A parallel algorithm of path planning for DEM terrain data

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17th international symposium on distributed Computing and applications for Business Engineering and Science (DCABES)

作者： Wang, Yanli Dou, Wanfeng Nanjing Normal Univ Sch Comp Sci & Technol Nanjing 210023 Jiangsu Peoples R China

ISBN: (纸本)9781538674451

In this paper, a parallel algorithm of path planning for DEM terrain data is proposed. First of all, the raster grid DEM data are transformed into the network structure of graph theory based on the domain model in order to apply to the classical Dijkstra shortest path algorithm. then, for the processing of large-scale network, a parallel algorithm of Dijkstra serial algorithm is implemented by MapReduce programming model. the experimental results show that our algorithm can archive a better efficiency in the execution time.

关键词： Dijstra DEM MapReuce parallelization

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FP4S: Fragment-based parallel State Recovery for Stateful Stream applications 34

FP4S: Fragment-based Parallel State Recovery for Stateful St...

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34th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Liu, Pinchao Xu, Hailu Da Silva, Dilma Wang, Qingyang Ahmed, Sarker Tanzir Hu, Liting Florida Int Univ Miami FL 33199 USA Texas A&M Univ College Stn TX 77843 USA Louisiana State Univ Baton Rouge LA 70803 USA

ISBN: (数字)9781728168760

ISBN: (纸本)9781728168760

Streaming computations are by nature long-running. they run in highly dynamic distributed environments where many stream operators may leave or fail at the same time. Most of them are stateful, in which stream operators need to store and maintain large-sized state in memory, resulting in expensive time and space costs to recover them. the state-of-the-art stream processing systems offer failure recovery mainly through three approaches: replication recovery, checkpointing recovery, and DStream-based lineage recovery, which are either slow, resource-expensive or fail to handle many simultaneous failures. We present FP4S, a novel fragment-based parallel state recovery mechanism that can handle many simultaneous failures for a large number of concurrently running stream applications. the novelty of FP4S is that we organize all the application's operators into a distributed hash table (DHT) based consistent ring to associate each operator with a unique set of neighbors. then we divide each operator's in-memory state into many fragments and periodically save them in each node's neighbors, ensuring that different sets of available fragments can reconstruct lost state in parallel. this approach makes this failure recovery mechanism extremely scalable, and allows it to tolerate many simultaneous operator failures. We apply FP4S on Apache Storm and evaluate it using large-scale real-world experiments, which demonstrate its scalability, efficiency, and fast failure recovery features. When compared to the state-of-the-art solutions (Apache Storm), FP4S reduces 37.8% latency of state recovery and saves more than half of the hardware costs. It can scale to many simultaneous failures and successfully recover the states when up to 66.6% of states fail or get lost.

关键词： Storms Checkpointing Hardware Scalability Sparks Task analysis Bars

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Refactoring the Molecular Docking Simulation for Heterogeneous, Manycore Processors Systems 15

Refactoring the Molecular Docking Simulation for Heterogeneo...

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15th IEEE international symposium on parallel and distributed processing with applications (ISPA) / 16th IEEE international Conference on Ubiquitous Computing and Communications (IUCC)

作者： Chen, Junshi Lin, Han Liang, Weihao Yu, Yang Han, Wenting An, Hong Chen, Yong Liu, Xin Univ Sci & Technol China Sch Comp Sci & Technol Hefei Anhui Peoples R China Texas Tech Univ Dept Comp Sci Lubbock TX 79409 USA Natl Res Ctr Parallel Comp Engn & Technol Beijing Peoples R China

ISBN: (纸本)9781538637906

this paper presents a scalable design and implementation of the molecular docking application DOCK for a large-scale high performance computing system, the Sunway TaihuLight supercomputer, which provisions a heterogeneous, manycore processor architecture that consists of management processing elements (MPEs) and clusters of computing processing elements (CPEs). the key innovation is a novel refactoring of DOCK on the CPEs. Optimization techniques for data redundancy minimization to fit data in cache, software-controlled prefetching into scratchpads, memory access coalescing, software caches, vectorization and loop unrolling are employed to improve the exploitation of the computational resources. For a single docking process, the refactored version using both the MPE and CPE cluster achieved 260x to 402x speedup compared against the original ported version using MPE only. To scale the DOCK to the full Sunway Taihulight system with 10,649,600 cores (including all MPE and CPE cores), we present an MPI communication domain partition scheme as well. For docking 9 million small compounds to a Zika virus target protein, we manage to scale to 131,072 MPEs, and 8,388,608 CPEs, with a total of 8,519,680 cores.

关键词： molecular docking Sunway TaihuLight Supercomputer heterogeneous manycore optimization

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Dynamic Fine-Grained Workload Partitioning for Irregular applications on Discrete CPU-GPU Systems 19

Dynamic Fine-Grained Workload Partitioning for Irregular App...

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19th IEEE international symposium on parallel and distributed processing with applications (IEEE ISPA)

作者： Xiao, Chunhua Ran, Wei Lin, Fangzhu Zhang, Lin Chongqing Univ Coll Comp Sci Chongqing Peoples R China

ISBN: (纸本)9781665435741

As the scale of big data continues to grow and the complexity of data analysis algorithms increases, the desire for greater computing power is increasingly evident. A popular approach is to utilize heterogeneous systems for computation. Discrete CPU-GPU system, which has CPU and GPU on different chips connected through a PCI-e bus, is a typical heterogeneous system. there have been a lot of schemes proposed to improve performance on the discrete CPU-GPU system through partitioning. However, most of them are for regular applications and far from ideal in terms of resource utilization and performance for irregular applications. Heterogeneous computing receives much attention due to its performance potential, and many regular applications are greatly benefited from it, but the acceleration of irregular applications is still a problem to be solved. In this paper, we propose a dynamic fine-grained workload partitioning approach for irregular applications that boosts resource utilization to achieve a better load balance on heterogeneous platforms. the approach monitors the kernel execution of the CPU and GPU at runtime, and finely partitions the workload according to their processing speed, assigning relatively regular data to the GPU and the rest to the CPU. Evaluated with various irregular workloads, our scheme achieves up to 20% performance improvement over the state-of-the-art coarse-grained scheme, and the performance gap is less than 5% in most cases compared to oracle-based partitioning.

关键词： heterogeneous system load balancing irregular application workload partitioning

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On Overlapping Communication and File I/O in Collective Write Operation 34

On Overlapping Communication and File I/O in Collective Writ...

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34th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Feki, Raafat Gabriel, Edgar Univ Houston Dept Comp Sci Parallel Software Technol Lab Houston TX 77204 USA

ISBN: (纸本)9781728174457

Many parallel scientific applications spend a significant amount of time reading and writing data files. Collective I/O operations allow to optimize the file access of a process group by redistributing data across processes to match the data layout on the file system. In most parallel I/O libraries, the implementation of collective I/O operations is based on the two-phase I/O algorithm, which consists of a communication phase and a file access phase. this papers evaluates various design options for overlapping two internal cycles of the two-phase I/O algorithm, and explores using different data transfer primitives for the shuffle phase, including non-blocking two-sided communication and multiple versions of one-sided communication. the results indicate that overlap algorithms incorporating asynchronous I/O outperform overlapping approaches that only rely on non-blocking communication. However, in the vast majority of the testcases one-sided communication did not lead to performance improvements over two-sided communication.

关键词： Data transfer

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dOpenCL: Towards a Uniform Programming Approach for distributed Heterogeneous Multi-/Many-Core Systems

dOpenCL: Towards a Uniform Programming Approach for Distribu...

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26th IEEE international parallel and distributed processing symposium (IPDPS) / Workshop on High Performance Data Intensive Computing

作者： Kegel, Philipp Steuwer, Michel Gorlatch, Sergei Univ Munster Dept Math & Comp Sci Munster Germany

ISBN: (纸本)9780769546766

Modern computer systems are becoming increasingly heterogeneous by comprising multi-core CPUs, GPUs, and other accelerators. Current programming approaches for such systems usually require the application developer to use a combination of several programming models (e. g., MPI with OpenCL or CUDA) in order to exploit the full compute capability of a system. In this paper, we present dOpenCL (distributed OpenCL) - a uniform approach to programming distributed heterogeneous systems with accelerators. dOpenCL extends the OpenCL standard, such that arbitrary computing devices installed on any node of a distributed system can be used together within a single application. dOpenCL allows moving data and program code to these devices in a transparent, portable manner. Since dOpenCL is designed as a fully-fledged implementation of the OpenCL API, it allows running existing OpenCL applications in a heterogeneous distributed environment without any modifications. We describe in detail the mechanisms that are required to implement OpenCL for distributed systems, including a device management mechanism for running multiple applications concurrently. Using three application studies, we compare the performance of dOpenCL with MPI+OpenCL and a standard OpenCL implementation.

关键词： OpenCL Heterogeneous Systems distributed Systems GPU Computing dOpenCL

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Minimal Aggregated Shared Memory Messaging on distributed Memory Supercomputers 30

Minimal Aggregated Shared Memory Messaging on Distributed Me...

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30th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Jamroz, Benjamin F. Dennis, John M. Natl Ctr Atmospher Res Computat Informat Syst Lab Boulder CO 80301 USA

ISBN: (纸本)9781509021406

Many high-performance distributed memory applications rely on point-to-point messaging using the Message Passing Interface (MPI). Due to the latency of the network, and other costs, this communication can limit the scalability of an application when run on high node counts of distributed memory supercomputers. Communication costs are further increased on modern multi- and many-core architectures, when using more than one MPI process per node, as each process sends and receives messages independently, inducing multiple latencies and contention for resources. In this paper, we use shared memory constructs available in the MPI 3.0 standard to implement an aggregated communication method to minimize the number of inter-node messages to reduce these costs. We compare the performance of this Minimal Aggregated SHared Memory (MASHM) messaging to the standard point-to-point implementation on large-scale supercomputers, where we see that MASHM leads to enhanced strong scalability of a weighted Jacobi relaxation. For this application, we also see that the use of shared memory parallelism through MASHM and MPI 3.0 can be more efficient than using Open Multi-processing (OpenMP). We then present a model for the communication costs of MASHM which shows that this method achieves its goal of reducing latency costs while also reducing bandwidth costs. Finally, we present MASHM as an open source library to facilitate the integration of this efficient communication method into existing distributed memory applications.

关键词： Scalability parallel Algorithms parallel Programming

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CRC-based Memory Reliability for Task-parallel HPC applications 30

CRC-based Memory Reliability for Task-parallel HPC Applicati...

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30th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Subasi, Omer Unsal, Osman Labarta, Jesus Yalcin, Gulay Cristal, Adrian Barcelona Supercomputing Ctr Barcelona Spain Univ Politecn Cataluna E-08028 Barcelona Spain Abdullah Gul Univ Kayseri Turkey CSIC Spanish Natl Res Council IIIA Artificial Intelligence Res Inst Madrid Spain

ISBN: (纸本)9781509021406

Memory reliability will be one of the major concerns for future HPC and Exascale systems. this concern is mostly attributed to the expected massive increase in memory capacity and the number of memory devices in Exascale systems. For memory systems Error Correcting Codes (ECC) are the most commonly used mechanism. However state-of-the art hardware ECCs will not be sufficient in terms of error coverage for future computing systems and stronger hardware ECCs providing more coverage have prohibitive costs in terms of area, power and latency. Software-based solutions are needed to cooperate with hardware. In this work, we propose a Cyclic Redundancy Checks (CRCs) based software mechanism for task-parallel HPC applications. Our mechanism incurs only 1.7% performance overhead with hardware acceleration while being highly scalable at large scale. Our mathematical analysis demonstrates the effectiveness of our scheme and its error coverage. Results show that our CRCbased mechanism reduces the memory vulnerability by 87% on average with up to 32-bit burst (consecutive) and 5-bit arbitrary error correction capability.

关键词： Cyclic Redundancy Checks Dataflow Model HPC applications Memory Reliability Task-parallelism

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