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检索条件"任意字段=4th International Symposium on Parallel and Distributed Processing and Applications"

共 3818 条记录，以下是261-270 订阅

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QoS-awareness of Microservices with Excessive Loads via Inter-Datacenter Scheduling 36

QoS-awareness of Microservices with Excessive Loads via Inte...

引用

36th IEEE international parallel and distributed processing symposium (IEEE IPDPS)

作者： Shi, Jiuchen Wang, Jiawen Fu, Kaihua Chen, Quan Zeng, Deze Guo, Minyi Shanghai Jiao Tong Univ Shanghai Peoples R China China Univ Geosci Wuhan Peoples R China

ISBN: (纸本)9781665481069

User-facing applications often experience excessive loads and are shifting towards microservice software architecture. While the local datacenter may not have enough resources to host the excessive loads, a reasonable solution is moving some microservices of the applications to remote datacenters. However, it is nontrivial to identify the appropriate migration decision, as the microservices show different characteristics, and the local datacenter also shows different resource contention situations. We therefore propose ELIS, an inter-datacenter scheduling system that ensures the required Quality-of-Service (QoS) of the microservice application with excessive loads, while minimizing the resource usage of the remote datacenter. ELIS comprises a resource manager and a reward-based microservice migrator. the resource manager finds the near-optimal resource configurations for different microservices to minimize resource usage while ensuring QoS. the microservice migrator migrates some microservices to remote datacenters when local resources cannot afford the excessive loads. Our experimental results show that ELIS ensures the required QoS of user-facing applications at excessive loads. Meanwhile, it reduces overall/remote resource usage by 13.1% and 58.1% on average, respectively.

关键词： distributed processing Costs Software architecture Microservice architectures Quality of service Performance gain throughput

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Grouping Synchronous to Eliminate Stragglers with Edge Computing in distributed Deep Learning 19

Grouping Synchronous to Eliminate Stragglers with Edge Compu...

引用

19th IEEE international symposium on parallel and distributed processing with applications (IEEE ISPA)

作者： Gui, Zhiyi Yang, Xiang Yang, Hao Li, Wei Zhang, Lei Qi, Qi Wang, Jingyu Sun, Haifeng Liao, Jianxin Beijing Univ Posts & Telecommun State Key Lab Networking & Switching Technol Beijing Peoples R China Huawei Beijing Peoples R China

ISBN: (纸本)9781665435741

With the development of artificial intelligence(AI) applications, a large number of data are generated from mobile or IoT devices at the edge of the network. Deep learning tasks are executed to obtain effective information in the user data. However, the edge nodes are heterogeneous and the network bandwidth is limited in this case, which will cause general distributed deep learning to be inefficient. In this paper, we propose Group Synchronous parallel (GSP), which uses a density-based algorithm to group edge nodes with similar training speeds together. In order to eliminate stragglers, group parameter servers are responsible for coordinating communication of nodes in the group with Stale Synchronous parallel and aggregating the gradients of these nodes. And a global parameter server is responsible for aggregating the gradients from the group parameter servers to update the global model. To save network bandwidth, we further propose Grouping Dynamic Sparsification (GDS). It adjusts the gradient sparsification rate of nodes dynamically based on GSP so as to differentiates the communication volume and makes the training speed of all nodes tend to be the same. We evaluate GSP and GDS's performance on LeNet-5, ResNet, VGG, and Seq2Seq with Attention. the experimental results show that GSP speedups the training by 45% similar to 120% with 16 nodes. GDS on top of GSP can make up for some test accuracy loss, up to 0.82% for LeNet-5.

关键词： distributed deep training gradient compression parameter server gradient sparsification

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A Reconfigurable High Performance ASIP Engine for Image Signal processing

A Reconfigurable High Performance ASIP Engine for Image Sign...

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26th IEEE international parallel and distributed processing symposium (IPDPS) / Workshop on High Performance Data Intensive Computing

作者： Liao, Hsuanchun Asri, Mochamad Isshiki, Tsuyoshi Li, Dongju Kunieda, Hiroaki Tokyo Inst Technol Dept Commun & Integrated Syst Tokyo 152 Japan

ISBN: (纸本)9780769546766

Emerging digital television applications and the conventional MPSoC architectures encounter drastically increasing performance and flexibility requirement. To display high quality of images on the display devices, several image processing has to be performed. However, these algorithms are nonstandard and change case by case. It is difficult to achieve real time processing by using general purpose processor or DSP. In this paper, we present a reconfigurable Application Specific Instruction-set Processor (ASIP) which can perform several image processing algorithms by using the same datapath. It can complete several 1D filtering processing within 8 cycle/pixel;performing 16 times higher performance compare to conventional RISC processor. the performance of this ASIP can achieve the requirement of FullHD(1920x1080) application.

关键词： ASIP Image processing

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System Noise Revisited: Enabling Application Scalability and Reproducibility with SMT 30

System Noise Revisited: Enabling Application Scalability and...

引用

30th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Leon, Edgar A. Karlin, Ian Moody, Adam T. Lawrence Livermore Natl Lab Livermore Comp Livermore CA 94550 USA

ISBN: (纸本)9781509021406

Despite significant advances in reducing system noise, the scalability and performance of scientific applications running on production commodity clusters today continue to suffer from the effects of noise. Unlike custom and expensive leadership systems, the Linux ecosystem provides a rich set of services that application developers utilize to increase productivity and to ease porting. the cost is the overhead that these services impose on a running application, negatively impacting its scalability and performance reproducibility. In this work, we propose and evaluate a simple yet effective way to isolate an application from system processes by leveraging Simultaneous Multi-threading (SMT), a pervasive architectural feature on current systems. Our method requires no changes to the operating system or to the application. We quantify its effectiveness on a diverse set of scientific applications of interest to the U.S. Department of Energy showing performance improvements of up to 2.4 times at 16,384 tasks for a high-order finite elements shock hydrodynamics application. Finally, we provide guidance to system and application developers on how to best leverage SMT under different application characteristics and scales.

关键词： system noise jitter simultaneous multithreading SMT scalability reproducibility parallel performance

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Scheduling scheme based on dedication rate in volunteer computing environment

Scheduling scheme based on dedication rate in volunteer comp...

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4th international symposium on parallel and distributed Computing (ISPDC 2005)

作者： Byun, EJ Choi, SJ Baik, MS Hwang, CS Park, CY Jung, SY Korea Univ Dept Comp Sci & Engn Seoul 136701 South Korea

ISBN: (纸本)0769524346

A volunteer node can join and leave a volunteer computing system freely. However existing volunteer computing systems suffer from interruptions of job execution, delays of execution time, and increases of total execution time, since they do not consider dynamic scheduling properties (i.e. volatilities), such as leave, join, and suspension. therefore, dynamic execution properties of volunteer node should be considered in scheduling schemes, in order to design a stable and reliable volunteer computing system. this paper proposes a new scheduling scheme based on the Dedication Rate (DR), which reflects the dynamic properties of a volunteer. the scheduling scheme improves the completeness and reliability of execution, while also decreasing delay and total execution time. In addition, cut implementation of the proposed scheduling scheme on top of Korea @ Home is described, as well as performance evaluation.

关键词： parallel processing systems

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Dynamic Batch parallel Algorithms for Updating PageRank 36

Dynamic Batch Parallel Algorithms for Updating PageRank

引用

36th IEEE international parallel and distributed processing symposium (IEEE IPDPS)

作者： Sahu, Subhajit Kothapalli, Kishore Banerjee, Dip Sankar Int Inst Informat Technol Hyderabad Hyderabad India Indian Inst Technol Jodhpur Jodhpur Rajasthan India

ISBN: (纸本)9781665497473

the design and implementation of parallel algorithms for dynamic graph problems is attracting significant research attention in the recent years, driven by numerous applications to social network analysis, neuroscience, and protein interaction networks. One such problem is the computation of PageRank values of vertices in a directed graph. this paper presents two new parallel algorithms for recomputing the PageRank values of vertices in a dynamic graph. Our techniques require the recomputation of the PageRank of only the vertices affected by the insertion/deletion of a batch of edges. We conduct detailed experimental studies of our algorithm on a set of 11 real-world graphs. Our results on Intel Xeon Silver 4116 CPU and NVIDIA Tesla V100 PCIe 16GB GPU indicate that our algorithms outperform static and dynamic update algorithms by 6.1x and 8.6x on the CPU, and by 9.8x and 9.3x on the GPU respectively. We also compare the performance of the algorithms in batched mode to cumulative single-edge updates.

关键词： Proteins Silver distributed processing Neuroscience Social networking (online) Heuristic algorithms Graphics processing units

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A distributed Greedy Heuristic for Computing Voronoi Tessellations With applications Towards Peer-to-Peer Networks 29

A Distributed Greedy Heuristic for Computing Voronoi Tessell...

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29th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Benshoof, Brendan Rosen, Andrew Bourgeois, Anu G. Harrison, Robert W. Georgia State Univ Dept Comp Sci Atlanta GA 30303 USA

ISBN: (纸本)9781467376846

Computing Voronoi tessellations in an arbitrary number of dimensions is a computationally difficult task. this problem becomes exacerbated in distributed environments, such as Peer-to-Peer networks and Wireless networks, where Voronoi tessellations have useful applications. We present our distributed Greedy Voronoi Heuristic, which approximates Voronoi tessellations in distributed environments. Our heuristic is fast, scalable, works in any geometric space with a distance and midpoint function, and has interesting applications in embedding metrics such as latency in the links of a distributed network.

关键词： Peer-to-Peer Networks Wireless Sensor Networks Ad-Hoc Networks Computational Geometry

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Efficient and Simplified parallel Graph processing over CPU and MIC 29

Efficient and Simplified Parallel Graph Processing over CPU ...

引用

29th IEEE international parallel and distributed processing symposium (IPDPS)

作者： Chen, Linchuan Huo, Xin Ren, Bin Jain, Surabhi Agrawal, Gagan Ohio State Univ Dept Comp Sci & Engn Columbus OH 43210 USA

ISBN: (纸本)9781479986484

Intel Xeon Phi (MIC architecture) is a relatively new accelerator chip, which combines large-scale shared memory parallelism with wide SIMD lanes. Mapping applications on a node with such an architecture to achieve high parallel efficiency is a major challenge. In this paper, we focus on developing a system for heterogeneous graph processing, which is able to utilize both a many-core Xeon Phi and a multi-core CPU on one node. We propose a simple programming API with an intuitive interface for expressing SIMD parallelism. We develop efficient techniques for supporting our high-level API, focusing on exploiting wide SIMD lanes, massive number of cores, and partitioning of the work across CPU and accelerator, while handling the irregularity of graph applications. the components of our runtime system include a condensed static memory buffer, which supports efficient message insertion and SIMD message reduction while keeping memory requirements low, and specifically for MIC, a pipelining scheme for efficient message generation by avoiding frequent locking operations. Besides, a hybrid graph partitioning module is able to effectively partition the workload between the CPU and the MIC, ensuring balanced workload and low communication overhead. the main observations from our experimental evaluation using five popular applications are: for MIC executions, pipelining scheme is up to 3.36x faster than a naive approach using locking based message generation, and the speedup over OpenMP ranges from 1.17 to 4.15. Heterogeneous CPU-MIC execution achieves a speedup of up to 1.41 over the better of the CPU-only and MIC-only executions.

关键词： CPU Graph processing Intel MIC Programming Model

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ECCH: Erasure Coded Consistent Hashing for distributed Storage Systems 19

ECCH: Erasure Coded Consistent Hashing for Distributed Stora...

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19th IEEE international symposium on parallel and distributed processing with applications (IEEE ISPA)

作者： Xiong, Yinglong Zhou, Jiang Su, Lin Wang, Weiping Chen, Yong Chinese Acad Sci Inst Informat Engn Beijing Peoples R China Univ Chinese Acad Sci Sch Cyber Secur Beijing Peoples R China Texas Tech Univ Dept Comp Sci Lubbock TX 79409 USA

ISBN: (纸本)9781665435741

In this paper, we propose ECCH, an Erasure Coded Consistent Hashing scheme to make better data placement in distributed storage systems. It combines the inherent advantages of consistent hashing together with the storage-efficiency of erasure coding technology. Specifically, ECCH divides data block stream of files into groups according to block IDs. In each group, it encoded data blocks with additional parity blocks by erasure coding. All encoded blocks in the same group are stored on different nodes with consistent hashing distribution. For node failure or data loss, ECCH locates required data through the ID of missing block in a same group for fast recovery. To deal with node changes, ECCH introduces a design of multi-version hash rings to manage data layout. It can prevent the impact of data migration on erasure coding, while achieving data balance with little data movement. We have implemented ECCH on the Sheepdog, a distributed object-based storage system. Evaluation results show that ECCH can greatly improve the space utilization of hashing-based storage systems, while achieving efficient fault tolerance.

关键词： Consistent hashing erasure coding replication data distribution fault tolerance

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Increasing availability in a replicated partitionable distributed object system 4th

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4th international symposium on parallel and distributed processing and applications

作者： Beyer, Stefan Banuls, Mari-Carmen Galdamez, Pablo Osrael, Johannes Munoz-Escoi, Francesc D. Univ Politecn Valencia Inst Tecnol Informat Camino de Vera S-N Valencia 46022 Spain Max Planck Inst Quantum Opt D-85748 Garching Germany Vienna Univ Technol Inst Informat Syst Vienna Austria

ISBN: (纸本)9783540680673

Replicating objects in distributed object systems provides fault-tolerance and increases availability. We have designed a replication protocol for distributed object systems that provides increased availability by relaxing consistency temporarily. the protocol allows all partitions in a partitioned system to continue operating. the states of certain replicas are allowed to diverge. the application programmer can specify the required consistency using integrity constraints. We present an analytical model of the new protocol and evaluate it against the primary partition model, where only a majority partition is allowed to continue. Furthermore, we identify the type of application for which our protocol provides increased availability.

关键词： Fault tolerance

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