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parallel retrograde analysis on different architecture

Parallel retrograde analysis on different architecture

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international symposium on High Performance distributed Computing

作者： Ren Wu D.F. Beal HP Laboratories Hewlett Packard Company USA Department of Computer Science Queen Mary & Westfield College London University UK

Retrograde analysis is an efficient exhaustive search method. It is a powerful tool that can be used in solving problems where end states have known values but starting states do not. It has been widely used to solve mathematically-precise games such as chess endgames, and is potentially usable in energy-minimization problems. With increasing computing power, both in speed and storage capacity, retrograde analysis will become more and more useful. this paper looks at successful applications to games, the challenges ahead and the modifications that are required to utilize distributed hardware. the power and the usefulness of retrograde analysis are still limited by the computing resources one has access to. Today, the best sequential retrograde algorithms are capable of solving problems with about 10/sup 9/ states in a few hours on a standard personal computer. Bigger problems need more powerful computers, or take much longer to solve, or are simply out of the reach of today's technologies. Introducing parallelism to retrograde analysis is a natural way to attack the bigger problems. there are today three main architectures available for doing parallel retrograde analysis, namely symmetric multiprocessor (SMP) systems, high-speed network-based distributed systems and Internet-based distributed systems. In this paper, we discuss some of the key issues in doing parallel retrograde analysis on these different architectures. Technical challenges are addressed in detail, as well as some examples and proposals. these examples and proposals are drawn from various board games, but the ideas can be applied to other problem domains.

关键词： Computer architecture Proposals Laboratories Search methods Hardware Microcomputers parallel processing Multiprocessing systems High-speed networks IP networks

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A perturbation-free replay platform for cross-optimized multithreaded applications

A perturbation-free replay platform for cross-optimized mult...

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international symposium on parallel and distributed processing (IPDPS)

作者： Jong-Deok Choi B. Alpern T. Ngo M. Sridharan J. Vlissides IBM Thomas J. Watson Research Center Yorktown Heights NY USA Department of Electrical Engineering andComputer Science Massachusetts Institute of Technology Cambridge MA USA

ISBN: (纸本)0769509908

Development of multithreaded applications is particularly tricky because of their non-deterministic execution behaviors. Tools that support the debugging and performance timing of such applications are needed. Key to the construction of such tools is the ability to repeat the nondeterministic execution behavior of a multithreaded application. A clean separation between the application and the system that runs it facilitates supporting that ability. this paper presents a platform for constructing such tools in a context in which any separation between the application and the underlying system (and between both and the platform's own instrumentation code) has been obscured. DejaVu supports deterministic replay of nondeterministic executions of multithreaded Java programs on the Jalapeno virtual machine (running on a uniprocessor). Jalapeno is written in Java and its optimizing compiler regularly integrates application, virtual machine, and DejaVu instrumentation code into unified machine-code sequences. DejaVu ensures deterministic replay through symmetric instrumentation-side-effect identical instrumentation in both record and replay modes-and remote reflection which exposes the state of an application without perturbing it.

关键词： Instruments Java Application software Debugging Runtime environment Virtual machining Optimizing compilers Reflection Computer science Buildings

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Trading off execution time for reliability in scheduling precedence-constrained tasks in heterogeneous computing

Trading off execution time for reliability in scheduling pre...

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international symposium on parallel and distributed processing (IPDPS)

作者： A. Dogan F. Ozguner Department of Electrical Engineering Ohio State Uinversity Columbus OH USA

ISBN: (纸本)0769509908

this paper investigates the problem of matching and scheduling of an application, which is composed of tasks with precedence constraints, to minimize both execution time and probability of failure of the application in a heterogeneous computing system. In general, however, it is impossible to satisfy both objectives at the same time because of conflicting requirements. the best one can do is to trade off execution time for reliability or vice versa, according to users' needs. Furthermore, there is a need for an algorithm which can assign tasks of an application to satisfy both of the objectives to some degree. Motivated from these facts, two different algorithms, which are capable of trading off execution time for reliability, are developed. To enable the proposed algorithms to account for the reliability of resources in the system, an expression which gives the reliability of the application under a given task assignment is derived. the simulation results are provided to validate the performance of the proposed algorithms.

关键词： Computer networks High performance computing Computer applications Condition monitoring Processor scheduling Computational modeling LAN interconnection High-speed networks Application software Computer architecture

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Production job scheduling for parallel shared memory systems

Production job scheduling for parallel shared memory systems

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international symposium on parallel and distributed processing (IPDPS)

作者： S.-H. Chiang M.K. Vernon Computer Sciences Department University of Wisconsin Madison USA

ISBN: (纸本)0769509908

this paper addresses open job scheduling questions for the challenge workloads that run on the large scale parallel systems at supercomputer centers. Simulation results for six recent one-month job traces from the NCSA Origin 2000 (O2K) system are used to evaluate (I) the experimentally tuned NCSA LSF* policy, (2) the FCFS-backfill policy, (3) the Priority-backfill policy with alternative priority functions and with limited pre-emption to provide immediate service to each arriving job, and (4) the spatial equipartitioning (EQspatial) policy with an optional modification to reduce the maximum waiting time for the largest jobs in the challenge workloads. Measurements on the O2K validate the simulation results for two of the policies. the priority-backfill policy with immediate service and a starvation-free priority measure that favors short jobs is shown to be the most promising if jobs cannot adapt to changing processor allocations at runtime, but EQspatial provides significantly better 95th percentile waiting time.

关键词： Job production systems Processor scheduling Large-scale systems Supercomputers Runtime Concurrent computing Computational modeling Time measurement High performance computing Laboratories

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Evaluation of the streams-C C-to-FPGA compiler: An applications perspective 01

Evaluation of the streams-C C-to-FPGA compiler: An applicati...

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2001 ACM/SIGDA 9th international Sysmposium on Field Programmable Gate Arrays (FPGA 2001)

作者： Frigo, J. Gokhale, M. Lavenier, D. Los Alamos National Laboratory Los Alamos NM 87545 United States

ISBN: (纸本)9781581133417

the Streams-C compiler ([5]) synthesizes hardware circuits for reconfigurable FPGA-based computers from parallel C programs. the Streams-C language consists of a small number of libraries and intrinsic functions added to a synthesizable subset of C, and supports a communicating process programming model. the processes may be either software or hardware processes, and the compiler manages communication among the processes transparently to the programmer. For the hardware processes, the compiler generates Register-Transfer-Level (RTL) VHDL, targeting multiple FPGAs with dedicated memories. For the software processes, a multi-threaded software program is generated. the Streams-C language and compiler offer a very high level of expressivity for reconfigurable computing application development, particularly for stream-processing applications. We find this is reflected in productivity, for a factor of up to 10 times improvement in time to produce a program. However, use of the tool in the "real world" is predicated on performance: only if such a compiler can deliver performance comparalble to hand-coded performance will it be used in practice. this paper presents an application study of the Streams-C compiler. Four applications have been written in Streams-C and compiled to the AMC Wildforce board containing Xilinx 4036's. those same applications have been hand-coded in a combination of RTL and structural VHDL. We compare performance of the generated code with the hand-optimized code. Our study shows that the compiler-generated designs are 1.37-4 times the area and 1/2-1 times the clock frequency of the hand designs. We find that the compiler, based on the SUIF infrastructure, can be greatly improved through various standard compiler optimizations that are not currently being exploited. thus we are currently rewriting a public domain version of Streams-C to better optimize and target the Virtex chip.

关键词： Field programmable gate arrays

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Checkpointing and rollback of wide-area distributed applications using mobile agents

Checkpointing and rollback of wide-area distributed applicat...

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international symposium on parallel and distributed processing (IPDPS)

作者： Jiannong Cao G.H. Chan Weijia jia T.S. Dillon Internet Computing and E-Commerce Lab Department of Computing Hong Kong Polytechnic University Hong Kong China Department of Computer Science City University of Hong Kong Hong Kong China

ISBN: (纸本)0769509908

We consider the problem of designing rollback error recovery algorithms for dynamic, wide area distributed systems like the Internet. the characteristics and the scale of such a system complicate the design and performance of the algorithms. Traditional message passing based algorithms incur large overhead, in both the network traffic and message passing delay, in such a wide-area environment. In this paper, we propose a novel approach to designing checkpointing and rollback algorithms using mobile agents as an aid. Using mobile agent leads to a reduction of the total amount of communication and allows us to design algorithms that take the advantage of the most up to date system information for decision making. It also allows us to develop algorithms implementing flexible and adaptive policies. A mobile agent enabled hybrid algorithm combining independent and coordinated checkpointing is proposed. A prototype of the algorithms is developed using IBM's Aglets. Results of performance evaluation are presented and discussed.

关键词： Checkpointing Algorithm design and analysis Mobile agents Message passing Heuristic algorithms Internet Telecommunication traffic Mobile communication Decision making Prototypes

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Efficient fine-grain sharing support for software DSMs through segmentation

Efficient fine-grain sharing support for software DSMs throu...

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international symposium on parallel and distributed processing (IPDPS)

作者： Yangwoo Roh Jaewoong Chung Cheol Ho Park Daeyeon Park Department of Electrical Engineering and Computer Science Korea Advanced Institute of Science and Technology Taejon South Korea

ISBN: (纸本)0769509908

Providing variable granularities is an attractive way to achieve good speedups for various classes of parallel applications. A few systems achieve this goal by instrumenting an application with the checking code for the state of shared data. Although these systems can provide arbitrary granularities flexibly, they have severe race conditions inherent to software-only approaches as well as the run-time overhead of the instrumentation. In this paper, we propose a new mechanism, which has low overhead and incurs no race conditions while providing variable granularities in software. the unique idea of our mechanism is to delegate the state checks to the segmentation hardware of the Intel X86. the instrumented code only maintains the state of shared data to use the segmentation hardware. Because the hardware atomically performs the required state checks and corresponding references, our mechanism is free from difficult race conditions. this feature efficiently enhances the response time to remote requests via an interrupt mechanism without additional synchronization overheads for avoiding race conditions. the run-time overhead further decreases owing to the reduced works to be done by software. the evaluation results show that our mechanism exhibits sufficiently low overhead even without any optimization.

关键词： Instruments Hardware Runtime Delay Protection Application software Microprocessors Workstations Programming profession parallel programming

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parallel fuzzy inference system for large volumes of remote sensing data

Parallel fuzzy inference system for large volumes of remote ...

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IEEE international symposium on Industrial Electronics (ISIE)

作者： Sang Gu Lee Department of Computer Engineering Hannam University South Korea

ISBN: (纸本)0780370902

In the pattern recognition on the large volume of satellite images, the inference time is much increased. In the remote sensing data having 4 wavebands, 778 training patterns are learned. Each land cover pattern is classified by using 159900 patterns including trained patterns. In the fuzzy classification, 778 fuzzy rules are generated. Each fuzzy rule has 4 fuzzy variables in the condition part. therefore, high performance parallel fuzzy inference architecture is needed. In this paper, we propose a novel parallel fuzzy inference system on a T3E parallel computer. In this, fuzzy rules are distributed and executed simultaneously. the ONE-To-ALL algorithm is used to broadcast the fuzzy input to the all nodes. the results of the MIN/MAX operations are transferred to the output processor by the ALL-TO-ONE algorithm. By parallel processing of the fuzzy rules, the parallel fuzzy inference algorithm extracts match parallelism and achieves a good speed factor. this system can be used in a large expert system that has many inference variables in the condition and the consequent part.

关键词： Fuzzy systems Remote sensing Fuzzy control Computer architecture Concurrent computing parallel processing Control systems Inference algorithms Expert systems Database systems

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An optimal software-pipelining method for instruction-level parallel processors based on scaled retiming

An optimal software-pipelining method for instruction-level ...

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international symposium on Image and Signal processing and Analysis

作者： F. Fernandez A. Sanchez A. Duarte Dept. Fotónica FI-UPM Campus Montegancedo Madrid Spain ESCET-URJC Campus de Móstoles Madrid Spain

ISBN: (纸本)9539676940

Software pipelining is an instruction-level loop scheduling method for achieving high performance fine-grain parallelism on VLIW (very long instruction word) processors. this paper presents a novel software pipelining method for non-pipelining parallel processors based on integer scaling and retiming transformations. this approach generalises and simplifies the analogous extended retiming model of T.W. O'Neil et al. (see Proc. ISCA 12th Int. Conf. parallel & distributed Computing Syst., p.292-7, 1999; Proc. of ICASSP'99 Conf., vol.4 p.2001-4, 1999). Matrix techniques are used in order to simplify the corresponding graph transformations. Some general properties taken from algebraic graph theory are applied in order to obtain general scheduling techniques: node and cycle methods. the two-phase scheduling method considered is first defined by means of two standard linear programming problems. We transform the corresponding problems into some variants of the maximum cost-to-time ratio problem and shortest path problem, in order to obtain efficient polynomial time algorithms. An example of software pipelining optimization of a digital correlator is also given.

关键词： Pipeline processing Processor scheduling VLIW Software performance parallel processing distributed computing Graph theory Linear programming Shortest path problem Polynomials

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Asynchronous parallel Evolutionary Algorithms for Optimizations

Asynchronous Parallel Evolutionary Algorithms for Optimizati...

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2001 international symposium on distributed Computing and applications to Business, Engineering and Science

作者： Hugo de Garis Starlab Brain Builder Group

Recently we proposed a Robust Evolutionary Algorithm for solving nonlinear programming(NLP) problems[4].It is an extension of Guo's algorithm[1],which possesses enhanced capabilities for solving NLP *** capabilities include:a) advancing the variable subspace,b) adding a search process over subspaces and normalized constraints,c) using an adaptive penalty function,and d) adding the ability to deal with integer NLP problems.0-1 NLP problems,and mixed-integer NLP problems which have equality *** this paper an asynchronous parallel evolutionary algorithm with scalable granularities for MIMD machines is designed by parallelizing the Robust Evolutionary Algorithm.A challenge NLP problem is chosen as the test *** experiments show that the new algorithm is very efficient and effective.

关键词： parallel algorithm Evolutionary Computation function optimization

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