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Reproducible, Accurately Rounded and Efficient BLAS 22nd

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22nd international European conference on parallel and Distributed Computing (Euro-Par)

作者： Chohra, Chemseddine Langlois, Philippe Parello, David Univ Perpignan Digits Architectures & Logiciels Informat Via Domitia Perpignan 66860 France Univ Montpellier II Lab Informat Robot & Microelect Montpellier UMR 5506 Montpellier 34095 France CNRS Paris France

ISBN: (纸本)9783319589435;9783319589428

Numerical reproducibility failures rise in parallel computation because floating-point summation is non-associative. Massively parallel and optimized executions dynamically modify the floating-point operation order. Hence, numerical results may change from one run to another. We propose to ensure reproducibility by extending as far as possible the IEEE-754 correct rounding property to larger operation sequences. We introduce our RARE-BLAS (Reproducible, Accurately Rounded and Efficient BLAS) that benefits from recent accurate and efficient summation algorithms. Solutions for level 1 (asum, dot and nrm2) and level 2 (gemv) routines are presented. their performance is studied compared to the Intel MKL library and other existing reproducible algorithms. For both shared and distributed memory parallel systems, we exhibit an extra-cost of 2x in the worst case scenario, which is satisfying for a wide range of applications. For Intel Xeon Phi accelerator a larger extra-cost (4x to 6x) is observed, which is still helpful at least for debugging and validation steps.

关键词： Digital arithmetic

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Automatic Generation of OpenCL Code for ARM architectures 22nd

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22nd international European conference on parallel and Distributed Computing (Euro-Par)

作者： Afonso, Sergio Acosta, Alejandro Almeida, Francisco Univ La Laguna San Cristobal De Laguna Spain

ISBN: (纸本)9783319589435;9783319589428

the efficient exploitation of the increasing computational capabilities of mobile devices is still a challenge. the heterogeneity of Systems on Chip (SoC) makes necessary a very specific knowledge of their hardware in order to harness their full potential. OpenCL is a well known standard for cross-platform usage of accelerator devices. We follow an annotation-based approach for solving the problem of high development cost of OpenCL programming for mobile devices. With our approach, the programmer can select from different programming models the one that offers the best performance for each section of the application. Computational results show that our automatically-generated OpenCL code can outperform Renderscript when running on the GPU of Android devices, making it the best choice for a range of parallel algorithms.

关键词： parallelizing compiler Source-to-source translation Annotation based OpenCL Android ARM

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Integrating Optical Transport Network Testbeds and Cloud Platforms to Enable End-to-End 5G and IoT Services 19

Integrating Optical Transport Network Testbeds and Cloud Pla...

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19th international conference on Transparent Optical Networks (ICTON)

作者： Munoz, Raul Vilalta, Ricard Casellas, Ramon Mayoral, Arturo Martinez, Ricardo CERCA CTTC Castelldefels Spain

ISBN: (纸本)9781538608593

this paper provides an overview of different experimental SDN/NFV control and orchestration architectures aiming at integrating the multi-layer (packet/optical) transport networks and distributed DC infrastructures (core cloud, edge computing) of the ADRENALINE testbed. the proposed SDN/NFV solutions enable the development and testing of end-to-end 5G and IoT services supporting a wide variety of use cases from different vertical industries, such as automotive, e-health, energy, media or smart cities. To this end, the ADRENALINE testbed is adopting the following technologies to meet the stringent requirements of 5G and IoT;i) high-capacity, flexible and cost/energy-efficient software-defined optical transmission technologies for access, metro and core networks;ii) highly-scalable packet technologies for aggregation and switching of flows with quality of service (QoS);iii) core datacenters and edge computing for the deployment of virtualized network functions (VNFs) and cloud services.

关键词： Estimation Field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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the Hardware Configuration Analysis for HPC processing and Interpretation of the Geological and Geophysical Data 11th

The Hardware Configuration Analysis for HPC Processing and I...

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11th international Scientific conference on parallel Computational Technologies (PCT)

作者： Tyutlyaeva, Ekaterina Konyukhov, Sergey Odintsov, Igor Moskovsky, Alexander ZAO RSC Technol Kutuzovskiy Av 36Bldg 23 Moscow 121170 Russia

ISBN: (纸本)9783319670355;9783319670348

the problems which arise during the gas-oil exploration process and require high-performance computing resources can be divided in two groups. the first group is seismic data processing, the second group is 3D reservoir simulating for the exploration process optimization. For the each group of problems typical applications used in real technological process were chosen, and their behavior was examined on different computational architectures. Performed analysis shows that the applications of the first group have good scalability potential on the studied computational platforms, meanwhile for the applications of the second group the limit of the performance increasing is reached relatively fast.

关键词： Performance analysis Architecture comparison Profiling

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Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA 2017

Hardware Acceleration of the Tracking Learning Detection (TL...

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11th international conference on Distributed Smart Cameras (ICDSC)

作者： Abdali, El Mehdi Hanniche, Abderrahmane Walid Pelcat, Maxime Diguet, Jean-Philippe Berry, Francois Inst Pascal UMR CNRS 6602 Aubiere France Univ Clermont Auvergne Aubiere France INSA Rennes IETR UMR CNRS 6164 Rennes France UMR CNRS 3192 Lab STICC Lorient France

ISBN: (纸本)9781450354875

Robust object tracking is a crucial enabler of many computer vision applications. An embedded object tracker must, in addition to respecting real-time requirements, robustly update the position of the tracked object in the captured images and be able to re-identify the object when it reappears after disappearing for a number of frames. To obtain such a robustness, modern algorithms such as the Tracking Learning Detection (TLD) combine classical tracking techniques with learning capabilities. this combination makes it possible to track an object's displacement, learn its new appearances when it changes orientation and re-identify it once it reappears. the strong performances of these techniques are obtained using costly computation that challenges hardware capabilities in the context of embedded architectures. this paper proposes a strategy for porting the TLD algorithm on an Field-Programmable Gate Array (FPGA). Based on parallel image resizing and selective object patch rejection, the proposed dataflow-oriented strategy demonstrates how the structure of the algorithm can be adapted to be more streaming-oriented and fit the structure of an FPGA. the results prove a tracking performance of up to 160 fps under 50Mhz for VGA images while keeping nearly the tracking robustness of the reference algorithm implementation.

关键词： FPGA Image processing Tracking Learning Detection Dataflow

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Balanced Graph Partition Refinement using the Graph p-Laplacian 18

Balanced Graph Partition Refinement using the Graph p-Laplac...

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5th Platform for Advanced Scientific Computing conference (PASC)

作者： Simpson, Toby Pasadakis, Dimosthenis Kourounis, Drosos Fujita, Kohei Yamaguchi, Takuma Ichimura, Tsuyoshi Schenk, Olaf Univ Svizzera Italiana Inst Computat Sci Lugano Switzerland Univ Tokyo Earthquake Res Inst Tokyo Japan Univ Tokyo Dept Civil Engn Tokyo Japan RIKEN Adv Inst Computat Sci Tokyo Japan

ISBN: (纸本)9781450358910

A continuous formulation of the optimal 2-way graph partitioning based on the p-norm minimization of the graph Laplacian Rayleigh quotient is presented, which provides a sharp approximation to the balanced graph partitioning problem, the optimality of which is known to be NP-hard. the minimization is initialized from a cut provided by a state-of-the-art multilevel recursive bisection algorithm, and then a continuation approach reduces the p-norm from a 2-norm towards a 1-norm, employing for each value of p a feasibility-preserving steepest-descent method that converges on the p-Laplacian eigenvector. A filter favors iterates advancing towards minimum edgecut and partition load imbalance. the complexity of the suggested approach is linear in graph edges. the simplicity of the steepest-descent algorithm renders the overall approach highly scalable and efficient in parallel distributed architectures. parallel implementation of recursive bisection on multi-core CPUs and GPUs are presented for large-scale graphs with up to 1.9 billion tetrahedra. the suggested approach exhibits improvements of up to 52.8% over METIS for graphs originating from triangular Delaunay meshes, 34.7% over METIS and 21.9% over KaHIP for power network graphs, 40.8% over METIS and 20.6% over KaHIP for sparse matrix graphs, and finally 93.2% over METIS for graphs emerging from social networks.

关键词： Combinatorial mathematics Graph theory Spectral Methods parallel processing

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processing Redundancy in UML Diagrams Based on Knowledge Graph 8th

Processing Redundancy in UML Diagrams Based on Knowledge Gra...

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8th international Symposium on parallel architectures, algorithms, and Programming (PAAP)

作者： Jiang, Yirui Duan, Yucong Huang, Mengxing Chen, Mingrui Li, Jingbin Zhou, Hui Hainan Univ Haikou Hainan Peoples R China

ISBN: (纸本)9789811064425;9789811064418

UML (Unified Modeling Language) is designed for all stages of software development, but it lacks precise semantic information. MDE (Model-driven engineering) takes the model as the primary software product and its main research direction is modeling and model transformation. We propose to explore the entity abstraction scenario where no existing classes fit as the representative entity for other classes through the data, information and knowledge recreation of existing classes and relationships with the introduction of knowledge graphs. In this paper, we proposed a knowledge graph to enhance model design between models.

关键词： UML MDE Redundancy Knowledge graph Diagram

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5th World conference on Information Systems and Technologies, WorldCIST 2017

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5th World conference on Information Systems and Technologies, WorldCIST

ISBN: (纸本)9783319565347

the proceedings contain 90 papers. the special focus in this conference is on Information Systems and Technologies. the topics include: System dynamics modeling for the complexity of knowledge creation within adaptive large programs management;data base processing programs with using extended base semantic hypergraph;assessment of academic digital platform through social networks in economics degree;selection of information sources using a genetic algorithm;knowledge management and engineering approach concepts to capture organizational learning networks;detection of troublesome cases;semantic capture analysis in word embedding vectors using convolutional neural network;describing and comparing big data querying tools;artificial neural network for incremental data mining;detecting malicious components in large-scale internet-of-things systems and architectures;trajectory learning using principal component analysis;a recommendation system for online courses;a combination of regression techniques and cuckoo search algorithm for FOREX speculation;decision support systems based on knowledge management;exercise generation on language specification;automatic parallel data mining after bilingual document alignment;anti-bribery quantitative model for information systems based on human subjectivity;air dehumidifier controlled by arduino using peltier;life cycle of virtual organizations in the Czech republic;a governance model for managing lightweight IT;dynamic web information foraging using self-interested agents;open source CRM tools for small companies;assessment of risk-based process models in academic environment and an approach for examining the value of open data solutions.

关键词： Data handling

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Application of RFID and Path Planning Algorithm for Locating Products in a Wholesale Market 5

Application of RFID and Path Planning Algorithm for Locating...

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5th IEEE international conference on Advances in Computing, Communication and Control (ICAC3)

作者： Mukhopadhyay, Debajyoti Barsakar, Trupti Inamdar, Anuja Yelnare, Vaidehi Gundecha, Nirali Maharashtra Inst Technol Dept Informat Technol Pune Maharashtra India

ISBN: (纸本)9781538638521

Inventory management and supply chain are areas which have strong potential to benefit from Radio Frequency Identification technology. In the premises of a wholesale market, location tracking of a product itself becomes challenging for the buyers. the implemented application will help the buyer to locate required product and find the shortest path from his location to the product's location. this will help him to locate the product in optimum time, thus saving his efforts in searching the product manually. the location tracking is developed with the RFID technology and shortest path is obtained through Digital Image processing.

关键词： Radio Frequency Identification (RFID) A* algorithm Location Identification Internet of things (IoT) Optimum Path finding Message Passing Interface(MPI) parallel Bidirectional Search(PBS) Received Signal Strength Indicator(RSSI) Graphical User Interface(GUI) Radio Frequency (RF) Attention(AT) Electronic Product Code(EPC) System-On-Chip(SOC)

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Greed Is Good: parallel algorithms for Bipartite-Graph Partial Coloring on Multicore architectures

Greed Is Good: Parallel Algorithms for Bipartite-Graph Parti...

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international conference on parallel processing (ICPP)

作者： Mustafa Kemal Taş Kamer Kaya Erik Saule Computer Science and Engineering Sabanci University Istanbul Turkey

In parallel computing, a valid graph coloring yields a lock-free processing of the colored tasks, data points, etc., without expensive synchronization mechanisms. However, coloring is not free and the overhead can be significant. In particular, for the bipartite-graph partial coloring (BGPC) and distance-2 graph coloring (D2GC) problems, which have various use-cases within the scientific computing and numerical optimization domains, the coloring overhead can be in the order of minutes with a single thread for many real-life *** this work, we propose parallel algorithms for bipartite-graph partial coloring on shared-memory architectures. Compared to the existing shared-memory BGPC algorithms, the proposed ones employ greedier and more optimistic techniques that yield a better parallel coloring performance. In particular, on 16 cores, the proposed algorithms are more than 4x faster than their counterparts in the ColPack library which is, to the best of our knowledge, the only publicly-available coloring library for multicore architectures. In addition to BGPC, the proposed techniques are employed to devise parallel distance-2 graph coloring algorithms and similar performance improvements have been observed. Finally, we propose two costless balancing heuristics for BGPC that can reduce the skewness and imbalance on the cardinality of color sets (almost) for free. the heuristics can also be used for the D2GC problem and in general, they will probably yield a better color-based parallelization performance especially on many-core architectures.

关键词： Color Image color analysis Libraries Multicore processing Bipartite graph parallel processing

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