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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

15th International Conference on Algorithms and Architecture...

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

ISBN: (纸本)9783319271392

the proceedings contain 59 papers. the special focus in this conference is on Software Systems, Programming Models, Performance Modeling and Evaluation. the topics include: A scalable fault-tolerance programing model on MIC cluster;multi-chunk redundant array of independent SSDS with improved performance;an energy efficient storage system for astronomical observation data on dome a;parallel aware hybrid solid-state storage;automatic optimization of software transactional memory through linear regression and decision tree;a data-centric tool to improve the performance of multithreaded program on NUMA;a light-weight hot data identification scheme via grouping-based LRU lists;towards interactive programming with parallel linear algebra in r;enhancing i/o scheduler performance by exploiting internal parallelism of SSDS;a performance and scalability analysis of the MPI based tools utilized in a large ice sheet model executing in a multicore environment;an efficient algorithm for a generalized LCS problem;on exploring a quantum particle swarm optimization method for urban traffic light scheduling;identifying repeated interleavings to improve the efficiency of concurrency bug detection;global reliability evaluation for cloud storage systems with proactive fault tolerance;performance evaluation and optimization of Wi-Fi display on android;a novel scheduling algorithm for file fetch in transparent computing;joint power and reduced spectral leakage-based resource allocation for d2d communications in 5G and an optimization strategy of energy consumption for data transmission based on optimal stopping theory in mobile networks.

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

15th International Conference on Algorithms and Architecture...

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

ISBN: (纸本)9783319271361

the proceedings contain 59 papers. the special focus in this conference is on Applications of parallel and Distributed Computing. the topics include: On exploring a virtual agent negotiation inspired approach for route guidance in urban traffic networks;optimization of binomial option pricing on intel MIC heterogeneous system;stencil computations on HPC-oriented ARMv8 64-bit multi-core processor;a particle swarm optimization algorithm for controller placement problem in software defined network;a streaming execution method for multi-services in mobile cloud computing;economy-oriented deadline scheduling policy for render system using IaaS cloud;towards detailed tissue-scale 3D simulations of electrical activity and calcium handling in the human cardiac ventricle;task parallel implementation of matrix multiplication on multi-socket multi-core architectures;refactoring for separation of concurrent concerns;exploiting scalable parallelism for remote sensing analysis models by data transformation graph;resource-efficient vibration data collection in cyber-physical systems;a new approach for vehicle recognition and tracking in multi-camera traffic system;a scalable distributed fingerprint identification system;energy saving and load balancing for SDN based on multi-objective particle swarm optimization;pre-stack kirchhoff time migration on hadoop and spark;a cyber physical system with GPU for CNC applications;a solution of the controller placement problem in software defined networks;parallel column subset selection of kernel matrix for scaling up support vector machines;real-time deconvolution with GPU and spark for big imaging data analysis and parallel kirchhoff pre-stack depth migration on large high performance clusters.

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

15th International Conference on Algorithms and Architecture...

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

ISBN: (纸本)9783319271217

the proceedings contain 52 papers. the special focus in this conference is on Big Data and Its Applications. the topics include: Preference-aware HDFS for hybrid storage;urban traffic congestion prediction using floating car trajectory data;a metadata cooperative caching architecture based on SSD and DRAM for file systems;parallel training GBRT based on kmeans histogram approximation for big data;an intelligent clustering algorithm based on mutual reinforcement;an effective method for gender classification with convolutional neural networks;a highly efficient indexing and retrieving method for astronomical big data of time series images;specialized FPGA-based accelerator architecture for data-intensive k-means algorithms;effectively identifying hot data in large-scale I/O streams with enhanced temporal locality;a search-efficient hybrid storage system for massive text data;enhancing parallel data loading for large scale scientific database;tradeoff between the price of distributing a database and its collusion resistance based on concatenated codes;a mapreduce reinforced distributed sequential pattern mining algorithm;a fast documents classification method based on simhash;identification of natural images and computer generated graphics using multi-fractal differences of PRNU;enriching document representation with the deviations of word co-occurrence frequencies;big data analytics and visualization with spatio-temporal correlations for traffic accidents;a novel app recommendation method based on SVD and social influence;a segmentation hybrid index structure for temporal data and a refactored content-aware host-side SSD cache.

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parallelism hardware computation for Artificial Neural Network

Parallelism hardware computation for Artificial Neural Netwo...

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IEEE/ACS international conference on Computer Systems and Applications

作者： GAM Marwa Boubaker Mohamed Chalbi Najoua Bedoui Mohamed Hedi ENISO Université de Monastir LabTIM Université de Monastir Monastir Tunisie

this paper presents an optimizing methodology for the implementation of a Learning Vector Quantization (LVQ) Artificial Neural Network (ANN). Starting from a high-level algorithmic specification, we suggest a design methodology of the LVQ-dedicated architecture. Our approach is based on the creation of partially parallel architectures to optimize the performance of our ANN for different topologies. In this manuscript, we used parallelism for the supervisor part of the application, which is responsible for calculating minimum distances, weights and labels, to solve the problems of application delay and the power consumed. In this work we integrate the Partial Dynamic Reconfiguration (PDR) to facilitate the use of different architectures by the user. the latter can implement the architecture and performance that suits their need. therefore, our approach has reduced the latency of parallel architectures with respect to the sequential architecture of an LVQ for variable topologies. To validate our approach, the optimized LVQ implementation was tried on the Zynq device.

关键词： Artificial neural networks Computer architecture Heuristic algorithms parallel processing Topology Neurons Hardware

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

15th International Conference on Algorithms and Architecture...

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

ISBN: (纸本)9783319271187

the proceedings contain 58 papers. the special focus in this conference is on parallel and Distributed architectures. the topics include: parallelizing block cryptography algorithms on speculative multicores;performance characterization and optimization for intel xeon phi coprocessor;an extended MDS code to improve single write performance of disk arrays for correcting triple disk failures;a distributed location-based service discovery protocol for vehicular ad-hoc networks;unified virtual memory support for deep CNN accelerator on SoC FPGA;dynamic time slice scheduler for virtual machine monitor;memory-aware NoC application mapping based on adaptive genetic algorithm;a study on non-volatile 3D stacked memory for big data applications;parallel implementation of dense optical flow computation on many-core processor;a power-conserving online scheduling scheme for video streaming services;prevent deadlock and remove blocking for self-timed systems;improving the memory efficiency of in-memory mapreduce based HPC systems;dual best-first search mapping algorithm for shared-cache multicore processors;energy efficient network-on-chip router with heterogeneous virtual channels;availability and network-aware mapreduce task scheduling over the internet;an optimized algorithm based on CRS codes in big data storage systems;quantum computer simulation on multi-GPU incorporating data locality;query execution optimization based on incremental update in database distributed middleware;coding-based cooperative caching in data broadcast environments;usage history-directed power management for smartphones;a mobile application distribution method and a clustering algorithm based on rough sets for the recommendation domain in trust-based access control.

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Compiling and Optimizing OpenMP 4.X Programs to OpenCL and SPIR 13th

Compiling and Optimizing OpenMP 4.X Programs to OpenCL and S...

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13th international Workshop on OpenMP (IWOMP)

作者： Pereira, Marcio M. Sousa, Rafael C. F. Araujo, Guido Univ Estadual Campinas UNICAMP Inst Comp Campinas Brazil

ISBN: (纸本)9783319655789;9783319655772

Given their massively parallel computing capabilities heterogeneous architectures comprised of CPUs and accelerators have been increasingly used to speed-up scientific and engineering applications. Nevertheless, programming such architectures is a challenging task for most non-expert programmers as typical accelerator programming languages (e.g. CUDA and OpenCL) demand a thoroughly understanding of the underlying hardware to enable an effective application speedup. To achieve that, programmers are usually required to significantly change and adapt program structures and algorithms, thus impacting both performance and productivity. A simpler alternative is to use highlevel directive-based programming models like OpenACC and OpenMP. these models allow programmers to insert both directives and runtime calls into existing source code, thus providing hints to the compiler and runtime to perform certain transformations and optimizations on the annotated code regions. In this paper, we present ACLang, an opensource LLVM/Clang compiler framework (http://***) that implements the recently released OpenMP 4.X Accelerator Programming Model. ACLang automatically converts OpenMP 4.X annotated program regions into OpenCL/SPIR kernels, while providing a set of polyhedral based optimizations like tiling and vectorization. OpenCL kernels resulting from ACLang can be executed on any OpenCL/SPIR compatible acceleration device, not only GPUs, but also FPGA accelerators like those found in the Intel HARP architecture. To the best of our knowledge and at the time this paper was written, this is the first LLVM/Clang implementation of the OpenMP 4.X Accelerator Model that provides a source-to-target OpenCL conversion. Experiments using ACLang on the Polybench benchmark reveal speed-ups of up to 30x on an Exynos 8890 Octacore CPU with a ARM Mali-T880 MP12 GPU, up to 62x on a 2.4GHz dual-core Intel Core i5 processor equipped with an Intel Iris GPU unit, and up to 112x on a 2.1 GHz

关键词： Graphics processing unit

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A Machine Learning Approach for Efficient parallel Simulation of Beam Dynamics on GPUs

A Machine Learning Approach for Efficient Parallel Simulatio...

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international conference on parallel processing (ICPP)

作者： Kamesh Arumugam Desh Ranjan Mohammad Zubair Balša Terzić Alexander Godunov Tunazzina Islam Center for Accelerator Science Old Dominion University Norfolk Virginia Department of Physics Old Dominion University Norfolk Virginia

parallel computing architectures like GPUs have traditionally been used to accelerate applications with dense and highly-structured workloads; however, many important applications in science and engineering are irregular and dynamic in nature, making their effective parallel implementation a daunting task. Numerical simulation of charged particle beam dynamics is one such application where the distribution of work and data in the accurate computation of collective effects at each time step is irregular and exhibits control-flow and memory access patterns that are not readily amenable to GPU's architecture. algorithms with these properties tend to present both significant branch and memory divergence on GPUs which leads to severe performance *** present a novel cache-aware algorithm that uses machine learning to address this problem. the algorithm presented here uses supervised learning to adaptively model and track irregular access patterns in the computation of collective effects at each time step of the simulation to anticipate the future control-flow and data access patterns. Access pattern forecast are then used to formulate runtime decisions that minimize branch and memory divergence on GPUs, thereby improving the performance of collective effects computation at a future time step based on the observations from earlier time steps. Experimental results on NVIDIA Tesla K40 GPU shows that our approach is effective in maximizing data reuse, ensuring workload balance among parallel threads, and in minimizing both branch and memory divergence. Further, the parallel implementation delivers up to 485 Gflops of double precision performance, which translates to a speedup of up to 2.5X compared to the fastest known GPU implementation.

关键词： Computational modeling Data models Heuristic algorithms Graphics processing units Predictive models Two dimensional displays Instruction sets

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Low-Power architectures for miRNA-Target Genome Wide Analysis

Low-Power Architectures for miRNA-Target Genome Wide Analysi...

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Euromicro conference on parallel, Distributed and Network-Based processing

作者： Stefano Beretta Lucia Morganti Elena Corni Andrea Ferraro Daniele Cesini Daniele D'Agostino Luciano Milanesi Ivan Merelli Istituto di Tecnologie Biomediche Consiglio Nazionale delle Ricerche Segrate Lombardia IT Italian Inst. for Nucl. Phys. Bologna Italy Inst. for Appl. Math. & Inf. Technol. “E. Magenes” Genoa Italy

ISBN: (纸本)9781509060597

In molecular biology, the interaction mechanisms between microRNAs (miRNAs) with their messenger RNA targets are poorly understood. this is the reason why many miRNA-target prediction methods are available, but their results are often inconsistent. A lot of efforts focus on the quality of the sequence match between miRNA and target rather than on the role of the mRNA secondary structure in which the target is embedded. Nonetheless, it is known that the miRNA secondary structures contribute to target recognition, because there is an energetic cost to freeing base-pairing interactions within mRNA to make the target accessible for miRNA binding. this approach is implemented by PITA (Probability of Interaction by Target Accessibility), a very computational-intensive tool that is able to provide accurate results even when little is know about the conservation of the miRNA. In this paper we propose a new implementation of PITA, called lPITA, able to exploit a coarse-grained parallelism over low power architectures to reduce both execution times and the power consumption.

关键词： Computer architecture Prediction algorithms Genomics Bioinformatics RNA Power demand Master-slave

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Application of Multi-core Architecture to the MPDRoot Package for the Task ToF Events Reconstruction 17th

Application of Multi-core Architecture to the MPDRoot Packag...

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17th international conference on Computational Science and its Applications (ICCSA)

作者： Iakushkin, Oleg Fatkina, Anna Degtyarev, Alexander Grishkin, Valery St Petersburg State Univ St Petersburg 199034 Russia

ISBN: (纸本)9783319624044;9783319624037

In this article, we propose an approach that allows acceleration of the Time-of-Flight (ToF) event reconstruction algorithm implementation, which is a part of the Multi Purpose Detector (MPD) Root application. Work on the algorithm was carried out in several stages: the program was assembled on the target devices (Intel Xeon E5-2690v3 and E5-2695 v2);Profiling via Valgrind was performed;We selected a code snippet whose execution takes the longest time;Several algorithms for parallelizing code were investigated and the optimal strategy of code enhancement for the equipment in question was implemented. Modification of the selected code fragment was carried out using the OpenMP standard. It is widely used in scientific applications, including the reconstruction of events in the PANDA experiment, and has proven to be useful for work in Multi-Core architecture. the standard is supported by the GCC compiler used to build the MpdRoot framework, which makes it possible to integrate this technology into a fragment of the MpdRoot package without changing the structure or build options of the framework. Due to our optimizations, the algorithm was accelerated on MultiCore architectures at hand. Paper depicts the direct dependence of the accelerated fragment execution time to the amount of given cores for a given amount of input data. Tests were conducted on the nodes of the heterogeneous cluster JINR "HybriLIT" and cloud node Windows Azure NC12. the paper analyzes the possibilities of optimizing the code for Intel Xeon Phi coprocessors and the problems that we encountered while trying to implement these optimizations.

关键词： ToF MPD parallel computing OpenMP Reconstruction

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parallel Algorithm Design for Audio Feature Extraction

Parallel Algorithm Design for Audio Feature Extraction

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2017 5th international conference on Machinery,Materials and Computing Technology(ICMMCT 2017)

作者： Xiaocheng Luo Jingfei Jiang Junjie Zhu Yong Dou National Laboratory for Parallel and Distributed Processing National University of Defense Technology

Audio feature extraction is a very important technique in the field of sound processing. It extremely impacts the effectiveness and correctness of sound recognition, sound verification, etc. It is a computation intensive stage in the whole sound recognition process, which is a challenging for acceleration. In this paper, a coarse-grained parallel feature extraction algorithm for high throughput of audio slices is proposed to improve the efficiency of audio feature extraction. three typical audio feature extraction algorithms, Mel Frequency Cepstrum Coefficients(MFCC), Spectrogram image features(SIF), Octave-Based Spectral Contrast, are chosen to parallelize. Experiments results on different platforms show that the speedup of accelerated audio feature extraction is up to 17.23 on the platform with 16 cores 32 threads.

关键词： Feature Extraction Sound Recognition parallel Algorithm

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