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检索条件"任意字段=5th International Conference on Algorithms and Architectures for Parallel Processing"

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Creating Distributed Execution Plans with BobolangNG 16th

Creating Distributed Execution Plans with BobolangNG

引用

16th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Bednarek, David Krulis, Martin Yaghob, Jakub Zavoral, Filip Charles Univ Prague Fac Math & Phys Parallel Architectures Algorithms Applicat Res Gr Malostranske Nam 25 Prague Czech Republic

ISBN: (纸本)9783319495835;9783319495828

Execution plans constitute the traditional interface between DBMS front-ends and back-ends;similar networks of interconnected operators are found also outside database systems. Tasks like adapting execution plans for distributed or heterogeneous runtime environments require a plan transformation mechanism which is simple enough to produce predictable results while general enough to express advanced communication schemes required for instance in skew-resistant partitioning. In this paper, we describe the BobolangNG language designed to express execution plans as well as their transformations, based on hierarchical models known from many environments but enhanced with a novel compile-time mechanism of component multiplication. Compared to approaches based on general graph rewriting, the plan transformation in BobolangNG is not iterative;therefore the consequences and limitations of the process are easier to understand and the development of distribution strategies and experimenting with distributed plans are easier and safer.

关键词： Execution plan Distributed computing Partitioning Distributed database Datalog Modeling language

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Auto-Tuning TRSM with an Asynchronous Task Assignment Model on Multicore, Multi-GPU and Coprocessor systems 13

Auto-Tuning TRSM with an Asynchronous Task Assignment Model ...

引用

13th IEEE/ACS international conference on Computer Systems and Applications (AICCSA)

作者： Pinto, Clicia Barreto, Marcos Boratto, Murilo Univ Fed Bahia UFBA Lab Sistemas Distribuidos Salvador BA Brazil Univ Estado Bahia UNFB Nucleo Arquitetura Comp & Sistemas Operacionais Salvador BA Brazil

ISBN: (纸本)9781509043200

the increasing need for computing power today justifies the continuous search for techniques that decrease the time to answer usual computational problems. To take advantage of new hybrid parallel architectures composed by multithreading and multiprocessor hardware, our current efforts involve the design and validation of highly parallel algorithms that efficently explore the characteristics of such architectures. In this paper, we propose an automatic tuning methodology to easily exploit multicore, multi- GPU and coprocessor systems. We present an optimization of an algorithm for solving triangular systems (TRSM), based on block decomposition and asynchronous task assignment, and discuss some results.

关键词： Graphics processing unit

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A parallel Model for Heterogeneous Cluster 16th

A Parallel Model for Heterogeneous Cluster

引用

16th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Soares, thiago Marques dos Santos, Rodrigo Weber Lobosco, Marcelo Univ Fed Juiz de Fora Juiz De Fora Brazil

ISBN: (纸本)9783319499567;9783319499550

the LogP model was used to measure the effects of latency, occupancy and bandwidth on distributed memory multiprocessors. the idea was to characterize distributed memory multiprocessor using these key parameters, studying their impacts on performance in simulation environments. this work proposes a new model, based on LogP, that describes the impacts on performance of applications executing on a heterogeneous cluster. this model can be used, in a near future, to help choose the best way to split a parallel application to be executed on this architecture. the model considers that a heterogeneous cluster is composed by distinct types of processors, accelerators and networks.

关键词： Performance modeling parallel architectures Heterogeneous clusters Scheduling

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Optimized GPU Implementation for Dynamic Programming in Image Data processing 35

Optimized GPU Implementation for Dynamic Programming in Imag...

引用

35th IEEE international Performance Computing and Communications conference (IPCCC)

作者： Ke, Jing Bednarz, Tomasz Sowmya, Arcot Univ New South Wales DATA CSIRO 61 Sydney NSW Australia CSIRO DATA 61 Sydney NSW Australia Univ New South Wales Sch Comp Sci & Engn Sydney NSW Australia

ISBN: (纸本)9781509052523

It is a trend now that computing power through parallelism is provided by multi-core systems or heterogeneous architectures for High Performance Computing (HPC) and scientific computing. Although many algorithms have been proposed and implemented using sequential computing, alternative parallel solutions provide more suitable and high performance solutions to the same problems. In this paper, three parallelization strategies are proposed and implemented for a dynamic programming based cloud smoothing application, using both shared memory and non-shared memory approaches. the experiments are performed on NVIDIA GeForce GT750m and Tesla K20m, two GPU accelerators of Kepler architecture. Detailed performance analysis is presented on partition granularity at block and thread levels, memory access efficiency and computational complexity. the evaluations described show high approximation of results with high efficiency in the parallel implementations, and these strategies can be adopted in similar data analysis and processing applications.

关键词： GPU parallel algorithms shared memory performance profile computational complexity dynamic programming image processing

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algorithms and architectures for parallel processing: ICA3PP 2016 collocated workshops: SCDT, TAPEMS, BigTrust, UCER, DLMCS Granada, Spain, December 14-16, 2016 proceedings 16th

Algorithms and architectures for parallel processing: ICA3PP...

引用

16th international conference on algorithms and architectures for parallel processing - ICA3PP 2016 Collocated Workshops: 1st Workshop on Supercomputing Co-Design Technology, SCDT-2016, 1st international Workshop on theoretical Approaches to Performance Evaluation, Modeling and Simulation, TAPEMS 2016, 1st international Workshop on Trust, Security and Privacy for Big Data, BigTrust 2016, 1st edition of the workshop on Ultrascale Computing for Early Researchers, UCER 2016 and 1st international Workshop on Data Locality in Modern Computing Systems, DLMCS 2016

作者： Carretero, Jesus

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Efficient parallel Algorithm for Optimal DAG Structure Search on parallel Computer with Torus Network 16th

Efficient Parallel Algorithm for Optimal DAG Structure Searc...

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16th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Honda, Hirokazu Tamada, Yoshinori Suda, Reiji Univ Tokyo Grad Sch Informat Sci & Technol Tokyo 1138656 Japan

ISBN: (纸本)9783319495835;9783319495828

the optimal directed acyclic graph search problem constitutes searching for a DAG with a minimum score, where the score of a DAG is defined on its structure. this problem is known to be NP-hard, and the state-of-the-art algorithm requires exponential time and space. It is thus not feasible to solve large instances using a single processor. Some parallel algorithms have therefore been developed to solve larger instances. A recently proposed parallel algorithm can solve an instance of 33 vertices, and this is the largest solved size reported thus far. In the study presented in this paper, we developed a novel parallel algorithm designed specifically to operate on a parallel computer with a torus network. Our algorithm crucially exploits the torus network structure, thereby obtaining good scalability. through computational experiments, we confirmed that a run of our proposed method using up to 20,736 cores showed a parallelization efficiency of 0.94 as compared to a 1296-core run. Finally, we successfully computed an optimal DAG structure for an instance of 36 vertices, which is the largest solved size reported in the literature.

关键词： Optimal DAG structure Optimal bayesian network structure parallel algorithm Distributed algorithm Torus network

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Challenges in Large-Graph processing: A Vision 5

Challenges in Large-Graph Processing: A Vision

引用

5th international conference on Computer Science and Network Technology (ICCSNT)

作者： Wang, Jing Wu, Qingbo Dai, Huadong Tan, Yusong Natl Univ Def Technol Sch Comp Sci Changsha Hunan Peoples R China

ISBN: (纸本)9781509021291

As a representation of high connected objects, graphs receive a arising attention. By virtue of the interconnection of graph data, current general-purpose parallel data processing systems misfit effectively graph processing. thus, a wide spectrum of dedicated graph processing system emerged. In this paper, we give a guidance of classical types of graph processing system. We discuss key features and the according challenges of graph processing from the aspect of graph data, graph algorithm as well as the computation implementation. then we specify four strategies that should be taken into account when designing a graph processing systems. In the last part of our paper we make a comparison of present typical graph processing systems and specify their suitable application area.

关键词： graph computing large-graph processing graph processing system

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Light Loss-Less Data Compression, with GPU Implementation 16th

Light Loss-Less Data Compression, with GPU Implementation

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16th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Funasaka, Shunji Nakano, Koji Ito, Yasuaki Hiroshima Univ Dept Informat Engn Kagamiyama 1-4-1 Higashihiroshima 7398527 Japan

ISBN: (纸本)9783319495835;9783319495828

there is no doubt that data compression is very important in computer engineering. However, most lossless data compression and decompression algorithms are very hard to parallelize, because they use dictionaries updated sequentially. the main contribution of this paper is to present a new lossless data compression method that we call Light Loss-Less (LLL) compression. It is designed so that decompression can be highly parallelized and run very efficiently on the GPU. this makes sense for many applications in which compressed data is read and decompressed many times and decompression performed more frequently than compression. We show optimal sequential and parallel algorithms for LLL decompression and implement them to run on Core i7-4790 CPU and GeForce GTX 1080 GPU, respectively. To show the potentiality of LLL compression method, we have evaluated the running time using five images and compared with well-known compression methods LZW and LZSS. Our GPU implementation of LLL decompression runs 91.1-176 times faster than the CPU implementation. Also, the running time on the GPU of our experiments show that LLL decompression is 2.49-9.13 times faster than LZW decompression and 4.30-14.1 times faster that LZSS decompression, although their compression ratios are comparable.

关键词： Data compression parallel algorithms GPGPU

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GPU-Based Heterogeneous Coding Architecture for HEVC 16th

GPU-Based Heterogeneous Coding Architecture for HEVC

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16th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Cebrian-Marquez, Gabriel Migallon, Hector Luis Martinez, Jose Lopez-Granado, Otoniel Pinol, Pablo Cuenca, Pedro Univ Castilla La Mancha Albacete Res Inst Informat I3A Plz Univ 2 Albacete 02071 Spain Miguel Hernandez Univ Dept Phys & Comp Architecture Elche 03202 Spain

ISBN: (纸本)9783319495835;9783319495828

the High Efficiency Video Coding (HEVC) standard has nearly doubled the compression efficiency of prior standards. Nonetheless, this increase in coding efficiency involves a notably higher computing complexity that should be overcome in order to achieve real-time encoding. For this reason, this paper focuses on applying parallel processing techniques to the HEVC encoder with the aim of reducing significantly its computational cost without affecting the compression performance. Firstly, we propose a coarse-grained slice-based parallelization technique that is executed in a multi-core CPU, and then, with finer level of parallelism, a GPU-based motion estimation algorithm. Both techniques define a heterogeneous parallel coding architecture for HEVC. Results show that speed-ups of up to 4.06x can be obtained on a quad-core platform with low impact in coding performance.

关键词： H.265 HEVC Heterogeneous parallel encoding GPU

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parallel k-Means++ for Multiple Shared-Memory architectures 45

Parallel k-Means++ for Multiple Shared-Memory Architectures

引用

45th international conference on parallel processing, ICPP 2016

作者： MacKey, Patrick Lewis, Robert R. Pacific Northwest National Laboratory RichlandWA99352 United States Washington State University RichlandWA99354 United States

ISBN: (纸本)9781509028238

In recent years k-means++ has become a popular initialization technique for improved k-means clustering. To date, most of the work done to improve its performance has involved parallelizing algorithms that are only approximations of k-means++. In this paper we present a parallelization of the exact k-means++ algorithm, with a proof of its correctness. We develop implementations for three distinct shared-memory architectures: multicore CPU, high performance GPU, and the massively multithreaded Cray XMT platform. We demonstrate the scalability of the algorithm on each platform. In addition we present a visual approach for showing which platform performed k-means++ the fastest for varying data sizes. © 2016 IEEE.

关键词： Clustering algorithms

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