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Blink: Not Your Father's Database!

Blink: Not Your Father's Database!

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5th BIRTE international Workshop Held at the 37th international conference on Very Large Databases (VLDB)

作者： Barber, Ronald Bendel, Peter Czech, Marco Draese, Oliver Ho, Frederick Hrle, Namik Idreos, Stratos Kim, Min-Soo Koeth, Oliver Lee, Jae-Gil Li, Tianchao Tim Lohman, Guy Morfonios, Konstantinos Mueller, Rene Murthy, Keshava Pandis, Ippokratis Qiao, Lin Raman, Vijayshankar Szabo, Sandor Sidle, Richard Stolze, Knut IBM Almaden Res Ctr K55-B1650 Harry Rd San Jose CA 95210 USA IBM Germany Res & Dev Lab Boblingen Germany SIX Grp Zurich Switzerland IBM Informat Management Dev San Jose CA 95134 USA CWI Amsterdam Netherlands DGIST Daegu 711873 South Korea Korea Adv Inst Sci & Technol Dept Knowledge Serv Engn Taejon 305701 South Korea Oracle Redwood Shores CA 94065 USA LinkedIn Mountain View CA 94043 USA

ISBN: (纸本)9783642335006;9783642334993

the Blink project's ambitious goals are to answer all Business Intelligence (BI) queries in mere seconds, regardless of the database size, with an extremely low total cost of ownership. It takes a very innovative and counter-intuitive approach to processing BI queries, one that exploits several disruptive hardware and software technology trends. Specifically, it is a new, workload-optimized DBMS aimed primarily at BI query processing, and exploits scale-out of commodity multi-core processors and cheap DRAM to retain a (copy of a) data mart completely in main memory. Additionally, it exploits proprietary compression technology and cache-conscious algorithms that reduce memory bandwidth consumption and allow most SQL query processing to be performed on the compressed data. Ignoring the general wisdom of the last three decades that the only way to scalably search large databases is with indexes, Blink always performs simple, "brute force" scans of the entire data mart in parallel on all nodes, without using any indexes or materialized views, and without any query optimizer to choose among them. the Blink technology has thus far been incorporated into two products: (1) an accelerator appliance product for DB2 for z/OS (on the "mainframe"), called the IBM Smart Analytics Optimizer for DB2 for z/OS, V1.1, which was generally available in November 2010;and (2) the Informix Warehouse Accelerator (IWA), a software-only version that was generally available in March 2011. We are now working on the next generation of Blink, called BLink Ultra, or BLU, which will significantly expand the "sweet spot" of Blink technology to much larger, disk-based warehouses and allow BLU to "own" the data, rather than copies of it.

关键词： Business Intelligence database management system query processing main-memory multi-core data mart OLAP accelerator appliance compression memory bandwidth cache-friendly algorithms data dictionary encoded data

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5th Workshop on General-Purpose Computation on Graphics processing Units, GPGPU-5 - Held in Cooperation with ACM ASPLOS XVII

5th Workshop on General-Purpose Computation on Graphics Proc...

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5th Workshop on General-Purpose Computation on Graphics processing Units, GPGPU-5 - Held in Cooperation with ACM ASPLOS XVII

ISBN: (纸本)9781450312332

the proceedings contain 13 papers. the topics discussed include: a distributed data-parallel framework for analysis and visualization algorithm development;FLAT: a GPU programming framework to provide embedded MPI;a GPU-based high-throughput image retrieval algorithm;dynamic particle system for mesh extraction on the GPU;high-performance sparse matrix-vector multiplication on GPUs for structured grid computations;high performance 3-D FFT using multiple CUDA GPUs;Paragon: collaborative speculative loop execution on GPU and CPU;JaBEE: framework for object-oriented Java bytecode compilation and execution on graphics processor units;enabling task-level scheduling on heterogeneous platforms;auto-tuning interactive ray tracing using an analytical GPU architecture model;full system simulation of many-core heterogeneous SoCs using GPU and QEMU semihosting;and reducing off-chip memory traffic by selective cache management scheme in GPGPUs.

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Compute Intensive In Advanced Wireless Sensor Node: Potential Solution

Compute Intensive In Advanced Wireless Sensor Node: Potentia...

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5th Mosharaka international conference on Communications, Computers and Applications (MIC-CCA)

作者： Ahmed, Helmi Masmoudi, Mohamed Natl Engineers Sch Sfax METS Res Grp Sfax Tunisia

ISBN: (纸本)9781938302077;9781467352307

For the past decade, there has been rapid development and advancement in the communication and sensor technologies that result in the growth of a new, attractive and challenging research area. In the other side, Wireless Sensor Network complexity applications have grown permanently, this rapid growth compared to the internal logical architecture of sensor node has increased the gap between sensor network and its applications. Sensor node always has preserved the same set of calculation logic regardless of application evolution. Developed applications such as video surveillance, intelligence, reconnaissance and applications emulating eyes found in robots are very hungry applications for intensive data and massive computing. Not only will it be necessary for nodes to process information, but they will have to react flexibly and act quickly when tasks become important. A fixed way of information processing is insufficient. there is no doubt that using a sophisticated solution to meet the critical needs of this type of application is very interesting to close the gap and will introduce a new challenge in the intensive data processing in sensor networks. In this paper we propose a novel architecture for intelligent sensor node based on multiprocessors engine enclosing a dedicated communication mechanism that's called network on-chip (NoC).

关键词： Wireless Sensor Network Node Intensive-information Intensive-compute Imote multiprocessors Network on Chip parallel compute

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Cluster Analysis for the Cloud: parallel Competitive Fitness and parallel K-means plus plus for Large Dataset Analysis

Cluster Analysis for the Cloud: Parallel Competitive Fitness...

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4th IEEE international conference on Cloud Computing Technology and Science (CloudCom)

作者： Esteves, Rui Maximo Hacker, thomas Rong, Chunming Univ Stavanger Dept Elect & Comp Engn Stavanger Norway Purdue Univ Dept Comp & Informat Technol W Lafayette IN USA

ISBN: (纸本)9781467345101;9781467345118

the amount of resources needed to provision Virtual Machines (VM) in a cloud computing systems to support virtual HPC clusters can be predicted from the analysis of historic use data. In previous work, Hacker et al. found that cluster analysis is a useful tool to understand the underlying spatio-temporal dependencies present in system fault and use logs. However, the cluster analysis used for reducing spatio-temporal dependences should be fast and accurate to understand the underlying stochastic properties of these systems. K-means is a fast cluster analysis method, in which accuracy depends on the use of initialization algorithms that are usually serial and slow. In this paper we present two new parallel strategies for fast seeding K-means cluster analysis. Both strategies were tested on a real problem where the aim was to reduce spatial and temporal dependencies of failures on large supercomputer systems. the performance of both strategies were compared with five existing serial implementations: K-means implementations of 1) Lloyd (L);2) McQueen (M);and 3) Hartigan - Wong (HW), all of them using Forgy seeding;4) K-tneans++;and 5) Neural Gas clustering (NG), a more recent and sophisticated method. Our results show that our new parallel Competitive Fitness approach reduces the Within Sum of Squares (WSQQ) measure, thus increasing cluster quality of the three K-means implementations: L;M;HW, and is 200 times faster than the existing serial K-means++. the existing serial and our new parallel K-means++ have the lowest WSQQ. Our new parallel K-means++ is twice as fast as the existing serial K-means++ method, and is 4 times faster than the NG method. Moreover, our new methods did not generate empty clusters, while NG did. As a result of our new techniques, predicting the amount of resources needed to provision VMs processing historic system fault and use data can now be done faster and with more accuracy.

关键词： component VM resources prediction Clustering K-means parallel K-means plus Neural Gas

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Dynamic particle system for mesh extraction on the GPU 5

Dynamic particle system for mesh extraction on the GPU

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5th Workshop on General-Purpose Computation on Graphics processing Units, GPGPU-5 - Held in Cooperation with ACM ASPLOS XVII

作者： Kim, Mark Chen, Guoning Hansen, Charles University of Utah Salt Lake City UT United States

ISBN: (纸本)9781450312332

Extracting isosurfaces represented as high quality meshes from three-dimensional scalar fields is needed for many important applications, particularly visualization and numerical simulations. One recent advance for extracting high quality meshes for isosurface computation is based on a dynamic particle system. Unfortunately, this state-of-the-art particle placement technique requires a significant amount of time to produce a satisfactory mesh. To address this issue, we study the parallelism property of the particle placement and make use of CUDA, a parallel programming technique on the GPU, to significantly improve the performance of particle placement. this paper describes the curvature dependent sampling method used to extract high quality meshes and describes its implementation using CUDA on the GPU. © 2012 ACM.

关键词： Graphics processing unit

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Power efficiency evaluation of block ciphers on GPU-integrated multicore processor

Power efficiency evaluation of block ciphers on GPU-integrat...

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12th international conference on algorithms and architectures for parallel processing, ICA3PP 2012

作者： Nishikawa, Naoki Iwai, Keisuke Kurokawa, Takakazu Departmemt of Computer Science and Engineering National Defense Academy of Japan 1-10-20 Hashirimizu Yokosuka-shi Kanagawa-ken 239-8686 Japan

ISBN: (纸本)9783642330773

Computer systems with discrete GPUs are expected to become the standard methodology for high-speed encryption processing, but they require large amounts of power consumption and are inapplicable to embedded devices. therefore, we have specifically examined a new heterogeneous multicore processor with CPU-GPU integration architecture. We first implemented three 128-bit block ciphers (AES, Camellia, and SC2000) from several symmetric block ciphers in an e-government recommended ciphers list by CRYPTREC in Japan using OpenCL on AMD E-350 APU with CPU-GPU integration architecture and two traditional systems with discrete GPUs. then we evaluated their respective power efficiencies. Result showed that performance per watt of AES-128 on the APU including 80 cores were 743.0 Mbps/W and 44.0 % increases compared with those on a system equipped with a discrete AMD Radeon HD 6770 including 800 cores. this paper is the first to describe a study to evaluate the per-watt performance of block ciphers on GPUs. © 2012 Springer-Verlag.

关键词： Graphics processing unit

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Information system monitoring and notifications using complex event processing 12

Information system monitoring and notifications using comple...

引用

5th Balkan conference in Informatics, BCI 2012

作者： Nguyen, Filip Pitner, Tomáš Lab Software Architectures and IS Botanická 68a Faculty of Informatics Masaryk University 602 00 Brno Czech Republic

ISBN: (纸本)9781450312400

Complex Event processing (CEP) is a novel approach how to process streaming events and extract information that would otherwise be lost. While tools for CEP are available right now, they are usually used only for a limited number of projects. that is disappointing, because every Enterprise Information System (EIS) is producing a high number of events, e.g. by logging debug information, and industry is not taking an advantage of CEP to make these information useful. We pick two concepts that seems to be from a different category - notifications - a ubiquitous way how to notify user of an EIS and EIS monitoring. With notifications we define a new abstraction upon notifications with respect to a separation of concerns to create a more maintainable implementation. In our research we show that this is a typical example of a possible future application of CEP and that the industry requires specific service oriented tools that can be used for both, notifications and monitoring. When these service oriented tools would be introduced into the industry it would promote EIS maintainability and extensibility. Copyright 2012 ACM.

关键词： Monitoring

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A parallel processing of spatial data interpolation on computing cloud 12

A parallel processing of spatial data interpolation on compu...

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5th Balkan conference in Informatics, BCI 2012

作者： Siládi, Vladimir Huraj, Ladislav Vesel, Eduard Poľcák, Norbert Matej Bel University Tajovského 40 Banská Bystrica Slovakia University of SS. Cyril and Methodius in Trnava Nám. J. Herdu 2 Trnava Slovakia

ISBN: (纸本)9781450312400

In a short span of time, cloud computing has grown, particularly for commercial web applications. But the cloud computing has the potential to become a greater instrument for scientific computing as well. A pay-as-you-go model with minimal or no upfront costs creates a flexible and costeffective means to access compute resources. In this paper, we carry out a study of the performance of the spatial data interpolation of depth of the snow cover on the most widely used cloud infrastructure (Amazon Elastic Compute Cloud). the main characteristic of the interpolating computing is the fact that it is time-consuming and data intensive;therefore utilizing parallel programming paradigm is eligible. the geoprocessing is realized on two configuration provided by Amazon EC2 and the results as well as performance of the computing is presented in the article. Copyright 2012 ACM.

关键词： Cluster computing

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Accelerating MapReduce on a Coupled CPU-GPU Architecture

Accelerating MapReduce on a Coupled CPU-GPU Architecture

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25th ACM/IEEE international conference for High Performance Computing, Networking, Storage and Analysis (SC)

作者： Chen, Linchuan Huo, Xin Agrawal, Gagan Ohio State Univ Dept Comp Sci & Engn Columbus OH 43210 USA

ISBN: (纸本)9781467308052;9781467308045

the work presented here is driven by two observations. First, heterogeneous architectures that integrate a CPU and a GPU on the same chip are emerging, and hold much promise for supporting power-efficient and scalable high performance computing. Second, MapReduce has emerged as a suitable framework for simplified parallel application development for many classes of applications, including data mining and machine learning applications that benefit from accelerators. this paper focuses on the challenge of scaling a MapReduce application using the CPU and GPU together in an integrated architecture. We develop different methods for dividing the work, which are the map-dividing scheme, where map tasks are divided between both devices, and the pipelining scheme, which pipelines the map and the reduce stages on different devices. We develop dynamic work distribution schemes for both the approaches. To achieve high load balance while keeping scheduling costs low, we use a runtime tuning method to adjust task block sizes for the map-dividing scheme. Our implementation of MapReduce is based on a continuous reduction method, which avoids the memory overheads of storing key-value pairs. We have evaluated the different design decisions using 5 popular MapReduce applications. For 4 of the applications, our system achieves 1.21 to 2.1 speedup over the better of the CPU-only and GPU-only versions. the speedups over a single CPU core execution range from 3.25 to 28.68. the runtime tuning method we have developed achieves very low load imbalance, while keeping scheduling overheads low. though our current work is specific to MapReduce, many underlying ideas are also applicable towards intra-node acceleration of other applications on integrated CPU-GPU nodes.

关键词： computer architecture graphics processing units pipeline processing

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A parallel fipa architecture based on GPU for games and real time simulations

A parallel fipa architecture based on GPU for games and real...

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11th international conference on Entertainment Computing, ICEC 2012

作者： Dos Santos, Luiz Guilherme Oliveira Gonzales Clua, Esteban Walter Bernardini, Flávia Cristina Instituto de Computaçao - IC MediaLab Universidade Federal Fluminense - UFF Niterói RJ Brazil Universidade Federal Fluminense - UFF Instituto de Ciência e Tecnologia - ICT LabIDeS - Laboratório de Inovaçao no Desenvolvimento de Sistemas Rio das Ostras - RJ Brazil

ISBN: (纸本)9783642335419

the dynamic nature and common use of agents and agent paradigm motives the investigation on standardization of multi-agent systems (MAS). the main property of a MAS is to allow the sub-problems related to a constraint satisfaction issues to be subcontracted to different problem solving agents with their own interests and goals, being FIPA one of the most commonly collection of standards used nowadays. When dealing with a huge set of agents for real time applications, such as games and virtual reality solutions, it is hard to compute a massive crowd of agents due the computational restrictions in CPU. With the advent of parallel GPU architectures and the possibility to run general algorithms inside it, it became possible to model such massive applications. In this work we propose a novel standardization of agent applications based on FIPA using GPU architectures, making possible the modelling of more complex crowd behaviours. the obtained results in our simulations were very promising and show that GPUs may be a choice for massively agents applications. We also present restrictions and cases where GPU based agents may not be a good choice. © 2012 Springer-Verlag Berlin Heidelberg.

关键词： Graphics processing unit

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