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Hardware and Software Tradeoffs for Task Synchronization on Manycore architectures

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17th international Euro-Par conference on parallel processing

作者： Yan, Yonghong Chatterjee, Sanjay Orozco, Daniel A. Garcia, Elkin Budimlic, Zoran Shirako, Jun Pavel, Robert S. Gao, Guang R. Sarkar, Vivek Rice Univ Dept Comp Sci Houston TX 77251 USA Univ Delaware Dept Elect Engn Newark DE USA

ISBN: (纸本)9783642233975

Manycore architectures - hundreds to thousands of cores per processor - are seen by many as a natural evolution of multicore processors. To take advantage of this massive parallelism in practice requires a productive parallel programming model, and an efficient runtime for the scheduling and coordination of concurrent tasks. A critical prerequisite for an efficient runtime is a scalable synchronization mechanism to support task coordination at different levels of granularity. this paper describes the implementation of a high-level synchronization construct called phasers on the IBM Cyclops64 manycore processor, and compares phasers to lower-level synchronization primitives currently available to Cyclops64 programmers. Phasers support synchronization of dynamic tasks by allowing tasks to register and deregister with a phaser object. It provides a general unification of point-to-point and collective synchronizations with easy-to-use interfaces, thereby offering productivity advantages over hardware primitives when used on manycores. We have experimented with several approaches to phaser implementation using software, hardware and a combination of both to explore their portability and performance. the results show that a highly-optimized phaser implementation delivered comparable performance to that obtained with lower-level synchronization primitives. We also demonstrate the success of the hardware optimizations proposed for phasers.

关键词： Synchronization

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An Efficient Nested Query processing for Distributed Database Systems

An Efficient Nested Query Processing for Distributed Databas...

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5th international conference on Convergence and Hybrid Information Technology (ICHIT)

作者： Kang, Yu-Jin Choi, Chi-Hawn Yang, Kyung-En Kim, Hun-Gi Choi, Wan-Sup Chungbuk Natl Univ Dept Management Informat Syst U BIZ BK21 Cheongju South Korea Chungbuk Natl Univ Dept Bio Informat Technol Cheongju South Korea

ISBN: (纸本)9783642241055;9783642241062

Performance of OLAP queries becomes a critical issue as the amount of data in the data warehouses increases rapidly. To solve this performance issue, we proposed a high performance database cluster system called HyperDB in which many PCs can be mobilized for excellent performance. In HyperDB, an OLAP query can be decomposed into sub-queries, and each of the sub-queries can be processed independently on a PC in a short time. But if an OLAP query has nested form (i.e., nested SQL), it could not be decomposed into sub-queries. In this paper, we propose a parallel distributed query processing algorithm for nested queries in HyperDB system. Traditionally, parallel distributed processing of nested queries is known as a difficult problem in the database area.

关键词： Distributed Database System Data Warehouse OLAP Query parallel Distributed processing Nested Query

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TMbox: A Flexible and Reconfigurable 16-core Hybrid Transactional Memory System

TMbox: A Flexible and Reconfigurable 16-core Hybrid Transact...

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IEEE 19th Annual international Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Sonmez, Nehir Arcas, Oriol Pflucker, Otto Unsal, Osman S. Cristal, Adrian Hur, Ibrahim Singh, Satnam Valero, Mateo Barcelona Supercomp Ctr Barcelona Spain Univ Politecn Cataluna E-08028 Barcelona Spain CSIC Spanish Natl Res Council Madrid Spain Microsoft Res Cambridge Cambridge England

ISBN: (纸本)9780769543017

In this paper we present the design and implementation of TMbox: An MPSoC built to explore trade-offs in multicore design space and to evaluate parallel programming proposals such as Transactional Memory (TM). Our flexible system, comprised of MIPS R3000-compatible cores is easily modifiable to study different architecture, library and operating system extensions. For this paper we evaluate a 16-core Hybrid Transactional Memory implementation based on the TinySTM-ASF proposal on a Virtex-5 FPGA and we accelerate three benchmarks written to investigate TM.

关键词： Field programmable gate arrays Hardware MIPS R3000-compatible core MPSoC Multicore processing Proposals Registers Software TMbox TinySTM-ASF Virtex-5 FPGA electronic engineering computing field programmable gate arrays flexible 16-core hybrid transactional memory system flexible system logic design multicore design space multicore prototyping multiprocessing systems parallel programming parallel programming reconfigurable 16-core hybrid transactional memory system reconfigurable architectures reconfigurable computing system-on-chip transactional memory

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Implementation of parallel Image processing Using NVIDIA GPU Framework

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international conference on Advances in Computing, Communication and Control (ICAC3)

作者： Daga, Brijmohan Bhute, Avinash Ghatol, Ashok Fr Conceicao Rodrigues Coll Engn Bombay Maharashtra India V J T I Bombay Maharashtra India D Y Patil Grp Inst Pune Maharashtra India

ISBN: (纸本)9783642184390

We introduced a real time Image processing technique using modern programmable Graphic processing Units (GPU) in this paper. GPU is a SIMD (Single Instruction, Multiple Data) device that is inherently data-parallel. By utilizing NVIDIA's new GPU Programming framework, "Compute Unified Device Architecture" (CUDA) as a computational resource, we realize significant acceleration in the computations of different Image processing algorithms. Here we present an efficient implementation of algorithms on the NVIDIA GPU. Specifically, we demonstrate the efficiency of our approach by a parallelization and optimization of the algorithm. In result we show time comparison between CPU and GPU implementation.

关键词： GPU CUDA Image blending

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Robustness of Serial and parallel Biometric Fusion against Spoof Attacks

Robustness of Serial and Parallel Biometric Fusion against S...

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5th international conference on Information processing (ICIP 2011)

作者： Akhtar, Zahid Alfarid, Nasir Univ Cagliari Dept Elect & Elect Engn I-09124 Cagliari Italy Cognizant Technol Solut Hyderabad Andhra Pradesh India

ISBN: (纸本)9783642227851

In this paper, we empirically study the robustness of multimodal biometric systems against spoof attacks. A few recent studies have questioned, contrary to a common claim in the literature, that a multimodal biometric system in parallel fusion mode can be cracked even if a single biometric trait is spoofed. Robustness of multimodal biometric systems in serial fusion mode against spoof attacks has so far not been investigated. We compare the performance of the multimodal systems with each mode under different spoof attack scenarios. We empirically show that multimodal biometric systems in both fusion modes are not intrinsically robust against spoof attacks as believed so far. In particular, multimodal biometric systems in serial fusion mode can be even less robust than systems in parallel mode, when only the best individual matcher is spoofed. Nonetheless, systems in serial fusion mode can be more robust than systems in parallel mode, when all matchers are spoofed.

关键词： Biometrics Biometric Fusion Multimodal Systems Robustness Evaluation Spoof Attacks

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Communication-Optimal parallel 2.5D Matrix Multiplication and LU Factorization algorithms

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17th international Euro-Par conference on parallel processing

作者： Solomonik, Edgar Demmel, James Univ Calif Berkeley Dept Comp Sci Berkeley CA 94720 USA

ISBN: (纸本)9783642233975

Extra memory allows parallel matrix multiplication to be done with asymptotically less communication than Cannon's algorithm and be faster in practice. "3D" algorithms arrange the p processors in a 3D array, and store redundant copies of the matrices on each of p(1/3) layers. '2D" algorithms such as Cannon's algorithm store a single copy of the matrices on a 2D array of processors. We generalize these 2D and 3D algorithms by introducing a new class of "2.5D algorithms". For matrix multiplication, we can take advantage of any amount of extra memory to store c copies of the data, for any c is an element of {1, 2,..., [p(1/3)]}, to reduce the bandwidth cost of Cannon's algorithm by a factor of c(1/2) and the latency cost by a factor c(3/2). We also show that these costs reach the lower bounds, modulo polylog(p) factors. We introduce a novel algorithm for 2.5D LU decomposition. To the best of our knowledge, this LU algorithm is the first to minimize communication along the critical path of execution in the 3D case. Our 2.5D LU algorithm uses communication-avoiding pivoting, a stable alternative to partial-pivoting. We prove a novel lower bound on the latency cost of 2.5D and 3D LU factorization, showing that while c copies of the data can also reduce the bandwidth by a factor of c(1/2), the latency must increase by a factor of c(1/2), so that the 2D LU algorithm ( c = 1) in fact minimizes latency. We provide implementations and performance results for 2D and 2.5D versions of all the new algorithms. Our results demonstrate that 2.5D matrix multiplication and LU algorithms strongly scale more efficiently than 2D algorithms. Each of our 2.5D algorithms performs over 2X faster than the corresponding 2D algorithm for certain problem sizes on 65,536 cores of a BG/P supercomputer.

关键词： Bandwidth

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Fast Adaptive Ultrasound Speckle Reduction with Bilateral Filter on CUDA

Fast Adaptive Ultrasound Speckle Reduction with Bilateral Fi...

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international conference on Bioinformatics and Biomedical Engineering (ICBBE)

作者： Fengjiao Jiang Dan Shi Dong C. Liu Computer Science College Sichuan University Chengdu China

the Compute Unified Device Architecture (CUDA) is a new parallel processing platform making use of the unified shader design of the most current Graphics processing Units (GPUs) from NVIDIA. In this paper, we apply this revolutionary new technology to implement the speckle reduction with adaptive bilateral filter for medical ultrasound imaging. the parallel speckle detection and mask producing with space for time algorithms are also presented. this bilateral filter method achieves a frame rate of 30 fps for the 256x512 image with once iteration, about 44 times faster than the CPU implementation. Testing results from GPU and CPU are compared in terms of visual image quality and program runtime with different image sizes.

关键词： Speckle Graphics processing unit Ultrasonic imaging Instruction sets Pixel Kernel Noise

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Heuristics for parallel Machine Scheduling with Deterioration Effect

Heuristics for Parallel Machine Scheduling with Deterioratio...

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5th Annual international conference on Combinatorial Optimization and Applications (COCOA 2011)

作者： Liu, Ming Zheng, Feifeng Xu, Yinfeng Wang, Lu Tongji Univ Sch Econ & Management Shanghai 200092 Peoples R China Xi An Jiao Tong Univ Sch Management Xian 710049 Peoples R China State Key Lab Mfg Syst Engn Xian 710049 Peoples R China Minist Educ Key Lab for Intelligent Networks & Network Secu Xian 710049 Peoples R China Shanghai Vocat Sch CAAC Shanghai 200232 Peoples R China

ISBN: (纸本)9783642226151

this paper considers one parallel machine scheduling problem in which the processing time of a job is a simple linear increasing function of its starting time. the objective is to minimize the makespan, and our focus is on the case with an arbitrary number of parallel machines. We prove that LIST rule is (1 + b(max))(m-1/m)-approximation where m, is the number of machines and b(max) is the maximum deteriorating rate of job. We then propose one heuristic LDR (Largest deteriorating Rate first). the heuristic is proved (1 + b(min))(m-1/m)-approximation where b(min) is the minimum deteriorating rate. We further show that this ratio is tight when m = 2,3 and 4.

关键词： Scheduling parallel machine Simple linear deterioration Makespan Approximation

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A Massively parallel Dense Symmetric Eigensolver with Communication Splitting Multicasting Algorithm

A Massively Parallel Dense Symmetric Eigensolver with Commun...

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9th international conference on High Performance Computing for Computational Science

作者： Katagiri, Takahiro Itoh, Shoji Univ Tokyo Ctr Informat Technol Bunkyo Ku 2-11-16 Yayoi Tokyo 1138658 Japan RIKEN Adv Ctr Comp & Commun Saitama Japan

ISBN: (纸本)9783642193279

In this paper. we propose a process grid free algorithm for a massively parallel dense symmetric eigensolver with a communication splitting multicasting algorithm. In this algorithm, a tradeoff exists between speed and memory space to keep the Householder vectors. As a result of a performance evaluation with the T2K Open Supercomputer (U. Tokyo) and the RX200S5, we obtain the performance with 0.86x and 0.95x speed-downs and 1/2 memory space compared to the conventional algorithm for a square process grid. We also show a new algorithm for small-sized matrices in massively parallel processing that takes an appropriately small value of p of the process grid p x q. In this case, the execution time of inverse transformation is negligible.

关键词： parallel and distributed computing numerical algorithms for CS&E

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Texture Evolution in Pure Copper Processed by Equal Channel Angular Extrusion with Extended processing Routes

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5th international conference on Nanomaterials by Severe Plastic Deformation

作者： Li, Saiyi Li, Hao Cent S Univ Sch Mat Sci & Engn Changsha 410083 Hunan Peoples R China

ISBN: (纸本)9783037850077

An experimental characterization of texture evolution during equal channel angular extrusion (ECAE) of pure copper was conducted up to 8 passes considering an extended range of processing routes. these routes are featured by 0 degrees, 45 degrees, 90 degrees, 135 degrees, and 180 degrees rotation about the billet longitudinal axis after each pass, and were designated as R0, R45, R90, R135, and RI 80, respectively. they were implemented using new die designs with the cross-section of the die channels as a 24-sided regular convex polygon and with die angle (3) of 90 degrees and 120 degrees, respectively. X-ray diffraction measurements show that for both die sets, the textures developed via the different routes all show orientation concentrations along fibers with the {111} planes parallel to the macroscopic simple shear plane and < 110 > directions parallel to the macroscopic simple shear direction, yet the locations and orientation densities of the main texture components vary significantly with the pass number and the processing route. After 4 to 8 passes, the texture is found to be the weakest via route RI 80 for both die sets, and strongest via R0 or R45. For a given route and pass number, the texture developed with Phi = 120 degrees is generally weaker than its counterpart with Phi = 90 degrees. these results thus confirm the general tendencies of texture development in face-centered cubic metals with {111}< 110 > slip as the dominant deformation mechanisms, albeit in a wide range of processing route or deformation history.

关键词： Equal channel angular extrusion Texture processing route

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