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Balanced minimal latency RNS addition for moduli set {2n - 1, 2n, 2n + 1}

Balanced minimal latency RNS addition for moduli set {2n - 1...

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2011 18th international conference on Systems, Signals and Image processing, IWSSIP 2011

作者： Jaberipur, Ghassem Nejati, Saeed Department of Electrical and Computer Engineering Shahid Beheshti University Tehran Iran

ISBN: (纸本)9789958996610

the classical RNS moduli set RNSC {2n - 1, 2 n, 2n + 1} is widely used in digital signal/image processing and generally in computer arithmetic with residue number systems (RNS). this popularity is due to possibility of efficient binary to/from RNS conversions and existence of modulo-(2n + 1) adder architectures that are quite competitive with ordinary modulo-2n adders. For example, there are modulo-(2n - 1) and 2n parallel prefix adders with the minimal latency of (3 + 2[log n]) unit gate delay (UGD), while latencies of the fastest existing modulo-(2n + 1) adders are 1, 2 or 3 UGDs more, depending on the encoding of residues. In particular diminished-1 (D1) representation of residues, in one design, has led to the least latency of (4 + 2[log n]) UGDs. Given that RNSC addition is undertaken in three parallel computation channels corresponding to the three moduli, it is desirable to device a (3 + 2[log n])-UGD modulo-(2n + 1) adder as well. therefore, we are motivated to improve the performance of the aforementioned least-latency D1 design. To achieve this goal in this paper, we use some of the existing techniques for zero handling associated with D1 representation. Our UGD measures are supported by the synthesis results, except for less than 5% deviation due to reasonably expected interconnection and routing effects. © 2011 Univ of Sarajevo.

关键词： Digital signal processing

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FPGA technology and parallel computing towards automatic microarray image processing

FPGA technology and parallel computing towards automatic mic...

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international conference on Telecommunications and Signal processing (TSP)

作者： Bogdan Belean Monica Borda Bertrand LeGal Raul Malutan Communication Department Technical University of Cluj-Napoca Cluj-Napoca Romania Communications Department Technical University of Cluj-Napoca Romania Laboratory IMS-Intégration des Matériaux au Systèmes University of Bordeaux Bordeaux France

Automation, computational time and cost are open subjects in microarray image processing. the present paper proposes image processing techniques together with their implementations in order to eliminate the shortcomings of the existing software platforms for microarray image processing: user intervention, increased computational time and cost. thus, for each step of microarray image processing, application-specific hardware architectures are designed aiming algorithms parallelization for fast processing. Computational time is estimated and compared with state of the art approaches. the proposed hardware architectures integrated inside microarray scanners deliver microarray image characteristics in an automated manner, excluding the need of an additional software platform. the FPGA technology was chosen for implementation, due to its parallel computation capabilities and ease of reconfiguration.

关键词： Hardware Field programmable gate arrays Computer architecture Image edge detection DNA Image segmentation

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GPU Based Tissue Doppler Imaging

GPU Based Tissue Doppler Imaging

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international conference on Bioinformatics and Biomedical Engineering (ICBBE)

作者： Zhengjuan Fan Li Wang Chaowei Tan Dong C. Liu Computer Science College Sichuan University Chengdu China

Tissue Doppler imaging is a routinely used diagnostic tool for assessing myocardial function in real time. the required signal processing is computationally intensive, including modified auto-correlation, scan conversion, image mapping. parallel algorithms and implementations based on GPU platform are proposed in this paper to increase the computation efficiency. the experimental signal data is acquired from a healthy human heart. Our method achieves a frame rate of 467 fps comprising 52 scan lines, 512 samples along the axial scan line, each scan line being obtained from an ensemble size of 6. the total execution time was about 105-fold faster on GPU than on CPU.

关键词： Graphics processing unit Doppler effect Kernel Imaging Image color analysis Myocardium Ultrasonic imaging

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parallel bubble sort using stream programming paradigm

Parallel bubble sort using stream programming paradigm

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international conference on Application of Information and Communication Technologies (AICT)

作者： Rahim Rashidy Saeid Yousefpour Mohamad Koohi Department of Computer Boukan Branch Islamic Azad University Boukan Iran Department of Computer Boukan Branch Islamic Azad University Tabriz Iran Department of Computer Boukan Branch Islamic Azad University Shabestar Iran

parallel computing has become the dominant paradigm in computer science, mainly in the form of multi core processors. One software approach for parallel programming, is writing programs in streaming model. A stream program is type of computer program such that the input data is stream of data. In this paper we have used stream programming model, and developed the parallel version of bubble sort algorithm. Our source codes are simple java code and used JStream java library. Our algorithm doesn't have any loop statement, witch is increases the time complexity of algorithms. We have chosen bubble sort, because it is the oldest and slowest sorting algorithm with time complexity level of O(n 2 ). In this paper we have shown that our algorithm has lower time complexity. Also our code shows that writing parallel programs in streaming model would be very simple.

关键词： Writing Computational modeling USA Councils Libraries Pipelines Multicore processing

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Lessons Learned from Exploring the Backtracking Paradigm on the GPU

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17th international Euro-Par conference on parallel processing

作者： Jenkins, John Arkatkar, Isha Owens, John D. Choudhary, Alok Samatova, Nagiza F. North Carolina State Univ Raleigh NC 27695 USA Oak Ridge Natl Lab Oak Ridge TN 37830 USA Univ Calif Davis CA 95616 USA Northwestern Univ Evanston IL 60208 USA

ISBN: (纸本)9783642233975

We explore the backtracking paradigm with properties seen as sub-optimal for GPU architectures, using as a case study the maximal clique enumeration problem, and find that the presence of these properties limit GPU performance to approximately 1.4-2.25 times a single CPU core. the GPU performance "lessons" we find critical to providing this performance include a coarse-and-fine-grain parallelization of the search space, a low-overhead load-balanced distribution of work, global memory latency hiding through coalescence, saturation, and shared memory utilization, and the use of GPU output buffering as a solution to irregular workloads and a large solution domain. We also find a strong reliance on an efficient global problem structure representation that bounds any efficiencies gained from these lessons, and discuss the meanings of these results to backtracking problems in general.

关键词： Graphics processing unit

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Particle-in-Cell algorithms for Plasma Simulations on Heterogeneous architectures

Particle-in-Cell Algorithms for Plasma Simulations on Hetero...

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Euromicro conference on parallel, Distributed and Network-Based processing

作者： Xavier Sáez Alejandro Soba Jose M. Cela Edilberto Sánchez Francisco Castejón Computer Applications in Science & Engineering Barcelona Spain Laboratorio Nacional de Fusiόn Madrid Madrid Spain

Within the fusion community, a large number of codes are in use to simulate various aspects of the plasma behaviour. Many codes have been written by physicists with a big emphasis on the physics without using the latest technologies available in computer science. For improving this situation, a project with acronym EUFORIA was created. the main target of this project is to increase the performance of key existing codes, either parallelizing the sequential codes or improving their parallelization. However, in general these codes were not thought for new supercomputers based on muticore architectures and only take advantage of the task level parallelism, basically using Message Passing Interface (MPI). In this paper we discuss several possible ways to apply hybrid parallelization techniques in fusion codes for exploiting new multiprocessor supercomputers under development.

关键词： Program processors Mathematical model Physics Plasmas Cloning Equations Scalability

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An energy-efficient scheduling algorithm for sporadic real-time tasks in multiprocessor systems

An energy-efficient scheduling algorithm for sporadic real-t...

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13th IEEE international Workshop on FTDCS 2011, the 8th international conference on ATC 2011, the 8th international conference on UIC 2011 and the 13th IEEE international conference on HPCC 2011

作者： Zhang, Dong-Song Chen, Fang-Yuan Li, Hong-Hua Jin, Shi-Yao Guo, De-Ke National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China School of Computing Science Simon Fraser University 8888 University Drive Burnaby BC V5A 1S6 Canada National Laboratory for Information System Engineering School of Information Systems and Management National University of Defense Technology Changsha 410073 China

ISBN: (纸本)9780769545387

As the energy consumption of embedded multiprocessor systems becomes increasingly prominent, the real-time energy-efficient scheduling in multiprocessor systems becomes an urgent problem to reduce the system energy consumption while meeting real-time constraints. For a multiprocessor with independent DVFS and DPM at each processor, this paper proposes an energy-efficient real-time scheduling algorithm named LRE-DVFS-EACH, based on LRE-TL which is an optimal real-time scheduling algorithm for sporadic tasks. LRE-DVFS-EACH utilizes the concept of TL plane and the idea of fluid scheduling to dynamically scale the voltage and frequency of processors at the initial time of each TL plane as well as the release time of a sporadic task in each TL plane. Consequently, LRE-DVFS-EACH can obtain a reasonable tradeoff between the real-time constraints and the energy saving. LRE-DVFS-EACH is also adaptive to the change of workload caused by the dynamic release of sporadic tasks, which can obtain more energy savings. the experimental results show that compared with existing algorithms, LRE-DVFS-EACH can not only guarantee the optimal feasibility of sporadic tasks, but also achieve more energy savings in all cases, especially in the case of high workloads. © 2011 IEEE.

关键词： Real time systems

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FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Spiking Activities

FPGA Architecture of Generalized Laguerre-Volterra MIMO Mode...

引用

IEEE 19th Annual international Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Li, Will X. Y. Cheung, Ray C. C. Zhang, Wei Chan, Rosa H. M. Song, Dong Berger, theodore W. City Univ Hong Kong Dept Elect Engn Hong Kong Hong Kong Peoples R China Univ So Calif Dept Biomed Engn Los Angeles CA 90007 USA

ISBN: (纸本)9780769543017

We present a parallelized and pipelined architecture for a generalized Laguerre-Volterra MIMO system to identify the time-varying neural dynamics underlying spike activities. the proposed architecture consists of a first stage containing a vector convolution and MAC (Multiply and Accumulation) component;a second stage containing a pre-threshold potential updating unit with an error approximation function component;and a third stage consisting of a gradient calculation unit. A flexible and efficient architecture that can accommodate different design speed requirements are generated. Simulation results are rigorously analyzed. A hardware IP library for versatile models and applications is proposed. the design runs on a Xilinx Virtex-6 FPGA and the processing core produces data samples at a maximum clock rate of 357MHz, which is 4.37 x 10(5) times faster than the corresponding software model running on an AMD Pheono 9750 Quad Core Processor. It occupies 216,766 LUTs, maximum 12 block-RAMs, and 2016 DSP-blocks.

关键词： AMD Pheono 9750 Quad Core Processor Arrays Biological system modeling Computational modeling FPGA architecture Field programmable gate arrays Hardware MIMO systems Software Xilinx Virtex-6 FPGA biology computing error approximation function component field programmable gate arrays generalized Laguerre-Volterra MIMO model gradient calculation unit multiply and accumulation component neural nets neural population spiking activities parallel architectures parallelized architecture pipeline processing pipelined architecture time-varying neural dynamics vector convolution

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Efficient computation of spherical harmonic transform using parallel architecture of CUDA

Efficient computation of spherical harmonic transform using ...

引用

international conference on Signal processing and Communication Systems, ICSPCS

作者： Weiyu Huang Zubair Khalid Rodney A. Kennedy Research School of Engineering College of Engineering and Computer Science Australian National University Canberra Australia

Spherical harmonics serve as basis functions on the unit sphere and spherical harmonic transform is required in analysis and processing of signals in the spectral domain. We investigate the possibility of parallel computation of spherical harmonic transform using Compute Unified Device Architecture (CUDA) with no communication between parallel kernels. We identify the parallel components in the widely used spherical harmonic transform method proposed by Driscoll and Healy. We provide the implementation details and compare the computational complexity with the sequential algorithm. For a given bandlimited signal with maximum spherical harmonics degree L, using the O(L) number of parallel processing kernels, we present that the spherical harmonic coefficients can be calculated in O(Llog 2 L) time as compared to O(L 2 log 2 L). For corroboration, we provide the simulation results using CUDA which indicate the reduction in computational complexity.

关键词： Harmonic analysis Transforms Graphics processing unit Computational complexity Frequency modulation Kernel Algorithm design and analysis

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Ex Vivo Monitoring of Rat Heart Wall Motion Using Piezoelectric Cantilevers

<i>Ex Vivo</i> Monitoring of Rat Heart Wall Motion Using Pie...

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5th Joint conference of the 65th IEEE international Frequency Control Symposium / 25th European Frequency and Time Forum

作者： Zhang, Rui Chen, Ya Ko, Wen H. Rosenbaum, David S. Yu, Xin Feng, Philip X. -L. Case Western Reserve Univ Case Sch Engn Biomed Engn Cleveland OH 44106 USA Case Western Reserve Univ Case Sch Engn Elect Engn Cleveland OH 44106 USA Case Western Reserve Univ Case Sch Engn Physio & Biophys Cleveland OH 44106 USA Case Western Reserve Univ Case Sch Engn Metro Hlth Sys Cleveland OH 44106 USA

ISBN: (纸本)9781612841106

We report on an experimental exploration of ex vivo measurements and real-time monitoring of the motions of heart wall for perfused rat hearts, by employing a surface-contact type of electromechanical probes based on piezoelectric transduction. In a hybrid experimental apparatus consisting of a conventional heart perfusion system and external electromechanical probing devices and circuitry, prototyped piezoelectric cantilever devices are calibrated and tested. We demonstrate that the external piezoelectric cantilevers are capable of monitoring the dynamic behavior of the isolated heart ex vivo, by measuring the motions of the heart wall. For typical rat hearts with heart rates in the range of similar to 150-250bpm (beats per minute), cantilevers with dimensions of t x w x L approximate to 130 mu m x (0.3-8) mm x (1-19) mm yield electrical signal of similar to 50-400mV. Measured data can also help identify signatures of various regimes (e.g., from healthy to fatigued, to expiring) in the dynamical evolution during the perfused heart's lifetime. Preliminary tests on parallel multi-channel monitoring with probes positioned at multiple locations on heart surface prove to be valid and useful in obtaining information of regional displacement of heart wall.

关键词： Diseases Heart rate Monitoring Muscles Probes Voltage measurement biomechanics biomedical measurement biomedical transducers blood vessels cardiovascular system dynamical evolution electromechanical probing device ex vivo measurement ex vivo monitoring heart perfusion system heart surface heart wall motions medical signal processing parallel multichannel monitoring patient monitoring physiological models piezoelectric transducers piezoelectric transduction prototyped piezoelectric cantilever device rat heart wall motion real-time monitoring signature identification

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