Jamming style Denial-of-Service attack is the transmission of radio signals that disrupt communications by decreasing the signal to noise ratio. this kind of attack can be easily launched by jammer through either bypa...
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the proliferation of RDF data on the web has increased the need for systems that can query these data while scaling withtheir growing size and number. We present an application of parallel hash-joins for basic graph ...
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the proliferation of RDF data on the web has increased the need for systems that can query these data while scaling withtheir growing size and number. We present an application of parallel hash-joins for basic graph pattern matching over large amounts of RDF designed for shared nothing architectures including high-performance clusters and the Blue Gene/L. Our approach does not require any pre-processing of the RDF data or costly index building. Rather, we rely on a cluster's high bandwidth and fast memory to load and query data in parallel and in near-real time. We present an initial evaluation of our algorithm showing competitive results on clusters of up to 1,024 processors.
An earlier paper [1] introduced the theory of the single-symbol parallel interpolation in all-digital receiver, in which the interpolation is based on a scale of symbol, characterized by vector-operation of the vector...
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ISBN:
(纸本)9781424436927
An earlier paper [1] introduced the theory of the single-symbol parallel interpolation in all-digital receiver, in which the interpolation is based on a scale of symbol, characterized by vector-operation of the vector input, fractional delay, and output. In this paper, the theory of the multiple-symbol parallel interpolation in all-digital receiver is proposed, in which the interpolation is based on a scale of frame, characterized by matrix-operation of the matrix input, fractional delay, and output. this trait dramatically lightens the hardware-constraint to the processing rate of the interpolator and in turn, greatly improves the processing speed of the receiver. Besides, with a vector frame clock whose every element corresponds to a symbol in the frame, the performance loss of the multiple-symbol parallel interpolation compared to the serial interpolation is only the loss introduced by the delay of timing loop, which is inevitable for structures of parallel interpolation.
In this paper, a parallel carrier recovery method for all-digital receiver is proposed. Unlike the existing serial carrier recovery method, which makes the carrier recovery for one symbol at a time, the parallel struc...
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ISBN:
(纸本)9781424436927
In this paper, a parallel carrier recovery method for all-digital receiver is proposed. Unlike the existing serial carrier recovery method, which makes the carrier recovery for one symbol at a time, the parallel structure makes the carrier recovery for one frame at a time, characterized by vector-operation of the vector phase error and control word. this trait dramatically lightens the hard ware-constraint and improves the processing rate of the receiver with no additional performance loss. Besides, simplified structures of the parallel carrier recovery and their performance losses are also discussed.
Multi-field packet classification is a critical function that enables network routers to support a variety of applications such as firewall processing, Quality of Service differentiation, traffic billing, and other va...
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ISBN:
(纸本)9781424445523
Multi-field packet classification is a critical function that enables network routers to support a variety of applications such as firewall processing, Quality of Service differentiation, traffic billing, and other value added services. Explosive growth of Internet traffic requires the future packet classifiers be implemented in hardware. However, most of the existing packet classification algorithms need large amount of memory, which inhibits efficient hardware implementations. this paper exploits the modem FPGA technology and presents a partitioning-based parallel architecture for scalable and high-speed packet classification. We propose a coarse-grained independent sets algorithm and then combine it seamlessly withthe cross-producting scheme. After partitioning the original rule set into several coarse-grained independent sets and applying the cross-producting scheme for the remaining rules, the memory requirement is dramatically reduced. Our FPGA implementation results show that our architecture can store 10K real-life rules in a single state-of-the-art FPGA while consuming a small amount of on-chip resources. Post place and route results show that the design sustains 90 Gbps throughput for minimum size (40 bytes) packets, which is more than twice the current backbone network link rate.
In this paper, we propose a fast and flexible sorting algorithm with CUDA. the proposed algorithm is Much more practical than the previous GPU-based sorting algorithms, as it is able to handle the sorting of elements ...
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ISBN:
(纸本)9783642030949
In this paper, we propose a fast and flexible sorting algorithm with CUDA. the proposed algorithm is Much more practical than the previous GPU-based sorting algorithms, as it is able to handle the sorting of elements represented by integers, floats and structures. Meanwhile, our algorithm is optimized for the modern GPU architecture to obtain high performance. We use different strategies for sorting disorderly list and nearly-sorted list to make it adaptive. Extensive experiments demon- strate our algorithm has higher performance than previous GPU-based sorting algorithms and can support real-time applications.
In this paper, the representation of Doppler effect on code acquisition performance is analyzed and the principle of combining serial-parallel correlator with FFT is given based on the discrete-time signal processing....
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ISBN:
(纸本)9781424436927
In this paper, the representation of Doppler effect on code acquisition performance is analyzed and the principle of combining serial-parallel correlator with FFT is given based on the discrete-time signal processing. the improved code acquisition architecture by combining twi-serial-parallel correlator with FFT for the long PN code spread spectrum communication system is designed and realized in FPGA and DSP. this architecture provides a very good trade-off between acquisition performance and complexity. Application results show, this architecture is very attractive for the long PN code spread spectrum communication system.
Clustering is defined as the grouping of similar items in a set, and is an important process within the field of data mining. As the amount of data for various applications continues to increase, in terms of its size ...
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the existing researches of image fusion most focus on theory. the universal and real time fusion system is presented rarely. A general purpose scheme of real time image fusion system based on RTOS(real time operation ...
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Recent advances in physics-based sound synthesis have offered huge potential possibilities for the creation of new musical instruments. Despite that research on physics-based sound synthesis is going on for almost thr...
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ISBN:
(纸本)9783642040696
Recent advances in physics-based sound synthesis have offered huge potential possibilities for the creation of new musical instruments. Despite that research on physics-based sound synthesis is going on for almost three decades, its higher computational complexity has limited its use in real-time applications. Conventional serial computation is inadequate for handling the physics-based sound synthesis of most instruments. To yield computation time compatible with real-time performance, we introduce a parallel approach to the physics-based sound synthesis. In this paper, with a parallelprocessing engine we implemented the physical modeling for one of traditional Korean plucked string instruments, called Gayageum, which has 12 silk strings. Analysis and simulation results suggest that our parallel approach has the potential to support the real-time sound synthesis of the Gayageum instrument. Moreover, our parallel approach outperforms today's DSPs in terms of performance and energy efficiency.
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